JPS55103629A - Information input device - Google Patents

Information input device

Info

Publication number
JPS55103629A
JPS55103629A JP1164379A JP1164379A JPS55103629A JP S55103629 A JPS55103629 A JP S55103629A JP 1164379 A JP1164379 A JP 1164379A JP 1164379 A JP1164379 A JP 1164379A JP S55103629 A JPS55103629 A JP S55103629A
Authority
JP
Japan
Prior art keywords
cpu
read strobe
external device
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1164379A
Other languages
Japanese (ja)
Other versions
JPS6311692B2 (en
Inventor
Shinichi Ikegaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pentel Co Ltd
Original Assignee
Pentel Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pentel Co Ltd filed Critical Pentel Co Ltd
Priority to JP1164379A priority Critical patent/JPS55103629A/en
Publication of JPS55103629A publication Critical patent/JPS55103629A/en
Publication of JPS6311692B2 publication Critical patent/JPS6311692B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)

Abstract

PURPOSE: To simplify constitution by constituting a CPU unit as a micro processor into one body together with a tablet.
CONSTITUTION: After decision of address signal 102 to designate external device 110, CPU unit 100 generates read strobe 103, and designated external device 110 connects the output to data bus 101 to transmit data when receiving this read strobe 103. Since it takes a long time from the output of read strobe 103 from CPU 100 to arrival at CPU 100 of decided data from external device 110, CPU 100 reads data on the bus 101 after a little while from the output of read strobe 103. Buffer gate signal 133 causes pen signal 161 to be outputted to data bus 101 through buffer circuit 140. X and Y scanning pulses are applied to X signal electrode Xi and Y signal electrode Yi, which constitute tablet 120, according to address designation.
COPYRIGHT: (C)1980,JPO&Japio
JP1164379A 1979-02-03 1979-02-03 Information input device Granted JPS55103629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1164379A JPS55103629A (en) 1979-02-03 1979-02-03 Information input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1164379A JPS55103629A (en) 1979-02-03 1979-02-03 Information input device

Publications (2)

Publication Number Publication Date
JPS55103629A true JPS55103629A (en) 1980-08-08
JPS6311692B2 JPS6311692B2 (en) 1988-03-15

Family

ID=11783625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1164379A Granted JPS55103629A (en) 1979-02-03 1979-02-03 Information input device

Country Status (1)

Country Link
JP (1) JPS55103629A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974847A (en) * 1972-11-20 1974-07-19
JPS50104837A (en) * 1974-01-22 1975-08-19
JPS5366123A (en) * 1976-11-25 1978-06-13 Nec Corp Keyboard

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974847A (en) * 1972-11-20 1974-07-19
JPS50104837A (en) * 1974-01-22 1975-08-19
JPS5366123A (en) * 1976-11-25 1978-06-13 Nec Corp Keyboard

Also Published As

Publication number Publication date
JPS6311692B2 (en) 1988-03-15

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