JPS5478019A - Video control circuit of television receiver - Google Patents

Video control circuit of television receiver

Info

Publication number
JPS5478019A
JPS5478019A JP14531777A JP14531777A JPS5478019A JP S5478019 A JPS5478019 A JP S5478019A JP 14531777 A JP14531777 A JP 14531777A JP 14531777 A JP14531777 A JP 14531777A JP S5478019 A JPS5478019 A JP S5478019A
Authority
JP
Japan
Prior art keywords
circuit
video
pedestal
output
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14531777A
Other languages
Japanese (ja)
Inventor
Seishiro Iwamura
Hidetaka Egashira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14531777A priority Critical patent/JPS5478019A/en
Publication of JPS5478019A publication Critical patent/JPS5478019A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to reproduce a stable picture by providing a video control circuit which can adjust automatically the brightness and the contrast of the picture and cancel the irregularity of the brightness and the contrast of the picture.
CONSTITUTION: In the video circuit of a TV receiver, video signals detected by video detector circuit 1 are applied to signal processing circuit 2, and additional signals at a reference white level are added from additional signal circuit 3, and these signals are applied to video gain variable circuit 4 as composite video signals. The gain of composite video signals is controlled in this circuit 4 by the output of additional signal circuit 3, and the output is applied to pedestal control circuit 5. Then, the level of pedestal is controlled in circuit 5 by the output of pedestal comparator circuit 11, and the output is applied to current detector circuit 7 through video amplifier circuit 6. The current of composite video signals which is applied to CRT 8 through circuit 7 is detected by circuit 7, and this detected current is applied to pedestal and additional signal gate circuits 9 and 10 respectively, thereby controlling the pedestal field and the additional signal field to a fixed level.
COPYRIGHT: (C)1979,JPO&Japio
JP14531777A 1977-12-02 1977-12-02 Video control circuit of television receiver Pending JPS5478019A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14531777A JPS5478019A (en) 1977-12-02 1977-12-02 Video control circuit of television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14531777A JPS5478019A (en) 1977-12-02 1977-12-02 Video control circuit of television receiver

Publications (1)

Publication Number Publication Date
JPS5478019A true JPS5478019A (en) 1979-06-21

Family

ID=15382355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14531777A Pending JPS5478019A (en) 1977-12-02 1977-12-02 Video control circuit of television receiver

Country Status (1)

Country Link
JP (1) JPS5478019A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5714570U (en) * 1980-06-27 1982-01-25
JPS5871769A (en) * 1981-10-23 1983-04-28 Sony Corp Control circuit of reference level
JPS60223272A (en) * 1984-04-18 1985-11-07 Sony Corp Luminance controller

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5714570U (en) * 1980-06-27 1982-01-25
JPH0119496Y2 (en) * 1980-06-27 1989-06-06
JPS5871769A (en) * 1981-10-23 1983-04-28 Sony Corp Control circuit of reference level
JPH0374072B2 (en) * 1981-10-23 1991-11-25
JPS60223272A (en) * 1984-04-18 1985-11-07 Sony Corp Luminance controller

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