JPS5446411A - Pulse generating circuit - Google Patents

Pulse generating circuit

Info

Publication number
JPS5446411A
JPS5446411A JP11376977A JP11376977A JPS5446411A JP S5446411 A JPS5446411 A JP S5446411A JP 11376977 A JP11376977 A JP 11376977A JP 11376977 A JP11376977 A JP 11376977A JP S5446411 A JPS5446411 A JP S5446411A
Authority
JP
Japan
Prior art keywords
pulse
output
monostable multivibrator
triggered
monostable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11376977A
Other languages
Japanese (ja)
Inventor
Nobuyuki Ishimaru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP11376977A priority Critical patent/JPS5446411A/en
Publication of JPS5446411A publication Critical patent/JPS5446411A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to generate the initial reset or start pulse of an apparatus, which synchronizes with the 1st pulse of an input pulse of constant frequency, without delay by using a N number of cascaded monostable multivibrators.
CONSTITUTION: Monostable multivibrator 14 is triggered at the leading edge of an input pulse, monostable multivibrator 15 is triggered at the trailing edge of its output pulse, and monostable multivibrator 16 is triggered at the trailing edge of its output pulse. Then, the operation output of monostable multivibrator 14 and the non-operation output of monostable multivibrator 16 are supplied to NAND circuit 17, whose output is used as the reset pulse of digital apparatus 13; and then, operation outputs of monostable multivibrators 14 to 16 are inputted to OR circuit 18, whose output is applied to apparatus 13 as a start pulse after charging capacitor 19 giving a fixed time lag. Consequently, a reset pulse or start pulse can be generated without delay even if the period of an input pulse fluctuates
COPYRIGHT: (C)1979,JPO&Japio
JP11376977A 1977-09-20 1977-09-20 Pulse generating circuit Pending JPS5446411A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11376977A JPS5446411A (en) 1977-09-20 1977-09-20 Pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11376977A JPS5446411A (en) 1977-09-20 1977-09-20 Pulse generating circuit

Publications (1)

Publication Number Publication Date
JPS5446411A true JPS5446411A (en) 1979-04-12

Family

ID=14620660

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11376977A Pending JPS5446411A (en) 1977-09-20 1977-09-20 Pulse generating circuit

Country Status (1)

Country Link
JP (1) JPS5446411A (en)

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