JPS54128215A - Buffer memory unit - Google Patents
Buffer memory unitInfo
- Publication number
- JPS54128215A JPS54128215A JP3633578A JP3633578A JPS54128215A JP S54128215 A JPS54128215 A JP S54128215A JP 3633578 A JP3633578 A JP 3633578A JP 3633578 A JP3633578 A JP 3633578A JP S54128215 A JPS54128215 A JP S54128215A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- buffer memory
- delay time
- special code
- sent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE: To give control so that the propagation delay time of the information may be constant from the input of the transmission buffer memory unit to the output of the reception buffer memory unit even in case both the information generation and transmission speeds change mutually with the time lapse.
CONSTITUTION: Delay time measurement circuit 134 measures the time required from writing of the special code into buffer memory circuit 132 to its reading based on the start pluse sent from special code detector circuit 131 and the stop pulse sent from special code isolator circuit 133. And the result of the measurement is sent to buffer memory control circuit 135. Circuit 135 turns fixed the sum of the propagation delay time required for the special code which is sent from circuit 131 and measured at delay time measurement circuit 124 of transmission buffer unit 12 to pass through unit 12 and the delay time required for the special code to pass through reception buffer unit 13.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3633578A JPS54128215A (en) | 1978-03-28 | 1978-03-28 | Buffer memory unit |
US05/970,051 US4215369A (en) | 1977-12-20 | 1978-12-15 | Digital transmission system for television video signals |
CA318,184A CA1132243A (en) | 1977-12-20 | 1978-12-19 | Digital transmission system for television video signals |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3633578A JPS54128215A (en) | 1978-03-28 | 1978-03-28 | Buffer memory unit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54128215A true JPS54128215A (en) | 1979-10-04 |
JPS6216069B2 JPS6216069B2 (en) | 1987-04-10 |
Family
ID=12466951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3633578A Granted JPS54128215A (en) | 1977-12-20 | 1978-03-28 | Buffer memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54128215A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01315822A (en) * | 1988-06-15 | 1989-12-20 | Nec Corp | Random access fifo memory |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0365032A (en) * | 1989-08-02 | 1991-03-20 | Central Res Inst Of Electric Power Ind | Cogeneration system |
-
1978
- 1978-03-28 JP JP3633578A patent/JPS54128215A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01315822A (en) * | 1988-06-15 | 1989-12-20 | Nec Corp | Random access fifo memory |
Also Published As
Publication number | Publication date |
---|---|
JPS6216069B2 (en) | 1987-04-10 |
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