JPS54107242A - Backup system for digital-system controller - Google Patents

Backup system for digital-system controller

Info

Publication number
JPS54107242A
JPS54107242A JP1349378A JP1349378A JPS54107242A JP S54107242 A JPS54107242 A JP S54107242A JP 1349378 A JP1349378 A JP 1349378A JP 1349378 A JP1349378 A JP 1349378A JP S54107242 A JPS54107242 A JP S54107242A
Authority
JP
Japan
Prior art keywords
transmission
slc
backup
bus
common bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1349378A
Other languages
Japanese (ja)
Inventor
Hisanori Miyagaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1349378A priority Critical patent/JPS54107242A/en
Publication of JPS54107242A publication Critical patent/JPS54107242A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To achieve a system reliability by a minimum backup unit even if the system scale is extended.
CONSTITUTION: Bus controller BSC stores a table, where a signal transmission side and a signal receiving side are determined, in a memory and transmits the table as code signals to a common bus in a prescribed order at a fixed period, thus performing signal transmission dependently upon common bus BUS. SLC (sub-loop contoller), SSM(sensor module) and high-level computers have their own addresses respectively and compare and collate the code signal transmitted to the common bus with their own addresses and discriminate that they are assigned as the transmission or receiving side currently, thereby performing the information transmission from the transmission-side device to the receiving-side device. In case that an arbitrary SLC is fauty, switching circuit COC is switched to the backup SLC side to keep the state before fault. Next, after the control output is made agree with th output before fault, and bumpless is caused to start backup control.
COPYRIGHT: (C)1979,JPO&Japio
JP1349378A 1978-02-10 1978-02-10 Backup system for digital-system controller Pending JPS54107242A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1349378A JPS54107242A (en) 1978-02-10 1978-02-10 Backup system for digital-system controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1349378A JPS54107242A (en) 1978-02-10 1978-02-10 Backup system for digital-system controller

Publications (1)

Publication Number Publication Date
JPS54107242A true JPS54107242A (en) 1979-08-22

Family

ID=11834631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1349378A Pending JPS54107242A (en) 1978-02-10 1978-02-10 Backup system for digital-system controller

Country Status (1)

Country Link
JP (1) JPS54107242A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6148415A (en) * 1993-06-11 2000-11-14 Hitachi, Ltd. Backup switching control system and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6148415A (en) * 1993-06-11 2000-11-14 Hitachi, Ltd. Backup switching control system and method

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