JPS5365602A - Time slot conversion system - Google Patents

Time slot conversion system

Info

Publication number
JPS5365602A
JPS5365602A JP14142476A JP14142476A JPS5365602A JP S5365602 A JPS5365602 A JP S5365602A JP 14142476 A JP14142476 A JP 14142476A JP 14142476 A JP14142476 A JP 14142476A JP S5365602 A JPS5365602 A JP S5365602A
Authority
JP
Japan
Prior art keywords
time slot
conversion system
slot conversion
time
highways
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14142476A
Other languages
Japanese (ja)
Other versions
JPS5628437B2 (en
Inventor
Kazuo Hamasato
Tomoji Inoue
Tetsuaki Egawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14142476A priority Critical patent/JPS5365602A/en
Publication of JPS5365602A publication Critical patent/JPS5365602A/en
Publication of JPS5628437B2 publication Critical patent/JPS5628437B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To share the memory circuit and to enhance the economical performance even in case the phase differs between the in-and out-highways, by using the basic timing produced from the time slot at the time-division channel.
JP14142476A 1976-11-24 1976-11-24 Time slot conversion system Granted JPS5365602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14142476A JPS5365602A (en) 1976-11-24 1976-11-24 Time slot conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14142476A JPS5365602A (en) 1976-11-24 1976-11-24 Time slot conversion system

Publications (2)

Publication Number Publication Date
JPS5365602A true JPS5365602A (en) 1978-06-12
JPS5628437B2 JPS5628437B2 (en) 1981-07-01

Family

ID=15291662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14142476A Granted JPS5365602A (en) 1976-11-24 1976-11-24 Time slot conversion system

Country Status (1)

Country Link
JP (1) JPS5365602A (en)

Also Published As

Publication number Publication date
JPS5628437B2 (en) 1981-07-01

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