JPH1198024A - Encoding signal processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize quality deterioration at the time of performing prescribed processing partially by seeking correlation of a recoded signal after prescribed processing execution and an encoded signal which is not undergone the prescribed processing and is before decoding respectively in each prescribed unit and outputting the encoded signal before decoding of a source signal as it is at the time of high correlation. SOLUTION: On an image part that is not a processing object, a processing circuit 3 does not apply any processing to it and an encoding circuit 4 often recodes it. At that time, comparator circuits 5 and 6 recognize high correlation between source signals (encoded signals) V1 and V2 and a recoded signal V3 after recoding. By the way, the image quality of the signal V3 deteriorates because DCT encoding is irreversible processing. Then, the signals V1 and V2 which is undergone processing and is before encoding are selected for a block that is recognized as high correlation. As a result, a synthetic circuit 9 outputs a synthetic output V4 which synthesizes signals with each other that do not have deterioration in theory.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a coded signal processing apparatus, for example, a DCT (Discrete Cosine Transformer).
m) It can be applied to an apparatus that processes an image signal encoded by an encoding method.

[0002]

[Prior art]

Literature: Data Compression Technology (Nikkei Electronics) Today, a lot of information tends to be compression-encoded in a form suitable for transmission and storage.
The compression encoding of information has been advanced by applying various high-efficiency encoding schemes such as the T encoding scheme. Along with this, the mainstream of the editing method is also shifting from linear editing to non-linear editing.

FIG. 2 shows a functional configuration of a processing device used for nonlinearly editing a video signal. Note that the encoded signals V1 and V2 input to this processing device are already D
It is CT-encoded and read from a storage medium such as a hard disk.

[0004] Usually, the processing device operates such an encoded signal V1.
And V2 are input to the decoding circuits 1 and 2, which are subjected to inverse DCT coding and decoded into original video signals (luminance signal and color difference signal). The signal form of the decoded video signal is a component video signal.

The processing (image processing such as editing, conversion, level conversion, etc.) in the processing circuit 3 is usually performed in the form of a composite video signal. Therefore, the processing circuit 3 shown in FIG. After being converted into a composite (composite) video signal, it is processed. The processed video signal is converted into a component video signal again, and then output.

However, the video signal after such processing is again
If the data is to be stored in a storage medium such as a hard disk or transmitted via a network such as a digital circuit, an encoding circuit provided at the output stage to reduce storage capacity and communication bandwidth. 4 again at DC
T-encoded.

[0007]

However, in this method, after processing (after image processing such as editing, conversion, level conversion, etc.)
When the video is stored again in a storage medium or transmitted over a network, it is necessary to decode the entire image and re-encode the image, so that there is a problem that the image quality is deteriorated while such processing is repeated.

In particular, in the case of irreversible processing such as DCT coding, deterioration of image quality due to repetition of processing has been remarkable. Also, in the case where the signal level, color, etc. of the video signal are merely changed, the conventional method needs to perform processing after decoding once, so that decoding and encoding are repeated repeatedly, and image quality is increased. It was a cause of deterioration.

[0009]

(A) In order to solve the above-mentioned problem, in the first invention, one or a plurality of coded signals irreversibly coded for each predetermined unit are inputted, and a predetermined process is performed. The coded signal processing device for performing and outputting is provided with the following means.

That is, (1) decoding means for decoding one or a plurality of encoded signals, processing means for performing predetermined processing on the decoded signal, and lossy encoding of the processed signal again. (2) a second signal system for transmitting one or a plurality of encoded signals without decoding, and (3) first and second signal systems. A comparison unit that receives a re-encoded signal and an encoded signal from a signal system, and determines a correlation between the two signals for each predetermined unit; (4)
If a high correlation is found in the determination by the comparing means, the coded signal before decoding output from the second signal system is selectively output, and if a low correlation is found in the determination in the comparing means, Selection means for selectively outputting the re-encoded signal output from the first signal system.

As described above, according to the present invention, the correlation between the re-encoded signal after the predetermined processing and the coded signal before the decoding without the predetermined processing is determined for each predetermined unit. When a high correlation is recognized, the encoded signal itself before decoding, which is the original signal, is selectively output, so that when a predetermined process is performed on only a part of the entire encoded signal, Quality deterioration can be minimized.

(B) In the second invention, there is provided an encoded signal processing apparatus which receives one or a plurality of encoded signals irreversibly encoded in predetermined units, performs predetermined processing, and outputs the processed signals. The following means shall be provided.

That is, (1) DC level generating means for generating an arbitrary DC level, and (2) level varying means for changing only the DC component of the encoded signal by the DC level generated by the DC level generating means. Be prepared to have.

As described above, according to the present invention, only the target DC component is changed without decoding the coded signal to be processed. Can be eliminated.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION

(A) First Embodiment (A-1) Configuration of First Embodiment Hereinafter, a case where an encoded signal processing device according to the present invention is applied to a processing device that processes a signal after DCT encoding will be described. This will be described with reference to the drawings.

FIG. 1 shows a functional block configuration of a processing apparatus according to the first embodiment. In FIG. 1, the same and corresponding parts as those in FIG.
Input means and the like used by the operator to give various instructions to the processing device are not shown.

As shown in FIG. 1, also in the processing apparatus according to this embodiment, the coded signals V1 and V2, which have already been DCT coded, are converted into the original video signals (including still images) by the inverse DCT coding. Decoding circuits 1 and 2 used for decoding
And a processing circuit 3 for converting the video signal decoded by these circuits into a composite video signal and processing the same, and a coding circuit 4 for DCT-encoding and outputting the video signal processed by the processing circuit 3 again. Is the same as in the case of the conventional circuit.

The difference is that (1) the re-coded signal V3 output from the coding circuit 4 and the original signals (coded signals) V1 and V
Block 2 (m pixels x n lines (m and n are integers))
(2) Based on the comparison result, an original signal (encoded signal) V1 and a signal after decoding (image processing such as editing, conversion, level conversion, etc.) are decoded again. A switching circuit (SW) 7 for selectively outputting one of the converted re-coded signals V3 in block units, and (3) an original signal (coded signal) V2 and a decoded signal based on the comparison result. A switching circuit (SW) for selecting one of the re-encoded signals V3 re-encoded through the processing in block units
8 and (4) a synthesizing circuit 9 for synthesizing the output of each switching circuit and outputting it as a synthesized output V4.

Here, the comparison circuits 5 and 6 calculate the correlation between the two input signals, and when the correlation value is larger than a predetermined threshold value (that is, when the correlations are high and almost coincide with each other). ), A selection signal is supplied to switching circuits (SW) 7 and 8 to select an encoded signal before decoding, and when the correlation value is smaller than a predetermined threshold value (that is, the correlation is low and some change is recognized). In some cases), a selection signal is supplied to the corresponding switching circuits (SW) 7 and 8 so as to select the re-encoded signal V3 which has been re-encoded through the processing after decoding.

(A-2) Contents of Image Processing Operation Next, an operation in the case of performing arbitrary image processing on a video signal using the processing apparatus having the above configuration will be described.

Generally, when performing image processing on a video signal,
Although the entire screen may be processed, the processing is often performed only on a part of the entire screen. That is, for the image portion not to be processed, the encoding circuit 4
In many cases. Here, the processing operation in such a case will be described.

First, a process for a block corresponding to a video portion not to be processed will be described. At this time,
In the comparison circuits 5 and 6, the original signal (encoded signal) V1
And V2 and the re-encoded signal V3 after re-encoding have a high correlation. Incidentally, since the DCT coding is an irreversible process, the image quality of the re-coded signal V3 is somewhat deteriorated.

Therefore, for a block in which such a high correlation is recognized, a selection signal is output so as to select the coded signals V1 and V2 that have not been subjected to any processing (before decoding). As a result, from the synthesizing circuit 9, a synthesized output V4 obtained by synthesizing signals having no deterioration in principle is output.

Next, a process for a block corresponding to a video portion to be processed will be described. Note that this processing includes not only a case where predetermined processing is performed on both of the encoded signals V1 and V2, but also a case where processing is performed on one of them.

At this time, in the comparison circuits 5 and 6,
A high correlation between both the original signals (encoded signals) V1 and V2 and the re-encoded signal V3 of the encoding circuit 4 is not recognized. That is, the correlation between the two signals in the block is significantly reduced due to some processing.

Therefore, for a block in which such a low correlation is recognized, a selection signal is output so as to select the output V3 of the encoding circuit 4. As a result, a synthesized output V4 obtained by synthesizing the changed signals is obtained from the synthesizing circuit 9.

Thus, from the synthesizing circuit 9, a synthesized output of the re-encoded signal V3 that has been decoded and coded is sent out only for the block corresponding to the processed video, and other blocks may be deteriorated. A composite output of the original signals (encoded signals) V1 and V2 without the output is output.

In the block coding method to which the orthogonal transform method such as the DCT coding method is applied, since the coding is performed independently for each block, the signal is switched in block units as in the present embodiment. There is no problem.

The original signals (encoded signals) V1 and V2
And the switching process can be automatically determined only by the correlation result with the re-encoded signal V3 of the encoding circuit 4, so that there is no need to separately indicate the block to be switched using a special control signal such as a key signal.

The simplest method of comparison in the comparison circuits 5 and 6 is a method in which the difference between the two inputs is used as a parameter. In this method, not only the difference but also the DCT coefficient distribution value is used as a parameter. In this case, the selection can be performed with higher accuracy.

In the present embodiment, the description has been made on the assumption that the coding blocks are independent of each other. However, in the actual processing, the difference of the direct current (DC) component between adjacent blocks is coded. General. Therefore, in practice, if only the direct current (DC) component amount is decoded, independent processing can be performed.

The DCT encoding operation usually includes a DCT
This includes a T operation process and a subsequent quantization process, but this is not an absolute condition, and thus the description is omitted.

(A-3) Effects of the First Embodiment As described above, according to the processing apparatus of the present embodiment, the DC
When processing a T-encoded signal, a re-encoded signal that has been subjected to both decoding and encoding is output only for the block to be processed. For blocks that have not been added, the original signal can be used as it is, and image quality degradation before and after processing can be minimized.

The determination of the processed block is
Since the determination is made from the correlation between the original signals (encoded signals) V1 and V2 and the re-encoded signal V3 of the encoding circuit 4, automatic switching can be determined.

(B) Second Embodiment A case where the coded signal processing device according to the present invention is applied to a processing device for processing a signal after DCT coding will be described below with reference to the drawings.

FIG. 3 shows a functional block configuration of a processing apparatus according to the second embodiment. Note that this processing device has a dedicated function of changing the signal level.

This processing device comprises a DC level generating circuit 10 for generating a direct current (DC) level, and a level varying circuit 11
Consists of

The DC level generating circuit 10 is a circuit for generating an arbitrary direct current (DC) level in accordance with an instruction of an operator. The direct current (DC) level generated for each block is supplied to the level conversion circuit 11 each time. Output.

On the other hand, the level conversion circuit 11 applies a direct current (DC) supplied from the DC level generation circuit 10 to a direct current (DC) level portion of the block whose level is instructed to change in the encoded signal V5 after the DCT encoding. This is a circuit that performs substitution (including addition and subtraction processing) at a level, and outputs a signal after the substitution as an encoded signal V6.

Here, how the direct current (DC) component of the orthogonally transformed (axially transformed) encoded signal as in the DCT encoding method appears in the encoded signal will be described. FIG.
FIG. 4 is a diagram showing a state in which DC coefficients in a block of 8 pixels × 8 lines are quantized. In FIG. 4, a direct current (DC) component appears in the upper left corner. Then, at the time of actual encoding, as shown in FIG. 5, a difference between DCT coefficients (direct current (DC) components) appearing in the upper left corner of each block is obtained between adjacent blocks, and is encoded.

Therefore, by changing this difference value, it is possible to change the direct current (DC) level in block units. Also, by changing the DCT coefficient (direct current (DC) component) in the block at the head position of the frame composed of a plurality of blocks, it is possible to shift the amount of all direct current (DC) components in the frame.

In addition, the level conversion operation of the coded signal V5 does not require any decoding processing and coding processing, so that there is no need to worry about image quality deterioration.

By the way, in the case of the conventional apparatus, when such level conversion processing is performed, the coded signal that has been DCT coded is subjected to inverse DCT coding processing to be decoded into a component video signal, which is further composited. It is necessary to change the direct current (DC) level in the state of being converted to the video signal, and to again perform the DCT coding on the component converted to the component video signal, so that the deterioration of the image quality cannot be avoided.

As described above, in the second embodiment, when the level of the coded signal V5 is changed, the direct current (DC) component is used as it is without using any decoding and re-encoding processing. Is changed, it is possible to minimize the possibility that the image quality deteriorates in the process of signal processing.

The most suitable application of the processing apparatus according to the present embodiment is a video processing apparatus (so-called video processor) for adjusting the level and color of an image signal.
It is.

(C) Third Embodiment (C-1) Configuration of Third Embodiment Hereinafter, the coded signal processing device according to the present invention is applied to a processing device that processes a signal after DCT coding. The case will be described with reference to the drawings.

FIG. 6 shows a functional block configuration of a processing apparatus according to the third embodiment. In FIG. 6, the same and corresponding parts as those in FIG. 1 are denoted by the same reference numerals.

The processing apparatus according to the third embodiment is obtained by adding the functions described in the second embodiment to the processing apparatus according to the first embodiment. That is, in the case of the first embodiment, since a method of selecting a signal to be output based on the correlation between encoded blocks is adopted,
Even when only the direct current (DC) component is changed, it is considered that there is no correlation, and the re-encoded signal (decoded → encoded) is selected. Avoidance is intended to be done.

Therefore, the difference in configuration is that a new function is added to the comparison circuits 5 'and 6', and the addition of adding a direct current (DC) level to the original signals (encoded signals) V1 and V2. There are only two points where circuits 12 and 13 are added, and the other parts are the same as the configuration of the first embodiment.

Here, the configurations of the comparison circuits 5 'and 6' and the addition circuits 12 and 13 will be described.

The comparison circuits 5 'and 6' according to this embodiment
Is the same as in the first embodiment in that the correlation between the original signals (encoded signals) V1 and V2 and the re-encoded signal V3 is determined in block units, but the quantization distributions are compared. If only the direct current (DC) component of the DCT coefficient is different, a selection signal is output so as to select the original signals (encoded signals) V1 and V2, and the direct current is supplied to the addition circuits 12 and 13. The difference is that the difference amount of the (DC) component is output.

The adder circuits 12 and 13 are circuits for directly adding the difference amounts of direct current (DC) components to the original signals (encoded signals) V1 and V2 when the difference amounts of the direct current (DC) components are given from the comparison circuits 5 'and 6'. It is. That is, as described in the second embodiment, this is a circuit that adds a direct current (DC) component without performing any decoding processing on the original signals (encoded signals) V1 and V2.

(C-2) Contents of Image Processing Operation Next, an operation in the case of performing arbitrary image processing on a video signal using the processing apparatus having the above configuration will be described.

Except for the case where the processing content in the processing circuit 3 is a change in the direct current (DC) level, the other operation contents are the same as those in the first embodiment described above.

That is, when the comparison circuits 5 'and 6' compare the original signals (encoded signals) V1 and V2 with the re-encoded signal V3 after the re-encoding, a high correlation is found. , A selection signal instructing selection of the original signals (encoded signals) V1 and V2, and conversely, in the case where a high correlation is not recognized, an instruction is given to select the re-encoded signal V3 after re-encoding. An operation of outputting a selection signal to be performed is performed.

However, the original signal (encoded signal) V1
And V2 and the re-encoded signal V3 after re-encoding, even though no high correlation was observed, it was recognized from the comparison of the quantized distribution of the DCT coefficients that only the direct current (DC) component was different. In this case, the comparison circuits 5 'and 6' are provided with a switching circuit (SW) 7
And 8, a selection signal instructing selection of the original signals (encoded signals) V1 and V2 is output, and the addition circuit 12
And 13, the difference amount of the direct current (DC) component is output.

As a result, the original signals (encoded signals) V1 and V2 after the addition of the direct current (DC) components in the adder circuits 12 and 13 are signals that have not been subjected to a series of processing involving decoding and the like. Is selected and output to the synthesizing circuit 9. That is, it is possible to obtain a signal with no signal deterioration in principle.

(C-3) Effect of Third Embodiment As described above, according to the processing apparatus of the present embodiment, the first
In addition to the same effects as those of the first embodiment, when the content of the processing in the processing circuit 3 is only a change in the direct current (DC) level, a high correlation is recognized in the determination of the correlation in the comparison circuits 5 ′ and 6 ′. Even if there is no such signal, the original signals (encoded signals) V1 and V2 that have not undergone processing such as decoding can be selected, and image quality degradation of the combined output V4 can be minimized.

(D) Application Example FIG. 7 shows an application example of each of the above-described embodiments. Here, a case where a coded signal is nonlinearly edited using an electronic computer (computer) will be described. In addition,
FIG. 7A shows a general processing flow when an encoded signal is processed by using a computer, and FIG.
Indicates an application example of each embodiment. Also, this example shows a case where one system of signal is processed.

First, a general processing flow will be described. An encoded signal read from a disk (including a storage medium such as a memory card) 21 is decoded into a component signal by a decoding board 22 and then decoded by a signal processing board 2.
3 and processed. Normally, the signal processing board 23 has a video signal memory having a capacity of one field or more. After the decoded signal is stored in the video signal memory, predetermined signal processing is performed.

The signal after the signal processing is stored in the video signal memory again, and then output to the CPU control board 24.
The processed signal input to the CPU control board 24 is displayed on a display via the display board 25, and is used for operator confirmation. The operator's operation on the displayed video is given to the signal processing board 23 via the CPU control board 24, and the signal processing and display are repeated until the operator is confirmed. When the signal obtained by the worker's confirmation is stored in the disk 21, the signal is supplied to the encoding board 26 and encoded again.

When the present embodiment is applied, as shown in FIG. 7B, a signal instructing storage in the disk 21 is once input to the comparison circuit 27 and decoded in block units. Compared to the previous signal. Then, the blocks re-encoded by the encoding board 26 are sent to the disk 21 via the switching circuit 28 for the blocks which have been changed by the signal processing, and the blocks 21 which have not been changed are sent from the disk 21 for the blocks which have not been changed. The read signal is written to the disk 21 again as it is. However, when selecting a signal read from the disk 21,
The original signal is used as is and there is no need to write again. In this case, only the signal after re-encoding needs to be written.

(E) Other Embodiments Lastly, other embodiments that can be adopted by the above embodiments will be described.

In the above-described embodiment, the case where two types of video signals are combined has been described. However, when one type of video signal is handled as in the application example, three or more types of video signals are handled. It can also be applied to cases. In any case,
Basically, a signal after re-encoding and a signal before decoding are compared in block units, and a signal before decoding or a signal after re-encoding is output according to the comparison result. Or just choose.

In the above embodiment, the picture structure of the video signal to be processed is not described at all. However, the present invention can be applied to a case where a frame is used as a unit and a case where a field is used as a processing unit.

Further, in the above embodiment, DC
Although the case of processing a T-encoded video signal has been described, the present invention is not limited to this, and is also applicable to the case of processing a video signal that has been subjected to another orthogonal coding process (for example, Hadamard coding process). obtain.

In the above-described embodiment, the case where a block-coded signal is to be processed has been described. However, the present invention can also be applied to a case where a signal of a predetermined period continuous in time series is to be processed.

Furthermore, in the above-described embodiment, a case has been described where a video signal is to be processed. However, the present invention can also be applied to a case where an irreversible compressed audio signal is to be processed.

[0069]

As described above, according to the first aspect, even when a predetermined process is performed on an encoded signal, the re-encoded signal after the predetermined process is performed and the predetermined process are performed. The correlation of the undecoded coded signal before decoding is obtained for each predetermined unit, and when a high correlation is recognized, the uncoded coded signal itself as the original signal is selectively output, so that It is possible to minimize deterioration in quality when performing a predetermined process only on a part of all the coded signals.

According to the second aspect of the present invention, only the target DC component is changed without decoding the coded signal to be processed, so that the quality degradation associated with decoding and re-encoding is reduced. Can be eliminated.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an encoded signal processing device according to a first embodiment.

FIG. 2 is a block diagram showing a configuration of a conventional device.

FIG. 3 is a block diagram illustrating a configuration of an encoded signal processing device according to a second embodiment.

FIG. 4 is a diagram showing a quantization result of DCT coefficients.

FIG. 5 is a diagram illustrating an example of DC component encoding between adjacent blocks.

FIG. 6 is a block diagram illustrating a configuration of an encoded signal processing device according to a third embodiment.

FIG. 7 is a block diagram illustrating a configuration example when applied to a computer.

[Explanation of symbols]

1, 2 decoding circuit, 3 processing circuit, 4 encoding circuit,
5, 5 ', 6, 6' ... comparison circuit, 7, 8 ... switching circuit, 9
... combination circuit, 10 ... DC level generation circuit, 11 ... level variable circuit, 12, 13 ... addition circuit.

Claims (3)

[Claims] 1. An encoded signal processing device which receives one or a plurality of coded signals irreversibly coded for each predetermined unit, performs predetermined processing, and outputs the coded signals, A first signal system including decoding means for decoding, processing means for performing the predetermined processing on the decoded signal, and coding means for irreversibly encoding and outputting the processed signal again; A second signal system for transmitting one or a plurality of encoded signals without decoding, and a re-encoded signal and an encoded signal from the first and second signal systems, and a correlation between the two signals And a comparing means for determining a predetermined unit, and when a high correlation is found in the judgment by the comparing means, selectively outputs a coded signal before decoding output from the second signal system, Low correlation in judgment by comparison means If because obtained, coded signal processing apparatus characterized by comprising selecting means for selectively outputting the re-encoded signal output from said first signal system. 2. The coded signal processing device according to claim 1, wherein the comparing means determines that both of the signals have been analyzed as a result of the analysis of the coded signal even when a low correlation is recognized between the two signals. When it is recognized that the difference is a change in only the DC component, the selection means is instructed to select the encoded signal output from the second signal system, and the second signal system is selected. Give a value corresponding to the difference of the DC component to the addition means provided between the output end of the and the input end of the selection means,
A coded signal processing device, wherein the coded signal input to the selection means is changed. 3. A coded signal processing apparatus which receives one or a plurality of coded signals irreversibly coded in predetermined units, performs predetermined processing and outputs the coded signals, and generates an arbitrary DC level. And a level varying means for changing only the DC component of the encoded signal by the DC level generated by the DC level generating means.