JPH11338992A - Pc card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make an unused area of a memory effectively usable referring to memory idle area information of a memory management means to write data in an idle area of the memory in accordance with a command from an external computer. SOLUTION: When a memory write start command is written in a register 9 from an external computer 4, a PC card interface circuit 8 generates an interrupt signal to a CPU 2. The CPU 2 receives the interrupt signal to search areas of flag '00' of a memory management part 10 in the order from a flag 1. If the area of the flag 1 is '00', '01' is written in the area of the flag 1. When file name 'AAAA' is written in the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2, and the CPU 2 receives the interrupt signal to write 'AAAA' in the area of a file name 1 of the memory management part 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a PC card used by being inserted into a PCMCIA slot or the like of a notebook personal computer.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram showing a conventional PC card disclosed in Japanese Patent Application Laid-Open No. 8-263615.
In the figure, 1 is a memory for storing programs and data, 2 is a CPU for controlling the memory, 3 is a PC card interface connector for connecting an external computer 4 and a PC card 5, and 6 is an address from the PC card interface connector 2. A bus switching circuit including means for directly connecting the bus A, the data bus A, and the control signal A to the memory 1, and a write command recognition circuit 7 for recognizing a program write command issued by the external computer 4.

Next, the operation will be described. When a program write command is issued from the external computer 4 in a state where the PC card 5 and the external computer 4 are connected via the PC card interface connector 3, the write command recognition circuit 7 recognizes the program write command, It outputs a hold request signal to the CPU 2. After setting the terminals connected to the address bus B, the data bus B, and the control signal B to high impedance, the CPU 2 outputs a hold acknowledge signal to the bus switching circuit 6. Upon receiving the hold acknowledge signal, the bus switching circuit 6 directly connects the address bus A and the address bus B, the data bus A and the data bus B, the control signal A and the control signal B, and stores the program from the external computer 4 directly into the memory 1. Write to.

[0004]

The conventional P as described above
In the C card, since the memory is not managed, there is a problem that data cannot be written to an address specified in the memory, particularly to a free area.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a PC card that can effectively use an unused area of a memory.

[0006]

According to a first aspect of the present invention, there is provided a PC card for storing a program and data, a control unit for controlling the memory, and a PC card for transferring data to and from an external computer. In a PC card including an interface connector and a PC card interface circuit for controlling data transfer between the PC card interface connector and the control means, a memory management means for managing a free area of the memory is provided; The control means is configured to write data in a free area of the memory with reference to the free area information of the memory management means in response to a command from the external computer.

According to a second aspect of the present invention, there is provided a PC card including a memory for storing programs and data, control means for controlling the memory, a PC card interface connector for transferring data to and from an external computer, and In a PC card provided with a PC card interface circuit for controlling data transfer between a card interface connector and the control means, a memory management means for managing addresses of the memory is provided, and the control means is provided from the external computer. The data is written to a predetermined address of the memory by referring to the address information of the memory management means in response to the address designation signal.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1
Is a memory for storing programs and data, 2 is a memory 1
, A PC card interface connector for connecting an external computer 4 to a PC card 5, 4 an external computer, and 5 a PC card. Reference numeral 8 denotes a PC card interface circuit including a register 9 for exchanging commands and data between the external computer 4 and the CPU 2. Reference numeral 10 denotes a control unit provided with the CPU 2 for managing addresses and data in the memory 1, This is a memory management unit including a memory management unit that manages one free area.

FIG. 2 shows the memory management unit 10 of FIG.
2 is an example showing a use mode of a memory when realized by two internal memories. 2A shows an initial state where nothing is written in the memory, FIG. 2B shows a state where one file is written in the memory, and FIG. 2C shows a state where a second file is written in the memory. The state is shown.

Next, the first embodiment will be described with reference to FIGS. First, a method of writing the first file data from the external computer 4 to the memory 1 will be described. When a memory write start command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal for the CPU 2. Upon receiving the interrupt signal, the CPU 2 sequentially searches the flag area of the memory management unit 10 where the flag area is “00” from the flag 1. At first, since the area of the flag 1 is “00”, the area of the flag 1 is “0”.
Write "1".

Next, when the file name “AAAAA” is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. The CPU 2 that has received the interrupt signal writes “AAAAA” in the area of the file name 1 of the memory management unit 10.

Next, when file data to be written to the memory 1 is written into the register 9 from the external computer, the PC
The card interface circuit causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 reads the file data to be written to the memory 1 from the register 9 and sequentially writes the data from address “00” of the memory 1.

Next, when a memory write end command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 writes the final address “XX” in which the data has been written to the memory 1 into the end address 1 area.

Next, a method of writing the second file data from the external computer 4 to the memory 1 will be described. When a memory write start command is written into the register 9 from the external computer 4 in the same manner as when writing the first file data, the PC card interface circuit 8
Causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 searches the flag area of the memory management unit 10 where the flag area is “00” in order from the flag 1. This time, since the area of the flag 2 is “00”, “01” is written in the area of the flag 2.

Next, when the file name “BBBB” is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. The CPU 2 that has received the interrupt signal writes “BBBB” in the area of the file name 2 of the memory management unit 10.

Next, when file data to be written to the memory 1 is written from the external computer into the register 9, the PC
The card interface circuit causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 reads the file data to be written to the memory 1 from the register 9 and sequentially writes the data from the address “XX (the value written to the end address 1) +1” of the memory 1.

Next, when a memory write end command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 writes the last address “YY” in which the data has been written to the memory 1 into the end address 2 area. The writing of the third and subsequent files is performed in the same manner as the writing of the second file.

Next, a method of reading the file data written in the memory 1 will be described. When a memory read start command and a read file name (here, “BBBB”) are written from the external computer 4 to the register 9, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 searches the memory management unit 10 for a location where "BBBB" is written in the file name area. The CPU 2 that has found that “BBBB” has been written in the place of the file name 2 reads the file data of the memory 1 from the address “XX (the value written in the end address 1) +1” and writes it to the register 9. When the file data is written, the PC card interface circuit 8 causes the external computer 4 to generate an interrupt via the PC card interface connector 3. The external computer 4 that has received the interrupt reads the file data written in the register 8 in order.

As described above, since the memory management unit 10 can manage the free area of the memory 1, file data can be automatically written from the external computer 4 to the free area of the memory. . Further, the written file data can be read only by designating the file name. As a result, an unused area such as a flash memory used as a program storage area, which cannot be used conventionally, can be released to the user.

Embodiment 2 A description will be given of a means for writing data to a specified address of the memory 1 in a circuit equivalent to the first embodiment. FIG. 3 shows the memory management unit 1 of FIG.
7 is an example showing a method of using a memory when 0 is realized by a memory inside the CPU 2. 3A shows an initial state in which nothing is stored in the memory, FIG. 3B shows a state in which one file is written in the memory, and FIG.
This shows a state where the second file has been written.

Next, a second embodiment will be described with reference to FIGS. First, a method of writing the first file data from the external computer 4 to the memory 1 will be described. When a memory write start command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal for the CPU 2. Upon receiving the interrupt signal, the CPU 2 searches the flag area of the memory management unit 10 where the flag area is “00” in order from the flag 1. Initially, since the area of the flag 1 is “00”, the area of the flag 1 is “01”.
Write.

Next, when the write start address “PP” of the memory 1 is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. The CPU 2 that has received the interrupt signal writes “PP” in the area of the start address 1 of the memory management unit 10.

Next, when the file name "AAAAA" is written into the register 9, the PC card interface circuit 8
An interrupt signal is generated for PU2. The CPU 2 that has received the interrupt signal writes “AAAAA” in the area of the file name 1 of the memory management unit 10.

Next, when file data to be written to the memory 1 is written into the register 9 from an external computer, the PC
The card interface circuit causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 reads the file data to be written to the memory 1 from the register 9 and sequentially writes the data from the address “PP” of the start address 1 of the memory 1.

Next, when a memory write end command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 writes the final address “QQ” in which data has been written to the memory 1 into the end address 1 area.

Next, a method of writing the second file data from the external computer 4 to the memory 1 will be described. When a memory write start command is written into the register 9 from the external computer 4 in the same manner as when writing the first file data, the PC card interface circuit 8
Causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 searches the flag area of the memory management unit 10 where the flag area is “00” in order from the flag 1. This time, since the area of the flag 2 is “00”, “01” is written in the area of the flag 2.

Next, when the write start address “RR” of the memory 1 is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 writes “RR” in the area of the start address 1 of the memory management unit 10.

Next, when the file name “BBBB” is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. The CPU 2 that has received the interrupt signal writes “BBBB” in the area of the file name 2 of the memory management unit 10.

Next, when file data to be written to the memory 1 is written into the register 9 from the external computer, the PC
The card interface circuit causes the CPU 2 to generate an interrupt signal. Upon receiving the interrupt signal, the CPU 2 reads the file data to be written to the memory 1 from the register 9 and sequentially writes the data from the start address 2 “RR” of the memory 1.

Next, when a memory write end command is written into the register 9 from the external computer 4, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 writes the last address “SS” in which the data has been written to the memory 1 into the area of the end address 2. The writing of the third and subsequent files is performed in the same manner as the writing of the second file.

Next, a method of reading the file data written in the memory 1 will be described. When a memory read start command and a read file name (here, “BBBB”) are written from the external computer 4 to the register 9, the PC card interface circuit 8 generates an interrupt signal to the CPU 2. Upon receiving the interrupt signal, the CPU 2 searches the memory management unit 10 for a location where "BBBB" is written in the file name area. The CPU 2 that has found that “BBBB” has been written at the file name 2 reads the file data of the memory 1 from the address “RR” of the start address 2 and writes it to the register 9. When the file data is written, the PC card interface circuit 8 causes the external computer 4 to generate an interrupt via the PC card interface connector 3. The external computer 4 that has received the interrupt reads the file data written in the register 8 in order.

As described above, the memory management unit 10 can write file data from the external computer 4 to a designated area of the memory 1. Further, the written file data can be read only by designating the file name. Because of this, it could not be used before,
An unused area such as a flash memory used as a program storage area can be released to the user.

[0033]

As described above, according to the first aspect of the present invention, data is written to a free area of the memory inside the PC card in response to a command from an external computer, so that a program which could not be used conventionally can be used. An unused area such as a flash memory used as a storage area can be released to a user.

According to the second aspect of the present invention, data is written to a designated address in a memory inside the PC card in response to an address designation signal from an external computer, thereby storing a program which could not be used conventionally. An unused area such as a flash memory used as an area can be released to the user.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a diagram showing a use mode of the memory according to the first embodiment of the present invention;

FIG. 3 is a diagram illustrating a use mode of a memory according to a second embodiment of the present invention;

FIG. 4 is a block diagram of a conventional PC card.

[Explanation of symbols]

1 memory, 2 CPU control means, 3 PC card interface connector, 4 external computer,
5 PC card, 8 PC card interface circuit,
9 Registers, 10 Memory management means comprising a memory management unit.

Claims (2)

[Claims] 1. A memory for storing programs and data, control means for controlling the memory, a PC card interface connector for transferring data to and from an external computer, and a connection between the PC card interface connector and the control means. P that controls data transfer
In a PC card having a C card interface circuit, a memory management means for managing an empty area of the memory is provided, and the control means transmits the memory empty area information of the memory management means in response to a command from the external computer. A PC card for writing data in a free area of the memory by referring to the data. 2. A memory for storing programs and data, a control means for controlling the memory, a PC card interface connector for transferring data to and from an external computer, and a connection between the PC card interface connector and the control means. P that controls data transfer
In a PC card having a C card interface circuit, a memory management means for managing an address of the memory is provided, and the control means refers to address information of the memory management means in response to an address designation signal from the external computer. A PC card for writing data to a predetermined address of the memory.