JPH11281711A - Testing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a testing device in which the measurement of D.C. characteristics is not affected by a leakage current of a comparator used for determining the go/no go of a logical level. SOLUTION: A TR 11 for input buffer is connected to a DUT together with a DC measuring circuit, and output signals of the DUT are inputted to an input voltage Vin. TRs 13 and 16, resistors 21 and 22, and a constant-current circuit 34 form a differential circuit, compares an input voltage Vin with a determination reference voltage Vref, and outputs determination result output Q,'-Q to be used for determining the go/no go of the logical level of the DUT. A low constant-current circuit 31 passes a minimal current through the TR 11. A high constant-current circuit 32 passes a large enough current so that the TR 11 may respond to a high-speed signal. A current source switching circuit 33 responds to a DC measurement switching signal MS to designate the performance of either the go/no go determination of a logical level or the measurement of D.C. characteristics, connects the low constant-current circuit 31 to the emitter terminal of the TR 11 at the time of the measurement of D.C. characteristics, and connects the high constant-current circuit 32 to the emitter terminal of the TR 11 at the time of go/no go determination.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an integrated circuit (IC).
In particular, the present invention relates to a test apparatus such as an IC tester that measures the electrical characteristics of a device under test and determines the quality of the device under test. The present invention relates to a test apparatus provided with

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing a configuration of a general IC tester 1 and a DUT (device under test) 2 to be tested. FIG. 1 shows an input / output circuit part for transmitting and receiving signals to and from the DUT 2 and a DC (direct current) measurement circuit as parts related to the present invention in the configuration of the IC tester 1. Portions other than the circuit constitute an input / output circuit.

[0003] Each part of the IC tester 1 will be described below. The driver 3 is a drive circuit for applying a test pattern signal to the DUT 2. The transmission line 4 is an IC tester 1
The test pattern signal output from the driver 3 is transmitted to the input terminal of the DUT 2 and the signal output from the output terminal of the DUT 2 is transmitted to the input / output circuit of the IC tester 1 between the input / output circuit and the DUT 2. In general, a coaxial cable is often used for the transmission line 4.

[0004] The comparator 5 compares the output signal of the DUT 2 transmitted via the transmission line 4 with a judgment reference voltage Vref. The DC measurement circuit 6 is a circuit that performs DC characteristic measurement of the DUT 2 (hereinafter, referred to as “DC measurement”). The switch 7 connects the DC measurement circuit 6 and the input / output terminal of the DUT 2 via the transmission line 4 according to the DC measurement switching signal MS. The operation of each of the driver 3 and the DC measurement circuit 6 is controlled by a control circuit (not shown), and the determination reference voltage Vref and the DC measurement switching signal MS are also set from this control circuit. Then, the output of the comparator 5 is output to the control circuit, and the control circuit determines whether the logic level of the output signal from the DUT 2 is good or bad based on the output result of the comparator 5.

Next, the procedure of measurement performed by the IC tester 1 having the above configuration will be described. First, when a test other than DC measurement such as a function test is performed on the DUT 2, the DC
The switch 7 is turned off by the measurement switching signal MS. Then, the driver 3 sends a necessary test pattern signal from the transmission line 4 to the input terminal of the DUT 2 according to an instruction of the control circuit, and writes the test pattern signal. D
The UT 2 sends out an output signal corresponding to the input test pattern signal to its output terminal. The comparator 5 inputs the output signal of the DUT 2 to one end of the DUT 2 via the transmission line 4, compares the output signal with the determination reference voltage Vref, and outputs the comparison result to the control circuit. Then, the control circuit performs the DUT based on the comparison result output from the comparator 5.
2 to judge whether the logic level of the output signal is good or not.

On the other hand, when DC measurement is performed on the DUT 2, the switch 7 is switched by the DC measurement switching signal MS.
Is turned on, and the DC measurement circuit 6 and the DU
Connect the input / output terminal of T2. Next, the DC measurement circuit 6 performs DC measurement on the DUT 2 according to an instruction from the control circuit. Since the details of the above-described function test and DC measurement are all obvious to those skilled in the art, the description thereof is omitted here.

Here, a general circuit of the input stage portion of the comparator 5 is shown in FIG. In the figure, reference numerals 11 to 17 denote transistors (hereinafter abbreviated as “TR”). Hereinafter, the voltages at the base terminal, the emitter terminal, and the collector terminal of each of these TRs are referred to as VB11 to VB17,
E11 to VE17 and VC11 to VC17. The currents flowing through the base terminal, emitter terminal, and collector terminal of each TR are denoted by IB11 to IB17, IE11 to IE17, and IC11 to IC17, respectively. Further, the base-emitter voltages of each TR are VBE11 to VBE17, respectively.

On the other hand, reference numerals 18 to 22 denote resistors, each of which has a resistance value of R18 to R22, a reference voltage Vcc is a high potential power supply, a reference Vee is a low potential power supply, and an input signal Vin to the comparator 5 is shown in FIG. Is input to the comparator 5 from the transmission line 4 of FIG. This input signal Vin is applied to the base terminal of the input buffer TR11. From the emitter terminal of TR11, an emitter voltage VE11 expressed by the following equation according to the characteristics of the transistor is output. VE11 = VB11-VBE11 (1) The base voltage VB11 is equal to the voltage value of the input signal Vin.

The TR12 for the constant current circuit includes a power supply V.
A resistor 18 terminating at ee is connected to the emitter terminal, and a collector terminal is connected to the emitter terminal of TR11. Further, a bias voltage Vb1 is applied to the base terminal of TR12, and the emitter voltage IE12 and the collector current IC12 are determined by the bias voltage, so that the value of the emitter current IE11 is also determined. Here, the emitter current IE11
Is the sum of the collector current IC12 and the base current IB13, so that the following equation holds. IE11 = IC12 + IB13 (2)

In general, the base current of a transistor,
Emitter current and collector current are IB, IE, IC, respectively.
Then, a relationship expressed by the following equation is established between these currents. IC = IE-IB (3) Therefore, the voltage between both ends of the resistor 18 becomes (VE12-Ve
e), the following equation is established from the equations (2) and (3). IE11 = (VE12−Vee) / R18−IB12 + IB13 (4) The above description of TR11 to TR12 and the resistor 18 is as follows.
The same applies to TRs 14 to 15 and the resistor 19, except that the judgment reference voltage Vref is used instead of the input signal Vin. Thus, the emitter voltage VE11 becomes TR1
3 and the emitter voltage VE14 is equal to TR
It will be applied to 16 base terminals.

Here, TR13 and TR16 form a differential circuit, and the voltages VE11 and VE14 applied to the respective base terminals are compared, and one of the transistors on the side to which the higher voltage is applied is turned on. Becomes For example, the voltage VE1
If 1> voltage VE14, TR13 turns on and TR1
An emitter voltage VE13 (= VB13-VBE13) calculated according to the equation (1) appears at the emitter terminal of No.3. Further, the emitter current IE13 is determined by a constant current circuit including the TR 17 and the resistor 20, and the following relationship is established. IE13 = (VE17-Vee) / R20 = {(Vb1-VBE17) -Vee} / R20 (5)

The value of the emitter current IE13 is set to what value the voltages of the judgment result outputs "Q" and "-Q" outputted to the next stage circuit of the comparator 5 (ie, a control circuit not shown). It will be decided by. That is, the voltage value of the determination result output Q is determined by the following equation. Q = Vcc− (IE13−IB13) × R21 (6) Therefore, the bias voltage Vb1 and the resistance values R20, R21 are set so that the voltage value of the judgment result output “Q” becomes a desired value.
May be adjusted as appropriate.

When the voltage VE11 <the voltage VE14,
Instead of TR13, resistor 21, and determination result output "Q", TR16, resistor 22, and determination result output "-Q", respectively.
Will be used. As described above, in the input stage of the comparator 5, the input voltage Vin is changed to TR13 and TR16.
By comparing with the determination reference voltage Vref by the differential circuit composed of, the determination result outputs “Q” and “−Q” are obtained.

[0014]

According to the frequency characteristics of a general transistor, if the load capacity is the same, the more the current flows, the higher the frequency of the transistor can be made to operate. For this reason, in order to allow the IC tester having the above-described comparator to determine the quality of the high-speed signal, it is necessary to supply a current necessary for a desired frequency characteristic to the transistor at the input stage of the comparator 5. Therefore, a constant base current is constantly flowing through the transistor at the input stage of the comparator 5.

The base terminal of the transistor TR11 provided at the input stage of the comparator 5 is connected to the DC measuring circuit 6. Therefore, when measuring the DC characteristics of DUT2, the base current of TR11 becomes a leakage current and D
This affects the C measurement, which causes a problem that accurate DC measurement cannot be performed. The present invention has been made in view of the above points, and an object of the present invention is to provide a test apparatus in which a DC current measurement of a device under test is not affected by a leakage current of a comparator used for judging the logic level of the device under test. Is to provide.

[0016]

In order to solve the above-mentioned problems, a first aspect of the present invention is a DC characteristic measuring means for measuring a DC characteristic of a device under test, and applying a test pattern to the device under test. And a comparator for receiving an output signal of the device under test corresponding to the test pattern by an input buffer and comparing the output signal with a predetermined reference voltage by a differential circuit, and the DC device together with the DC characteristics measurement unit. And a logic level measuring means for determining whether the logic level of the device under test is good or bad based on the comparison result of the comparator, wherein the comparator is connected to the input buffer when measuring the DC characteristics. When a very small constant current is passed and the pass / fail judgment is made, it is necessary to obtain the frequency characteristics necessary for the pass / fail judgment. Is characterized by a constant current comprises a current supply means for flowing into said input buffer that.

According to a second aspect of the present invention, in the first aspect, the current supply means includes a low constant current circuit for supplying a very small constant current and a frequency characteristic required for the pass / fail judgment. In the high constant current circuit that supplies a constant current required to obtain, and in the mode of measuring the DC characteristics, the current is supplied from the low constant current circuit to the input buffer, and in the mode of performing the pass / fail determination, And a current source switching circuit for supplying a current from the high constant current circuit to the input buffer.

According to a third aspect of the present invention, in the second aspect, the low constant current circuit is inserted between a first transistor, an emitter terminal of the first transistor, and a low potential power supply. A bias voltage of the first transistor and a resistance value of the first resistor are adjusted so that a constant current flowing to the input buffer is very small. The constant current circuit has a second transistor and a second resistor inserted between the emitter terminal of the second transistor and the low potential power supply, and obtains a frequency characteristic required for the pass / fail judgment. The bias voltage of the second transistor and the resistance value of the second resistor are adjusted so that a constant current required for the current flows to the input buffer, and the current source switching circuit measures the DC characteristic or Perform pass / fail judgment Or in accordance with the mode switching signal representing the,
A switch for connecting a collector terminal of the first transistor or a collector terminal of the second transistor to the input buffer is provided.

According to a fourth aspect of the present invention, in the second aspect of the present invention, the low constant current circuit has one end connected to a low potential power supply and a very small constant current flowing to the input buffer. The high constant current circuit has one end connected to the low-potential power supply, and supplies a constant current required to obtain a frequency characteristic necessary for the pass / fail judgment to the high constant current circuit. A current source switching circuit having a collector terminal connected to the input buffer and biased at a predetermined voltage; and And a switch for connecting the other end of the first resistor or the other end of the second resistor to the emitter terminal of the transistor in accordance with a mode switching signal indicating whether to perform measurement or to perform the pass / fail determination. That It is a symptom.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. [First Embodiment] FIG. 1 is a circuit diagram showing a configuration of an input stage of a comparator 5 according to the present embodiment, and the same components as those shown in FIG. 5 are denoted by the same reference numerals. First, the low constant current circuit 31 is connected to the input buffer TR1.
This is a constant current circuit for flowing a very small amount of current to 1. On the other hand, the high constant current circuit 32 is a constant current circuit for flowing a larger current to the TR 11 than the low constant current circuit 31 so that the TR 11 can respond to a high-speed signal.

The current source switching circuit 33 connects the emitter terminal of the transistor TR11 to one of the low constant current circuit 31 and the high constant current circuit 32 in response to the DC measurement switching signal MS. That is, when the quality of the output signal of the DUT 2 is determined (hereinafter, referred to as “comparator mode”),
Connect the emitter terminal of TR11 to the high constant current circuit 32,
By allowing a large amount of current to flow through TR11, the logic level of the output signal of DUT2 can be determined at high speed.

On the other hand, when the DC measurement circuit 6 performs DC measurement on the DUT 2, the low constant current circuit 31
To minimize the base current flowing into the base terminal of the transistor TR11. By doing so, the leakage current caused by the comparator 5 becomes DC
The influence of the measurement on the measurement result can be suppressed. It should be noted that the constant current circuit 34 and the constant current circuit 35 may be constituted by circuits similar to those shown in FIG. That is, the constant current circuit 34 can be constituted by the TR 17 and the resistor 20, and the constant current circuit 35 can be constituted by the TR 15 and the resistor 19.

[Second Embodiment] FIG. 2 is a circuit diagram showing a configuration of an input stage of a comparator 5 according to the present embodiment.
The same components as those shown in FIG. 5 are denoted by the same reference numerals. This embodiment is different from the first embodiment in that the low constant current circuit 31, the high constant current circuit 32, the current source switching circuit 3
3. Each of the constant current circuits 34 to 35 is embodied.

In FIG. 2, switches 41, TR42, and a resistor 43 are added to the circuit configuration of FIG. The switch 41 has a common terminal a connected to the emitter terminal of TR11, a terminal b connected to the collector terminal of TR12, and a terminal c connected to the collector terminal of TR42. One end of the resistor 43 is terminated to the power supply Vee, and the other end is connected to the emitter terminal of the TR. The bias voltage V is applied to the base terminal of TR42.
Supply b2. At this time, the value of the bias voltage Vb2 and the resistance value of the resistor 43 are determined so that the emitter current IE11 becomes very small when the switch 41 is connected to TR11.

On the other hand, when the emitter terminal of TR11 and the collector terminal of TR12 are connected by the switch 41, how much the emitter current IE11 must be set in accordance with the frequency characteristics required for TR11. Therefore, the value of the bias voltage Vb1 and the resistance value R18 of the resistor 18 are determined accordingly.

Next, a measurement operation performed by an IC tester using the comparator 5 having the above configuration will be described. First, in the comparator mode, the common terminal a of the switch 41 is switched to the terminal b according to the DC measurement switching signal MS, and the collector terminal of TR12 is connected to the emitter terminal of TR11. Thus, the emitter current IE11 corresponding to the frequency characteristic required for the transistor TR11 can be caused to flow by the constant current circuit constituted by the transistor TR12 and the resistor 18, and the IC tester 1 can determine whether or not the high-speed signal is good. .

On the other hand, when the DC measurement circuit 6 performs DC measurement on the DUT 2, the switch 7 in FIG. 4 is turned on by the DC measurement switching signal MS. , And also to the input terminal of the comparator 5. Also,
The switch 41 in FIG. 2 has the common terminal a switched to the terminal c side by the DC measurement switching signal MS.
Is connected to the collector terminal of TR42.

Here, the base current IB11 corresponding to the leak current is calculated by the following equation, where hfe is the current amplification factor of TR11. IB11 = IE11 / (hfe + 1) (7) At this time, as described above, since the emitter current IE11 is suppressed by the bias voltage Vb2 and is very small, the value of the base current IB11 is also reduced. For this reason, the leak current at the time of DC measurement caused by the comparator 5 can be minimized, and the DU is reduced.
The DC characteristics of T2 can be accurately measured.

[Third Embodiment] FIG. 3 is a circuit diagram showing the configuration of an input stage of a comparator according to the present embodiment. The same components as those shown in FIG. 5 are denoted by the same reference numerals. . In the present embodiment, as in the second embodiment, the low constant current circuit 31 and the high constant current circuit 3 in the first embodiment are used.
2, each of the current source switching circuit 33 and the constant current circuits 34 to 35 is embodied.

In FIG. 3, a resistor 51 and a switch 52 are added to the circuit configuration of FIG. One end of the resistor 51 is terminated to the power supply Vee, and the other end is connected to the terminal c of the switch 52. The switch 52 has a common terminal a connected to the emitter terminal of the transistor TR12, a terminal b connected to a terminal of the resistor 18 on the side opposite to the power supply Vee, and
As described above, the terminal c is connected to the terminal of the resistor 51 on the side opposite to the power supply Vee.

In the comparator mode, the switch 52 switches the common terminal a to the terminal b in accordance with the DC measurement switching signal MS and terminates the emitter terminal of the TR 12 via the resistor 18 to the power supply Vee. Here, the resistance value R18, together with the voltage value of the bias voltage Vb1, is the emitter current IE11 required to obtain the frequency characteristics required for TR11.
Is determined from the value of On the other hand, at the time of DC measurement, the switch 52 switches the common terminal a to the terminal c and terminates the emitter terminal of the TR 12 to the power supply Vee via the resistor 51. At this time, the resistance value of the resistor 51 is set to a large value,
The emitter current IE11 is determined to be very small.

According to the above configuration, the measurement operation performed by the IC tester using the comparator 5 is the same as that of the second embodiment. First, in the comparator mode, the common terminal a of the switch 52 is switched to the terminal b according to the DC measurement switching signal MS, and the collector terminal of the TR 12 is connected to the resistor 18. As a result, the emitter current IE11 according to the frequency characteristic required for the TR11 can be passed, so that the quality of the high-speed signal can be determined.

On the other hand, when the DC measurement circuit 6 performs the DC measurement on the DUT 2, the DC measurement circuit 6 and the DUT 2 are connected by the switch 7 in FIG. 4, as in the second embodiment. The switch 52 shown in FIG.
Since the common terminal a is switched to the terminal c side by S, the emitter terminal of TR11 is terminated to the power supply Vee via the resistor 51. Thereby, the emitter current I
Since E11 is very small, the base current IB11 is also reduced in proportion to this. Therefore, the comparator 5
Thus, the influence of the leakage current caused by the DCT on the DC measurement can be suppressed as much as possible, and the DC characteristics of the DUT 2 can be accurately measured.

[0034]

As described above, according to the present invention,
The DC characteristic measuring means and the logic level measuring means are connected to the device under test, the output signal from the device under test corresponding to the test pattern applied by the logic level measuring means is received by the input buffer of the comparator, and the output signal and the reference voltage In the test equipment that determines the acceptability of the logic level of the device under test from the comparison result, a very small constant current is passed to the input buffer when measuring the DC characteristics, and the input is applied when the acceptability is determined. A constant current required to obtain a frequency characteristic required for the buffer is made to flow to the input buffer. Thereby, when measuring the DC characteristics of the device under test, the current flowing to the input buffer of the comparator can be suppressed to a very small value, so that the leakage current viewed from the DC characteristics measuring means can be reduced as much as possible. The influence on the measurement of the DC characteristics is eliminated, and accurate measurement can be performed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an input stage of a comparator according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of an input stage of a comparator according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of an input stage of a comparator according to a third embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional general IC tester and a DUT to be tested.

FIG. 5 is a circuit diagram showing a configuration of an input stage of a comparator according to a conventional technique.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 IC tester, 2 DUT, 3 driver, 4 transmission line, 5 comparator, 6 DC measurement circuit, 7 and 4
1, 52: switch, Vref: judgment reference signal, MS: D
C measurement switching signal, 11 to 17, 42 ... TR, 18 to 2
2, 43, 51: resistor, 31: low constant current circuit, 32:
High constant current circuit, 33 ... current source switching circuit, 34, 35 ... constant current circuit

Claims (4)

[Claims] A DC characteristic measuring unit for measuring a DC characteristic of the device under test; a driving unit for applying a test pattern to the device under test; and an input buffer for outputting an output signal of the device under test corresponding to the test pattern. And a comparator for comparing the logic level of the device under test with the DC characteristic measuring means based on the comparison result of the comparator. In the test apparatus having a logic level measuring means for performing determination, the comparator, when measuring the DC characteristics, flowing a very small constant current to the input buffer, when performing the pass / fail determination,
A test apparatus comprising: a current supply unit that supplies a constant current required for obtaining frequency characteristics necessary for the pass / fail judgment to the input buffer. 2. The current supply means includes: a low constant current circuit that supplies a very small constant current; a high constant current circuit that supplies a constant current required to obtain a frequency characteristic required for the pass / fail determination; In a mode for measuring the DC characteristics, a current source is switched so that a current is supplied from the low constant current circuit to the input buffer, and in a mode in which the pass / fail determination is performed, a current is supplied from the high constant current circuit to the input buffer. The test apparatus according to claim 1, further comprising a circuit. 3. The low constant current circuit includes a first transistor, a first resistor inserted between an emitter terminal of the first transistor and a low potential power supply, and flows to the input buffer. The bias voltage of the first transistor and the resistance value of the first resistor are adjusted so that the constant current is very small. The high constant current circuit includes a second transistor and a second transistor. And a second resistor inserted between the low-potential power supply and the emitter terminal of the second buffer so that a constant current required to obtain a frequency characteristic required for the pass / fail determination is passed to the input buffer. The bias voltage of the transistor and the resistance value of the second resistor are adjusted, and the current source switching circuit responds to the mode switching signal indicating whether to measure the DC characteristics or perform the pass / fail judgment. 1 Transis Test device according to claim 2, characterized in that it comprises a switch for connecting the collector terminal to said input buffer of the collector terminal or the second transistor. 4. The low-constant current circuit includes a first resistor having one end connected to a low-potential power supply and having a resistance value adjusted so that a constant current flowing to the input buffer is very small. The high-constant current circuit has a second end connected to the low-potential power supply and having a resistance adjusted to flow a constant current required for obtaining frequency characteristics required for the pass / fail judgment to the input buffer. The current source switching circuit has a collector terminal connected to the input buffer, a transistor biased at a predetermined voltage, and a mode switching signal indicating whether to measure the DC characteristics or perform the pass / fail judgment. 3. The test apparatus according to claim 2, further comprising a switch for connecting the other end of the first resistor or the other end of the second resistor to an emitter terminal of the transistor.