JPH11275389A - Video signal processing method and device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the video signal processing method and device capable of eliminating the degradation of display definition caused at the time of displaying a natural image on a display less in the number of display gray levels is dissolved. SOLUTION: This device is provided with an A/D converting circuit 11 for digitally converting an input video signal and a signal processing circuit 14 for processing a signal based on a prescribed function as against the output of the circuit 11 and adopting the high-order bit of a digital signal as an output video signal. The processor is also provided with a function table storage part (reverse γ correction converting ROM) 12 where plural prescribed function tables are stored and a function change-over circuit (reverse γ correction curve selection circuit) 13 for changing-over the plural function tables at every dot clock or at every line and also changing-over the change-over pattern at every field or at every frame.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a CRT (Ca
The present invention relates to a video signal processing method and apparatus used to display a television signal on a display different from a picture tube, such as a thode ray tube, and in particular, the gradation of the display is smaller than the number of output bits of A / D conversion. It belongs to the video signal processing method and device used in the case.

[0002]

2. Description of the Related Art When an input video signal (for example, a television signal or a personal computer signal) is digitally converted and then subjected to predetermined signal processing to display an image on a display, the number of bits of the digitally converted signal, for example, A / A When the number of gradations of the display is as small as 64 gradations (6 bits) for 8 bits (256 gradations) of the D conversion, the upper 6 bits of the 8 bits may be used.

When the lower 2 bits of the A / D converted 8-bit data are removed to 6 bits, the video signal device has, for example, the configuration shown in FIG. In this figure, an input video signal (RGB primary color video signal shown in FIG. 1)
Is converted into 8-bit data by the A / D converter 11 and the 8-bit data is subjected to a predetermined process (inverse γ correction process), and the 6-bit data obtained by removing the lower 2 bits of the 8-bit data after the process An image based on the input video signal is displayed using the data.

[0004] Inverse gamma correction means that when a television signal is displayed on a display (for example, a plasma display) different from a picture tube such as a CRT, the brightness characteristic is linear unlike the CRT, so that the correction according to the characteristics of the CRT is performed. Is to do.

In NTSC broadcasting, the value of γ is determined to be 2.2. Therefore, using the γ coefficient of 2.2, the input signal is weighted by the power of 2.2 from the characteristic equation, and the input digital signal is weighted. Correction curve data is determined.

The correction curve data is written in a storage medium (for example, a ROM) in advance, the digital data after A / D conversion is input to the storage medium, and the converted output is a corrected digital video signal after inverse γ correction. And

When the display to be displayed is analog, the corrected digital video signal is D / A converted,
The display is driven by the analog-converted signal to display an image based on the input video signal.

[0008] In a video signal processing apparatus which performs predetermined signal processing including gamma correction on the digital signal after the A / D conversion, and which can display the digitally converted signal on a display, bits constituting the digitally converted signal Important part of the input video signal (number of effective bits)
Conversion ROM for converting the number of bits required for display to the required number of bits, performs signal processing on the bit signal obtained by this conversion ROM, and provides the number of gradations (effective number of gradations) of the important part of the image based on the video signal Is disclosed in Japanese Patent Laid-Open No. 6-3350.
13.

A circuit for performing γ correction based on the digital signal after the A / D conversion includes a decoder and a counter for detecting a gradation level distribution state from the A / D converted digital data, and a correction pattern. It has storage means that can be switched, and switches the correction pattern according to the distribution state of the gradation level, thereby optimizing the gradation level distribution obtained as a result of the γ correction and automatically optimizing the image contrast and the like. The method is described in JP-A-6-178153.

The gamma correction curve is switched according to the external environment such as the type of input signal of the display device, the gradation distribution characteristic, the brightness of external light, etc., thereby enabling a display in which an increase in contrast and a reduction in gradation are suppressed. The method is also disclosed in JP-A-6-230.
760.

[0011]

However, the number of gradations of the display to be displayed is determined by the specifications. For example, in the case of a display of 64 gradations (6 bits, 260,000 colors) with a small number of display gradations, NTSC or the like is used. There is a problem that the display quality is reduced when displaying natural images

[0012] The reason is that in the case of 8-bit (256) A / D conversion, the converted digital data passes through the γ-correction ROM, so that the number of gradations is lost, resulting in 184 gradations. Further, in the case of a 64 gradation 260,000 color display, 8
This is because when the upper 6 bits of the bit data are used, the number of gradations is reduced to 64.

The present invention has been made in view of such a problem, and an object of the present invention is to solve the problem of deterioration in display quality seen when a natural image is displayed on a display having a small number of display gradations. It is another object of the present invention to provide a video signal processing method and apparatus that can solve the problem.

[0014]

The gist of the present invention is to provide a video signal processing method for converting an input video signal into a digital signal, performing signal processing based on a predetermined function, and using upper bits of the digital signal as an output video signal. A plurality of the predetermined functions are prepared, the plurality of functions are switched for each dot clock or line, and the switching pattern is switched for each field or each frame.

Further, the gist of the present invention is to provide an A / D conversion circuit for digitally converting an input video signal, a signal processing based on a predetermined function for an output of the A / D conversion circuit, and an upper level of the digital signal. In a video signal processing device including a signal processing circuit that uses bits as an output video signal, a function table storage unit in which a plurality of the predetermined function tables are stored, and a plurality of the function tables are switched for each dot clock or for each line. And a function switching circuit for switching the switching pattern for each field or for each frame.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a video signal processing device according to one embodiment of the present invention. In this figure, reference numeral 11 denotes an A / D converter, 14 denotes a multi-gamma correction γ correction circuit block, and the multi-gray conversion γ correction circuit block 14 includes an inverse γ correction conversion ROM 12 and an inverse γ correction curve selection circuit 13. It is composed of Inverse γ correction conversion RO
In the M12, data of two or more types of inverse γ correction curves are written in advance.

The 8-bit digital signal converted by the A / D converter 11 is connected to the lower address of the inverse γ correction conversion ROM 12. The upper 6-bit data of the 8-bit digital signal converted into predetermined data by the inverse γ correction conversion ROM 12 is used as a corrected digital video signal.

The inverse γ correction curve selection signal 15 output from the inverse γ correction curve selection circuit 13 is
It is connected to the upper address of OM12.

FIG. 2 is a detailed circuit diagram of the inverse γ correction curve selection circuit 13. Inverters 27 and 28 for making each horizontal and vertical synchronizing signal have a positive polarity, and a dot clock 29
, The horizontal synchronizing signal is divided by 1 /
The flip-flop 22 dividing the frequency by 2 and the vertical synchronizing signal to 1
/ 2, a gate 25 for taking the exclusive OR of the output of the flip-flop 22 and the output of the flip-flop 23, and an exclusive-OR gate 2
5 and an output of the flip-flop 21 by an exclusive OR operation, and a flip-flop 24 for latching the output of the gate 26.

Next, the actual operation of the video signal processing apparatus according to the present embodiment will be described with reference to FIG. The input video signal (RGB primary color video signal or PC signal) is A
The digital signal is converted into an 8-bit digital signal by the / D converter 11, and the converted 8-bit digital signal is input to the lower bit address of the inverse γ correction conversion ROM 12.

On the other hand, an inverse γ correction curve selection signal 15 output from an inverse γ correction curve selection circuit 13 is connected to the upper bit address of the inverse γ correction conversion ROM 12, and the inverse γ correction curve selection signal 15 is output in accordance with the output level of the selection signal. Inverse γ correction conversion R
Data of two or more types of inverse γ correction curves written in advance in the OM 12 are switched. The details of the data of the inverse γ correction curve written in the inverse correction conversion γ ROM 12 will be described later.

When the number of gradations of the display is as small as 64 gradations (6 bits) with respect to the 8-bit digital signal converted into the predetermined data by the inverse γ correction conversion ROM 12, the lower order of the 8-bit data is used. Digital signal conversion is performed using the upper 6-bit data excluding 2 bits, and the display is driven to display an image based on the input video signal.

Next, the operation of the inverse γ correction curve selection circuit 13 will be described with reference to FIG. The polarity of the input horizontal synchronization signal 30 is inverted by the inverter 27 (positive polarity) and is input to the clock input terminal of the flip-flop 22. Similarly, the polarity of the input vertical synchronizing signal 31 is inverted by the inverter 28 (positive polarity) and is input to the clock input terminal of the flip-flop 23. The flip-flops 22 and 23 output a signal having a frequency half of that of the input horizontal synchronizing signal 30 and the input vertical synchronizing signal 31, respectively, and the exclusive OR gate 25 combines these signals.

On the other hand, the frequency of the dot clock signal 29 is divided by half by the flip-flop 21.
A signal is synthesized from the frequency-divided output from the flip-flop 21 and the output of the exclusive OR gate 25 by the exclusive OR gate 26. The output from the exclusive OR gate 26 is finally latched by the flip-flop 24 and output.

That is, the output from the exclusive OR gate 26 by these circuits is output every dot clock, every horizontal signal (line), and every vertical signal (field or frame).
Each time it becomes a signal whose output level logic is inverted. Since this signal is connected to the upper bit address of the inverse γ correction conversion ROM 12 in FIG. 1, it is possible to switch the data of the inverse γ correction curve written in the conversion ROM for each dot clock, for each line, and for each frame (field). Can be.

Next, the inverse γ correction curve data written in the inverse γ correction conversion ROM 12 will be described with reference to FIGS. 3, 4 and 5.

For example, a plasma display (PDP) does not have a γ characteristic because its display characteristic is linear unlike a picture tube such as a CRT. Therefore, it is necessary to perform inverse γ correction according to the γ characteristics of the CRT.

The correction of inverse γ means that when the input signal level is e, e is weighted by e raised to the power of γ.
In TSC broadcasting, the value of γ is considered to be 2.2, and the image is transmitted with such correction.

Therefore, using this coefficient 2.2, and letting the output signal level be L, the characteristic equation of γ

## EQU1 ## Output data corresponding to the 8-bit digital input data is calculated from L = a * e2.2 to obtain inverse γ correction conversion ROM data.

FIG. 3 shows an 8-bit input / output characteristic after A / D conversion obtained from the characteristic equation. When the number of gradations of the display is 64 gradations (6 bits), the upper 6-bit data of the 8-bit data is used. The correction curve at this time has the input / output characteristics of FIG. 4 obtained by converting the output of FIG. 3 into 6 bits.

The reason why the input / output characteristics of the correction curve in the figure are one-to-one after the input signal level 230 is to prevent the signal from being saturated in a bright scene of an image and to cope with an irregular signal. 10 to the input level of the A / D converter
This is because a margin of% is provided.

FIG. 5 is an enlarged view of the portion from 0 to 128 in FIG. In the figure, a standard correction curve obtained from the characteristic equation of γ, a curve that complements the gradation at a low luminance level (0 to 127) with respect to the curve
That is, each input level for increasing the output by one step is set to 7
This is the same level as the rising edge of the bit.

The values of the data in FIGS. 3, 4 and 5 are shown in FIGS.
This is shown in the table of FIG. 6 to 9, X is 8 after A / D conversion.
Bit data, Y, is 8-bit data after inverse γ correction. Data using the upper 7 bits of the 8-bit data is Y1, and data using the upper 6 bits is Y3.
This data Y3 corresponds to the curve in FIG. The Y2 data is such that the displacement point when the input X is 0 to 128 is equal to Y1 and the output value at that time is equal to Y3. So-called 7-bit data is employed at a low luminance level in a pseudo manner (complementation). 6 bit data. This data Y2
Corresponds to the curve in FIG.

The low luminance level is complemented by the curve in this case because the gradation is often lost due to the inverse γ correction at the low luminance level, and the change in luminance due to switching is less noticeable. To do that.

By switching between these two curves (and), the number of output gradations when the input is from 0 to 127 is doubled to 32 (16 + 16: corresponding to 7 bits), so that 80 gradations as a whole ( 64 + 16).

Next, an example of an output from the video signal processing device according to the present embodiment will be described with reference to FIGS.
FIGS. 10 and 11 illustrate a portion (6 × 6) of the pixels constituting one screen, and the numbers in the upper part outside the grid indicate the input levels when performing A / D conversion.
The numbers in each grid represent the curve data of FIG. 5 (data Y3 in FIGS. 6 to 9), and the numbers in circles represent the data of the curve in FIG. 5 (data Y2 in FIGS. 6 to 9). ).

FIG. 10A shows the output when only the curve shown in FIG. 5 is used, and FIG. 10B shows the output when only the curve shown in FIG. 5 is used. FIG. 10C is an example of a digital signal output from the inverse γ correction conversion ROM 12 when the inverse γ correction curve is switched for each dot clock and for each line by the inverse γ correction curve selection circuit 13. 9D is an example of an output digital signal in a frame different from that in FIG. 9C. As a result, an output digital signal as shown in FIG. 11 is obtained by performing the inter-frame correction. It can be seen that this data corresponds to the 7-bit data Y1 shown in FIGS.

Therefore, according to the video signal processing apparatus of the present embodiment, after the input video signal (RGB primary color video signal or personal computer signal) is converted into a digital signal, it is subjected to predetermined signal processing (inverse γ correction) to display the image. When displaying on
The number of bits of the digitally converted signal, for example, A / D
When the number of gradations of the display is as small as 64 gradations (6 bits) for 8 bits (256 gradations) of conversion,
By switching a specific inverse γ correction curve for each adjacent dot clock, for each line, for each field, or for each frame, the number of gradations is apparently increased, and the image quality is improved.

The correction curve is a curve that complements the gradation on the low luminance side, and the selection is made by performing a + correction and a − correction on the staggered grid array pattern for each dot clock and line for each field or frame. Since the switching is performed, there is an effect that the fixed pattern noise hardly occurs on the screen.

That is, if the two curves shown in FIG. 5 are switched only for each frame, a flicker occurs (corresponding to the case where FIGS. 10A and 10B are alternately output for each frame). If switching is performed only for each clock and for each line, fixed noise with a deteriorated S / N is likely to occur (corresponding to output of only FIG. 10C or FIG. 10D). Therefore, even if these are combined, the noise is not fixed. As such, they are temporally and spatially diffuse. In other words, this is a kind of error diffusion or dither, which means that the noise increases the apparent gradation.

In addition, since the gradation characteristic on the low luminance side is mainly changed so that the correction curve on the high luminance side is not changed, an extremely unnatural image is prevented. Moreover, since there are many data missing on the low luminance side due to the inverse γ correction, the effect of improving the image quality by complementing the gradation on the low luminance side is great.

Furthermore, it is possible to provide an effect similar to error diffusion with a relatively simple circuit without using an expensive and complicated circuit such as an error diffusion processing LSI.
There is also an effect that the resolution can be increased without increasing the number of bits (resolution) of the A / D conversion circuit.

In the present embodiment, the present invention is not limited to the above-described video signal processing circuit, but can be applied to a circuit suitable for applying the present invention.

That is, in the above-described embodiment, the case where the number of gradations of the display is 64 gradations (6 bits) is described as an example. However, when the number of gradations of the display increases, such as 256 gradations (8 bits). Has the same effect.

The selection of the correction curve has been described in connection with the case where the staggered grid arrangement pattern for each dot clock and each line is switched between + correction and-correction on a field or frame basis. Switching may be performed by some combinations.

Regarding the type of the correction curve, a low luminance level (0 to 12) is used for the standard inverse γ correction curve shown in FIG.
In 7), each input level for increasing the output by one step is set to 7
The same level as the rise at the bit (Fig. 4,
5) is described in the above embodiment, but the input level of one step changes according to the number of gradations of the display to be displayed.

There are many possible types of these inverse γ correction curves, such as pseudo-standard curves when synthesized by switching. As an example, a curve such as that shown in FIG. 5 when two curves are combined,
A curve in which the displacement point is changed to three or more and the curve is switched, and a curve in which the above-described pseudo 7-bit curve is applied to an arbitrary level according to an image to be displayed as well as a low-luminance side, and the like. Further, in the above-described embodiment, the curve is described so as to complement the gradation with respect to the low luminance level. However, a curve on which the same correction is performed may be used on the high luminance side.

The number, position, shape, and the like of the above-mentioned constituent members are not limited to the above-described embodiment, but can be set to a number, position, shape, and the like suitable for carrying out the present invention. In the drawings, the same components are denoted by the same reference numerals.

[0049]

Since the present invention is constructed as described above, a video signal processing method and apparatus for solving the problem of deterioration of display quality seen when a natural image is displayed on a display having a small number of display gradations. Can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a video signal processing device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration of an inverse γ correction curve selection circuit.

FIG. 3 is an input / output characteristic diagram of an 8-bit inverse γ correction curve.

FIG. 4 is an input / output characteristic diagram of an inverse γ correction curve according to an embodiment.

FIG. 5 is a partially enlarged view of FIG. 4;

FIG. 6 is a diagram showing data of FIGS. 3, 4 and 5;

FIG. 7 is a view similar to FIG. 6;

FIG. 8 is a view similar to FIG. 6;

FIG. 9 is a view similar to FIG. 7;

FIG. 10 is a diagram for explaining an output of the video signal processing device according to the embodiment.

FIG. 11 is a view similar to FIG. 10;

[Explanation of symbols]

 Reference Signs List 11 A / D converter 12 Inverse γ correction conversion ROM 13 Inverse γ correction curve selection circuit 14 Multi-gradation inverse γ correction circuit

Claims (6)

[Claims] 1. A video signal processing method for converting an input video signal into a digital signal, performing signal processing based on a predetermined function, and using upper bits of the digital signal as an output video signal, wherein a plurality of the predetermined functions are prepared. A video signal processing method, wherein the plurality of functions are switched every dot clock or every line, and this switching pattern is switched every field or every frame. 2. The video signal processing method according to claim 1, wherein the predetermined function is an inverse γ correction function. 3. The predetermined function includes an inverse γ correction function corresponding to the number of bits of a digital conversion output, and a complementary inverse γ correction function that complements gradation at a low luminance level of the inverse γ correction function. 3. The video signal processing method according to claim 2, wherein 4. An A / D converter for converting an input video signal into a digital signal.
A video signal processing device comprising: a D conversion circuit; and a signal processing circuit that performs signal processing based on a predetermined function on an output of the A / D conversion circuit and uses the upper bits of the digital signal as an output video signal. A function table storage unit in which a plurality of predetermined function tables are stored, and a function switching circuit that switches the plurality of function tables for each dot clock or line and switches this switching pattern for each field or each frame. Video signal processing device. 5. The video signal processing device according to claim 4, wherein said predetermined function table is an inverse γ correction function table. 6. The predetermined function table includes an inverse γ correction function table corresponding to the number of output bits of the digital conversion circuit, and a complementary inverse γ correction function that complements gradation at a low luminance level of the inverse γ correction function table. The video signal processing device according to claim 5, further comprising a table.