JPH11274238A - Structure and method for mounting electronic component - Google Patents

Structure and method for mounting electronic component

Info

Publication number
JPH11274238A
JPH11274238A JP7567498A JP7567498A JPH11274238A JP H11274238 A JPH11274238 A JP H11274238A JP 7567498 A JP7567498 A JP 7567498A JP 7567498 A JP7567498 A JP 7567498A JP H11274238 A JPH11274238 A JP H11274238A
Authority
JP
Japan
Prior art keywords
adhesive
electronic component
sheet
plastic film
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7567498A
Other languages
Japanese (ja)
Inventor
Yusuke Watanabe
雄介 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP7567498A priority Critical patent/JPH11274238A/en
Publication of JPH11274238A publication Critical patent/JPH11274238A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Abstract

PROBLEM TO BE SOLVED: To provide structure and a method for mounting electronic component, with which a substrate and an electronic component are easily aligned and reliability is improved. SOLUTION: Conductor patterns 2, 3, 4 and 5 are formed on the upper surface of a plastic film 1 and pads 6, 7, 8 and 9 are formed at the terminal parts. Bumps 12, 13, 14 and 15 are formed on the lower surface of a flip chip 10 and connected with pads 6-9 of the conductor patterns 2-5. A sheet-shaped adhesive agent 16 is arranged between the area, where the conductor patterns 2-5 are absent, on the upper surface of the plastic film 1 and the area, where the bumps 12-15 are absent, on the lower surface of the flip chip 10 and the plastic film 1 and the flip chip 10 are adhered by this adhesive agent 16.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、電子部品の実装
に係り、詳しくは、例えば、ICカード、リモートカー
ド、カード電卓、カードラジオ等の電子製品に搭載する
ICチップ等の電子部品の実装に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the mounting of electronic components, and more particularly, to the mounting of electronic components such as IC chips mounted on electronic products such as IC cards, remote cards, card calculators and card radios. Things.

【0002】[0002]

【従来の技術】近年、企業のセキュリティ管理、航空手
荷物等の物流管理やJR、私鉄の通勤・通学のための定
期券等に、ICカード等が普及しつつある。このICカ
ードへのICチップの実装方法の一つに軽薄短小、高密
度化に適したフリップチップ実装方式が適用されてい
る。
2. Description of the Related Art In recent years, IC cards and the like have become widespread for security management of companies, logistics management of air baggage, etc., commuter passes of JR and private railways, and so on. As one of the methods for mounting an IC chip on this IC card, a flip chip mounting method suitable for lightness, shortness, small size, and high density is applied.

【0003】ここでフリップチップ実装方式とは、以下
のようなものである。図6,7に示すように、基板とし
てはプラスチックフィルム(例えばPETフィルム)2
0を用い、その上面にアンテナ及び電子回路部の配線と
なる導体パターン21が形成されている。導体パターン
21として、Agペーストや(Ag+C)ペースト等の
導電性ペーストが用いられる。一方、シリコンチップ2
2の下面にはバンプ(突起電極)23が設けられてい
る。実装の際には、プラスチックフィルム20の上面に
異方性導電フィルム24を配置する。この異方性導電フ
ィルム24は、絶縁性接着樹脂材料24aに導電性粒子
24bを散在したものである。そして、プラスチックフ
ィルム20の上面に異方性導電フィルム24を介してシ
リコンチップ22を、図8,9に示すように押し当て、
荷重Fを加えながら熱により異方性導電フィルム24を
硬化してプラスチックフィルム20の上面にシリコンチ
ップ22を実装する。
Here, the flip-chip mounting method is as follows. As shown in FIGS. 6 and 7, a plastic film (eg, PET film) 2 is used as a substrate.
The conductor pattern 21 serving as a wiring for the antenna and the electronic circuit portion is formed on the upper surface of the substrate. As the conductive pattern 21, a conductive paste such as an Ag paste or an (Ag + C) paste is used. On the other hand, silicon chip 2
A bump (projection electrode) 23 is provided on the lower surface of 2. At the time of mounting, the anisotropic conductive film 24 is arranged on the upper surface of the plastic film 20. The anisotropic conductive film 24 is obtained by dispersing conductive particles 24b on an insulating adhesive resin material 24a. Then, the silicon chip 22 is pressed on the upper surface of the plastic film 20 via the anisotropic conductive film 24 as shown in FIGS.
The silicon chip 22 is mounted on the upper surface of the plastic film 20 by curing the anisotropic conductive film 24 by heat while applying the load F.

【0004】しかし、異方性導電フィルム24は、図
6,7に示すように導体パターン21のパッド21a上
にも貼り付ける必要があった。このため、シリコンチッ
プ22とパッド21aを位置合わせする際、パッド21
a上に異方性導電フィルム24が存在するために、パッ
ド部分が見にくくなり、位置合わせすることが困難な場
合があった。
However, the anisotropic conductive film 24 needs to be attached also on the pad 21a of the conductive pattern 21, as shown in FIGS. Therefore, when aligning the silicon chip 22 with the pad 21a, the pad 21
Since the anisotropic conductive film 24 is present on a, the pad portion is difficult to see, and it may be difficult to perform positioning.

【0005】また、異方性導電フィルム24の貼付領域
は、シリコンチップ22の全体を包含しているために、
図8,9に示すように、異方性導電フィルム24の樹脂
成分24aが、導体パターン21とバンプ23との間に
介在する状態となり、信頼性が悪くなるという懸念もあ
る。
Further, since the area where the anisotropic conductive film 24 is attached covers the entire silicon chip 22,
As shown in FIGS. 8 and 9, there is a concern that the resin component 24 a of the anisotropic conductive film 24 is interposed between the conductor pattern 21 and the bump 23, and the reliability is deteriorated.

【0006】さらに、図8,9に示すように、異方性導
電フィルム24の貼付領域は、チップ22の全体を包含
しているために、シリコンチップ22を実装する際、付
加された荷重Fと熱により異方性導電フィルム24がシ
リコンチップ22からはみ出し、導体パターン21を覆
う状態になる。この状態で耐久試験を実施した場合、導
体パターン21を覆った異方性導電フィルム24と他の
部材との界面(図9でXにて示す箇所)で応力が発生し
導体パターン21が断線してしまうという問題が発生し
た。
[0008] Further, as shown in FIGS. 8 and 9, the area to which the anisotropic conductive film 24 is attached covers the entire chip 22. The heat causes the anisotropic conductive film 24 to protrude from the silicon chip 22 and to cover the conductive pattern 21. When a durability test is performed in this state, stress is generated at the interface between the anisotropic conductive film 24 covering the conductor pattern 21 and another member (the location indicated by X in FIG. 9), and the conductor pattern 21 is disconnected. A problem occurred.

【0007】一方、特開昭58−197793号公報、
実開平5−33572号公報では、電子部品と基板とを
結合する接合部分以外の領域に、接着剤をディスペンサ
もしくは印刷で塗布することで、結合強度の増大した電
子部品の取り付け構造としている。
On the other hand, Japanese Patent Application Laid-Open No. 58-197793,
In Japanese Unexamined Utility Model Publication No. Hei 5-33572, an adhesive is applied to a region other than a joining portion for joining an electronic component and a substrate by a dispenser or printing, thereby providing an electronic component mounting structure with an increased joining strength.

【0008】しかし、この方法では、接着剤が液状であ
ることで、接着剤を塗布し、チップと基板とを接合する
際に導体パターン(配線)に被ってしまう場合もあり、
上述の問題点を解決することはできない。また、液状の
接着剤を用いると接着剤の流れ出し等を防止するため
に、基板をダム構造にしなければならないし、又、他の
部分への付着等の問題も解決しなければならない。さら
に、接着剤塗布における工程の問題、例えばディスペン
サの洗浄、交換等の問題、印刷の場合であるとスクリー
ンマスクの洗浄、交換の問題が出てくる。
However, in this method, since the adhesive is in a liquid state, the adhesive may be applied to cover the conductor pattern (wiring) when the chip and the substrate are joined.
The above problems cannot be solved. In addition, when a liquid adhesive is used, the substrate must have a dam structure in order to prevent the adhesive from flowing out, and problems such as adhesion to other parts must be solved. In addition, there is a problem in the process of applying the adhesive, for example, a problem of cleaning and replacement of the dispenser, and a problem of cleaning and replacement of the screen mask in the case of printing.

【0009】[0009]

【発明が解決しようとする課題】そこで、この発明の目
的は、基板と電子部品の位置合わせが容易であるととも
に信頼性の高い電子部品の実装構造および電子部品の実
装方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a mounting structure of an electronic component and a method of mounting the electronic component, which can easily align the substrate and the electronic component and have high reliability. .

【0010】[0010]

【課題を解決するための手段】請求項1に記載の電子部
品の実装構造は、基板の上面における導体パターンの無
い領域と電子部品の下面における電極の無い領域との間
に配置され、基板と電子部品とを接着するシート状の接
着剤を備えたことを特徴としている。
According to a first aspect of the present invention, there is provided a mounting structure for an electronic component, which is disposed between a region having no conductive pattern on the upper surface of the substrate and a region having no electrode on the lower surface of the electronic component. It is characterized in that a sheet-like adhesive for bonding the electronic component is provided.

【0011】つまり、請求項2に記載の実装方法のよう
に、基板の上面における導体パターンの無い領域と電子
部品の下面における電極の無い領域との間に、硬化前の
シート状の接着剤を配置した状態で、基板の上面に形成
された導体パターンと電子部品の下面に形成した電極と
を接触させ、引き続き、シート状の接着剤の硬化を行い
基板と電子部品とを接着する。
That is, as in the mounting method according to the second aspect, a sheet-like adhesive before curing is applied between a region on the upper surface of the substrate where no conductor pattern is present and a region on the lower surface of the electronic component where there is no electrode. In the arranged state, the conductive pattern formed on the upper surface of the substrate and the electrode formed on the lower surface of the electronic component are brought into contact with each other, and then the adhesive in the form of a sheet is cured to bond the substrate and the electronic component.

【0012】よって、基板もしくは電子部品の所望の場
所にシート状の接着剤を貼り付けて圧着するだけなの
で、非常に作りやすいものとなる。つまり、液状の接着
剤と比較して、段取り・後処理(加工治具の交換・洗
浄)等の必要が無く非常に作りやすい工程にすることが
できる。
[0012] Therefore, since it is only necessary to apply a sheet-like adhesive to a desired place of the substrate or the electronic component and press-fit it, it is very easy to make. In other words, compared to a liquid adhesive, it is possible to make the process very easy because there is no need for setup and post-processing (replacement and cleaning of processing jigs).

【0013】また、接着剤が電極と導体パターンとの間
に存在しないために、電気的接続に関し信頼性の高い電
子部品の実装が可能となる。さらに、接着剤が電子部品
全域に存在しないために、接着剤の樹脂部分と他の部材
との界面で応力が発生し導体パターンが断線してしまう
ことが回避される。
Further, since the adhesive does not exist between the electrode and the conductor pattern, it is possible to mount an electronic component with high reliability in electrical connection. Further, since the adhesive does not exist in the entire area of the electronic component, it is possible to avoid the occurrence of stress at the interface between the resin part of the adhesive and another member, and the disconnection of the conductor pattern.

【0014】また、接着剤が導体パターンに被らないた
めに、組み付け時の基板と電子部品の位置合わせが容易
になる。ここで、請求項3に記載のように、電子部品の
実装方法として、基板の上面に硬化前のシート状の接着
剤を貼り付けた状態から導体パターンと電極とを接触さ
せてもよい。
Further, since the adhesive does not cover the conductive pattern, the positioning of the board and the electronic component during assembly becomes easy. Here, as a third aspect of the present invention, as a method for mounting the electronic component, the conductive pattern and the electrode may be brought into contact with each other from a state where a sheet-like adhesive before curing is attached to the upper surface of the substrate.

【0015】あるいは、請求項4に記載のように、電子
部品の実装方法として、電子部品の下面に硬化前のシー
ト状の接着剤を貼り付けた状態から導体パターンと電極
とを接触させてもよい。
Alternatively, as a fourth aspect of the present invention, as a method for mounting an electronic component, the conductive pattern and the electrode may be brought into contact with each other after the uncured sheet-like adhesive is attached to the lower surface of the electronic component. Good.

【0016】[0016]

【発明の実施の形態】以下、この発明を具体化した実施
の形態を図面に従って説明する。本実施形態は、対象製
品であるICカードにおけるフリップチップ実装に適用
している。
Embodiments of the present invention will be described below with reference to the drawings. The present embodiment is applied to flip chip mounting on an IC card as a target product.

【0017】図1は全体構成を示す平面図であり、図2
には図1のA−A断面図を示す。基板としてプラスチッ
クフィルム(例えば、PETフィルム)1を用いてい
る。プラスチックフィルム1の上面には、アンテナ及び
電子回路部の配線となる導体パターン2,3,4,5が
形成され、導体パターン2,3,4,5の端部には円形
のパッド6,7,8,9が形成されている。この導体パ
ターン2,3,4,5はプラスチックフィルム1の上面
にペーストを印刷することにより配置したものである。
ここで、ペーストにはAgペースト、Cuペースト、C
ペースト等が用いられる。導体パターン2,3,4,5
の厚さは10〜20μmである。
FIG. 1 is a plan view showing the entire structure, and FIG.
1 shows a sectional view taken along the line AA of FIG. A plastic film (for example, PET film) 1 is used as a substrate. On the upper surface of the plastic film 1, conductor patterns 2, 3, 4, and 5 serving as wiring for an antenna and an electronic circuit portion are formed, and circular pads 6, 7 are provided at ends of the conductor patterns 2, 3, 4, and 5, respectively. , 8, 9 are formed. The conductor patterns 2, 3, 4, and 5 are arranged by printing a paste on the upper surface of the plastic film 1.
Here, Ag paste, Cu paste, C
Paste or the like is used. Conductor patterns 2, 3, 4, 5
Has a thickness of 10 to 20 μm.

【0018】なお、ペーストの他にも、Cu薄膜やAu
薄膜を所望の位置に形成することにより導体パターン
2,3,4,5としてもよい。一方、実装される電子部
品としてのフリップチップ10において、シリコンチッ
プ(ICチップ)11の下面にはバンプ(突起電極)1
2,13,14,15が形成されている。バンプ12,
13,14,15は、例えば、Cu、Ag等よりなり、
径が50〜300μmであり、高さが30〜100μm
の柱状もしくはきのこ状のバンプである。このバンプ1
2,13,14,15は、導体パターン2,3,4,5
のパッド6,7,8,9の中に僅かに食い込んでいる。
食い込み量は、5〜10μm程度である。
In addition to the paste, a Cu thin film or Au
The conductive patterns 2, 3, 4, and 5 may be formed by forming a thin film at a desired position. On the other hand, in a flip chip 10 as an electronic component to be mounted, a bump (projection electrode) 1 is provided on the lower surface of a silicon chip (IC chip) 11.
2, 13, 14, and 15 are formed. Bump 12,
13, 14, 15 are made of, for example, Cu, Ag, or the like;
Diameter is 50-300 μm and height is 30-100 μm
Column-shaped or mushroom-shaped bumps. This bump 1
2, 13, 14, 15 are conductor patterns 2, 3, 4, 5
Slightly penetrate into the pads 6,7,8,9.
The bite amount is about 5 to 10 μm.

【0019】プラスチックフィルム1の上面とフリップ
チップ10の下面の間には、長方形状をなすシート状
(フィルム状)の接着剤16が配置されている。詳しく
は、長方形のシート状の接着剤16は、熱硬化性接着剤
よりなり、プラスチックフィルム1の上面における導体
パターン2,3,4,5の無い領域とフリップチップ1
0の下面におけるバンプ12,13,14,15の無い
領域との間に配置されている。このシート状の接着剤1
6によりプラスチックフィルム1とフリップチップ10
とが接着されている。
Between the upper surface of the plastic film 1 and the lower surface of the flip chip 10, a rectangular sheet-like (film-like) adhesive 16 is arranged. Specifically, the rectangular sheet-like adhesive 16 is made of a thermosetting adhesive, and the area of the upper surface of the plastic film 1 where the conductor patterns 2, 3, 4, 5 are not provided and the flip chip 1
It is arranged between the lower surface of the "0" and the region where the bumps 12, 13, 14, 15 are not provided. This sheet-like adhesive 1
6, plastic film 1 and flip chip 10
And are glued.

【0020】よって、バンプ12,13,14,15と
導体パターン2,3,4,5の間には何も介在されない
状態でバンプ12〜15とパッド6〜9が電気的に接続
されている。以下、シート状の接着剤16を「接着シー
ト」という。
Therefore, the bumps 12 to 15 and the pads 6 to 9 are electrically connected without any intervening between the bumps 12, 13, 14, 15 and the conductor patterns 2, 3, 4, 5. . Hereinafter, the sheet-like adhesive 16 is referred to as an “adhesive sheet”.

【0021】次に、フリップチップ10の実装方法を説
明する。図3,4に示すように、上面に導体パターン
2,3,4,5を形成したプラスチックフィルム(PE
Tフィルム)1を用意する。また、シリコンチップ11
の下面にバンプ12,13,14,15を設けたフリッ
プチップ10を用意する。そして、プラスチックフィル
ム1の上面における導体パターン2,3,4,5の無い
領域に硬化前の接着シート16’を貼り付ける。この接
着シート16’は、固形化され、自由に流れ動くことは
ない。よって、ピンセット等を用いて長方形の接着シー
ト16’をプラスチックフィルム1の上面における所望
の位置に貼り付けることができ、接着シート16’の貼
付作業は接着シート自体が粘着性があるため容易であ
る。
Next, a method of mounting the flip chip 10 will be described. As shown in FIGS. 3 and 4, a plastic film (PE) having conductor patterns 2, 3, 4, 5 formed on the upper surface thereof
T film) 1 is prepared. In addition, the silicon chip 11
A flip chip 10 having bumps 12, 13, 14, 15 provided on the lower surface of the chip is prepared. Then, an uncured adhesive sheet 16 ′ is attached to a region of the upper surface of the plastic film 1 where the conductor patterns 2, 3, 4, and 5 do not exist. This adhesive sheet 16 'is solidified and does not flow freely. Therefore, the rectangular adhesive sheet 16 ′ can be attached to a desired position on the upper surface of the plastic film 1 using tweezers or the like, and the attaching operation of the adhesive sheet 16 ′ is easy because the adhesive sheet itself has adhesiveness. .

【0022】さらに、図1,2に示すように、プラスチ
ックフィルム1の上にフリップチップ10を位置合わせ
して、導体パターン2,3,4,5のパッド6,7,
8,9とフリップチップ10のバンプ12,13,1
4,15とを接触させる。
Further, as shown in FIGS. 1 and 2, the flip chip 10 is positioned on the plastic film 1 and the pads 6, 7, and 4 of the conductor patterns 2, 3, 4, and 5 are aligned.
8, 9 and bumps 12, 13, 1 of flip chip 10
4, 15 are brought into contact.

【0023】このプラスチックフィルム1とフリップチ
ップ10とを位置合わせする際において、接着シート1
6’が導体パターン2,3,4,5のパッド6,7,
8,9上には無いため、パッド6,7,8,9の部分が
見やすい。よって、フリップチップ10とパッド6,
7,8,9を位置合わせを容易に行うことができる。
When positioning the plastic film 1 and the flip chip 10, the adhesive sheet 1
6 'is the pad 6,7, of the conductor pattern 2,3,4,5
Since they are not located on the positions 8, 9, the pads 6, 7, 8, 9 are easy to see. Therefore, flip chip 10 and pad 6,
7, 8, and 9 can be easily positioned.

【0024】引き続き、治具によりフリップチップ10
を下方に加圧しつつ加熱する。より具体的には、例え
ば、温度150〜200℃°で、時間15〜30秒、加
圧力50〜150MPaで加圧・加熱する。
Subsequently, the flip chip 10 is
Is heated while pressing downward. More specifically, for example, pressure and heat are applied at a temperature of 150 to 200 ° C., a time of 15 to 30 seconds, and a pressure of 50 to 150 MPa.

【0025】このようにして接着シート16’の硬化を
行い、プラスチックフィルム1とフリップチップ10と
を接着させる。この圧着工程(硬化工程)において、付
加された荷重と熱により接着剤16がフリップチップ1
0からはみ出すことが無く、導体パターン2,3,4,
5に接着シート16が被らない。そのために、接着剤1
6と他の部材との界面で応力が発生し電子回路部の配線
が断線してしまうという不具合は発生しない。
In this way, the adhesive sheet 16 ′ is cured, and the plastic film 1 and the flip chip 10 are bonded. In the pressure bonding step (curing step), the adhesive 16 is applied to the flip chip 1 by the applied load and heat.
Without protruding from 0, conductor patterns 2, 3, 4,
5 does not cover the adhesive sheet 16. For that purpose, adhesive 1
There is no problem that stress is generated at the interface between 6 and another member and the wiring of the electronic circuit section is disconnected.

【0026】このようにしてプリップチップ実装された
ICカードにおいては、接着剤16がバンプ12,1
3,14,15と導体パターン2,3,4,5の間に存
在しない。そのため、信頼性が悪くなるという懸念もな
くなる。
In the IC card thus mounted on the flip chip, the adhesive 16 is applied to the bumps 12 and 1.
3, 3, and 15 are not present between the conductor patterns 2, 3, 4, and 5. Therefore, there is no fear that the reliability will be deteriorated.

【0027】また、特開昭58−197793号公報、
実開平5−33572号公報のように、接着剤として液
状のものを用いると、接着剤の塗布後におけるチップと
基板との接合の際に導体パターン(配線)に被ってしま
ったり、接着剤の流れ出し防止用のダムを基板に設ける
必要があったり、他の部分への付着の回避策を講じた
り、接着剤塗布においてディスペンサやスクリーンマス
クの洗浄・交換が必要であるといった問題があるが、本
例では、固形化された接着シート16’を用いて実装す
ることにより、これらの問題を解消することができる。
Also, Japanese Patent Application Laid-Open No. 58-197793,
As disclosed in Japanese Utility Model Application Laid-Open No. 5-33572, when a liquid adhesive is used, a conductive pattern (wiring) may be covered when joining the chip and the substrate after the adhesive is applied, or the adhesive may be used. There are problems such as the need to provide a dam on the substrate to prevent run-off, taking measures to avoid adhesion to other parts, and the necessity of cleaning and replacing the dispenser and screen mask when applying adhesive. In the example, these problems can be solved by mounting using the solidified adhesive sheet 16 '.

【0028】このように本実施の形態は、下記の特徴を
有する。 (イ)フリップチップ実装構造として、プラスチックフ
ィルム1の上面における導体パターン2,3,4,5の
無い領域とフリップチップ10の下面におけるバンプ1
2,13,14,15の無い領域との間に、接着シート
(シート状の接着剤)16を配置してプラスチックフィ
ルム1とフリップチップ10とを接着した。つまり、フ
リップチップ実装方法として、プラスチックフィルム1
の上面における導体パターン2,3,4,5の無い領域
とフリップチップ10の下面におけるバンプ12,1
3,14,15の無い領域との間に、硬化前の接着シー
ト(シート状の接着剤)16’を配置した状態で、プラ
スチックフィルム1の上面に形成された導体パターン
2,3,4,5とフリップチップ10の下面に形成した
バンプ12,13,14,15とを接触させ、引き続
き、接着シート16’の硬化を行いプラスチックフィル
ム1とフリップチップ10とを接着した。
As described above, this embodiment has the following features. (A) As a flip-chip mounting structure, a region on the upper surface of the plastic film 1 where the conductor patterns 2, 3, 4, and 5 do not exist, and a bump 1 on the lower surface of the flip chip 10
An adhesive sheet (sheet-like adhesive) 16 was arranged between the areas without 2, 13, 14, and 15 to bond the plastic film 1 and the flip chip 10 together. That is, the plastic film 1 is used as a flip chip mounting method.
And the bumps 12 and 1 on the bottom surface of the flip chip
The conductor patterns 2, 3, 4, formed on the upper surface of the plastic film 1 in a state in which the uncured adhesive sheet (sheet-like adhesive) 16 'is arranged between the regions where there is no 3, 14, 15 5 and the bumps 12, 13, 14, and 15 formed on the lower surface of the flip chip 10 were brought into contact with each other, and then the adhesive sheet 16 'was cured to bond the plastic film 1 and the flip chip 10.

【0029】よって、プラスチックフィルム1の所望の
場所に接着シート(16’)を貼り付けて圧着するだけ
なので、非常に作りやすいものとなる。つまり、液状の
接着剤と比較して、段取り・後処理(加工治具の交換・
洗浄)等の必要が無く非常に作りやすい工程にすること
ができる。
Therefore, since the adhesive sheet (16 ') is simply stuck to a desired place of the plastic film 1 and pressed, it is very easy to make. In other words, compared to liquid adhesive, setup and post-processing (replacement of processing jig,
(E.g., washing), and the process can be made very easy.

【0030】また、接着剤(16)がバンプ12,1
3,14,15と導体パターン2,3,4,5との間に
存在しないために、電気的接続に関し信頼性の高いフリ
ップチップ実装が可能となる。つまり、冷熱サイクル等
により引き起こされる接続抵抗の増大を防止することが
できる。
Further, the adhesive (16) is applied to the bumps 12,1.
Since there is no space between the conductor patterns 3, 14, 15 and the conductor patterns 2, 3, 4, 5, flip-chip mounting with high reliability in electrical connection is possible. That is, it is possible to prevent an increase in connection resistance caused by a cooling / heating cycle or the like.

【0031】さらに、接着剤(16)がチップ全域に存
在しないために接着剤(16)の樹脂部分と他の部材と
の界面で応力が発生し導体パターン2,3,4,5が断
線してしまうことが回避される。
Further, since the adhesive (16) does not exist in the whole area of the chip, stress is generated at the interface between the resin portion of the adhesive (16) and another member, and the conductor patterns (2, 3, 4, 5) are disconnected. Is avoided.

【0032】また、接着剤(16)が導体パターン2,
3,4,5に被らないために組み付け時のプラスチック
フィルム1とチップ10の位置合わせが容易になる。 (ロ)フリップチップ実装方法として、プラスチックフ
ィルム1の上面に硬化前の接着シート16’を貼り付け
た状態から導体パターン2,3,4,5とバンプ12,
13,14,15とを接触させたので、実用上好ましい
ものとなる。
The adhesive (16) is used for the conductor pattern 2,
Since the plastic film 1 and the chip 10 are not covered with 3, 4, and 5, the positioning of the plastic film 1 and the chip 10 at the time of assembly becomes easy. (B) As a flip-chip mounting method, the conductor patterns 2, 3, 4, 5 and the bumps 12,
13, 14, and 15 are brought into contact with each other, which is practically preferable.

【0033】これまで説明してきた実施の形態以外に
も、下記のように実施してもよい。接着シート16は、
図4のようにプラスチックフィルム1上に予め貼り付け
しておく以外にも、図5のように、フリップチップ10
に予め貼り付けしておいてもよい。つまり、フリップチ
ップ10の下面に硬化前のシート状の接着剤16’を貼
り付けた状態から導体パターン2,3,4,5とバンプ
12,13,14,15とを接触させるようにしてもよ
い。
In addition to the embodiment described above, the present invention may be implemented as follows. The adhesive sheet 16
As shown in FIG. 5, in addition to being previously attached to the plastic film 1 as shown in FIG.
May be pasted in advance. In other words, the conductive patterns 2, 3, 4, 5 and the bumps 12, 13, 14, 15 may be brought into contact with the uncured sheet adhesive 16 'adhered to the lower surface of the flip chip 10. Good.

【0034】また、接着シート16として熱硬化性接着
剤を用いた場合について述べたが、他にも接着シート1
6として例えば光硬化型接着剤によって作成された接着
シートを用いてもよく、この場合には光を照射すること
により硬化することになる。
The case where a thermosetting adhesive is used as the adhesive sheet 16 has been described.
For example, an adhesive sheet made of a photo-curable adhesive may be used as 6, and in this case, it is cured by irradiating light.

【0035】また、これまではICカードに適用した場
合について述べたが、ICカードの他にも、リモートカ
ード、カード電卓、カードラジオ等の電子製品に、IC
チップ等の電子部品を搭載する場合に適用してもよい。
Although the case where the present invention is applied to an IC card has been described above, in addition to the IC card, electronic products such as a remote card, a card calculator, a card radio, etc.
The present invention may be applied to a case where an electronic component such as a chip is mounted.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 実施の形態における全体構成を示す平面図。FIG. 1 is a plan view showing an overall configuration according to an embodiment.

【図2】 図1のA−A断面図。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】 実装工程を説明するための平面図。FIG. 3 is a plan view for explaining a mounting step.

【図4】 図3のB−B断面図。FIG. 4 is a sectional view taken along line BB of FIG. 3;

【図5】 別例における電子装置を示す図。FIG. 5 is a view showing an electronic device in another example.

【図6】 従来のフリップチップ実装方式を説明するた
めの平面図。
FIG. 6 is a plan view for explaining a conventional flip chip mounting method.

【図7】 図6のC−C断面図。FIG. 7 is a sectional view taken along the line CC of FIG. 6;

【図8】 従来のフリップチップ実装方式を説明するた
めの平面図。
FIG. 8 is a plan view for explaining a conventional flip chip mounting method.

【図9】 図8のD−D断面図。FIG. 9 is a sectional view taken along line DD of FIG. 8;

【符号の説明】[Explanation of symbols]

1…プラスチックフィルム、2…導体パターン、3…導
体パターン、4…導体パターン、5…導体パターン、6
…パッド、7…パッド、8…パッド、9…パッド、10
…フリップチップ、12…バンプ、13…バンプ、14
…バンプ、15…バンプ、16…接着シート
DESCRIPTION OF SYMBOLS 1 ... plastic film, 2 ... conductor pattern, 3 ... conductor pattern, 4 ... conductor pattern, 5 ... conductor pattern, 6
... pad, 7 ... pad, 8 ... pad, 9 ... pad, 10
... Flip chip, 12 ... Bump, 13 ... Bump, 14
... Bump, 15 ... Bump, 16 ... Adhesive sheet

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 上面に導体パターンが形成された基板
と、 前記導体パターンと接続される電極を下面に形成した電
子部品と、 前記基板の上面における前記導体パターンの無い領域と
前記電子部品の下面における電極の無い領域との間に配
置され、前記基板と電子部品とを接着するシート状の接
着剤と、を備えたことを特徴とする電子部品の実装構
造。
A substrate having a conductor pattern formed on an upper surface thereof; an electronic component having an electrode connected to the conductor pattern formed on a lower surface; a region having no conductor pattern on the upper surface of the substrate and a lower surface of the electronic component. And a sheet-like adhesive for adhering the substrate and the electronic component, the electronic component mounting structure comprising:
【請求項2】 基板の上面における導体パターンの無い
領域と電子部品の下面における電極の無い領域との間
に、硬化前のシート状の接着剤を配置した状態で、基板
の上面に形成された導体パターンと電子部品の下面に形
成した電極とを接触させる工程と、 前記シート状の接着剤の硬化を行い前記基板と電子部品
とを接着する工程と、を備えたことを特徴とする電子部
品の実装方法。
2. The method according to claim 1, further comprising forming an uncured sheet-like adhesive between the region without the conductor pattern on the upper surface of the substrate and the region without the electrodes on the lower surface of the electronic component. An electronic component, comprising: a step of bringing a conductor pattern into contact with an electrode formed on a lower surface of the electronic component; and a step of curing the sheet-like adhesive to adhere the substrate to the electronic component. How to implement.
【請求項3】 基板の上面に硬化前のシート状の接着剤
を貼り付けた状態から導体パターンと電極とを接触させ
るようにした請求項2に記載の電子部品の実装方法。
3. The electronic component mounting method according to claim 2, wherein the conductive pattern and the electrode are brought into contact with each other from a state in which a sheet-like adhesive before curing is attached to the upper surface of the substrate.
【請求項4】 電子部品の下面に硬化前のシート状の接
着剤を貼り付けた状態から導体パターンと電極とを接触
させるようにした請求項2に記載の電子部品の実装方
法。
4. The method for mounting an electronic component according to claim 2, wherein the conductive pattern and the electrode are brought into contact with each other after a sheet-like adhesive before curing is attached to the lower surface of the electronic component.
JP7567498A 1998-03-24 1998-03-24 Structure and method for mounting electronic component Pending JPH11274238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7567498A JPH11274238A (en) 1998-03-24 1998-03-24 Structure and method for mounting electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7567498A JPH11274238A (en) 1998-03-24 1998-03-24 Structure and method for mounting electronic component

Publications (1)

Publication Number Publication Date
JPH11274238A true JPH11274238A (en) 1999-10-08

Family

ID=13582995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7567498A Pending JPH11274238A (en) 1998-03-24 1998-03-24 Structure and method for mounting electronic component

Country Status (1)

Country Link
JP (1) JPH11274238A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7411295B2 (en) 2004-04-02 2008-08-12 Fujitsu Limited Circuit board, device mounting structure, device mounting method, and electronic apparatus
JP2010231797A (en) * 2010-05-13 2010-10-14 Dainippon Printing Co Ltd Package attached with contactless data carrier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7411295B2 (en) 2004-04-02 2008-08-12 Fujitsu Limited Circuit board, device mounting structure, device mounting method, and electronic apparatus
JP2010231797A (en) * 2010-05-13 2010-10-14 Dainippon Printing Co Ltd Package attached with contactless data carrier

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