JPH11215509A - Motion compensation processing method and recording medium with its processing program stored therein - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accelerate the software moving picture experts group MPEG video expansion processing by reducing the occurrence of data cache mistakes in the motion compensation processing on a conventional processor that is provided with a preload device of data to a data cache. SOLUTION: After expanding a motion vector 48 of a macro block by a computing device, an address of an area 46 adjacent to the right of a reference area 45 pointed out by the motion vector 48 is given to a data cache controller, and a preload instruction is issued to preload data in this area from a main storage to the data cache. When a succeeding adjacent macro block is expanded, a probability of the preloaded area to be hit as reference area is high, and data access to the reference area 45 is hit to the data cache with high probability, so that the motion compensation processing is conducted at high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a motion compensation processing method, a motion compensation processing system, and a computer.
TECHNICAL FIELD The present invention relates to a recording medium on which a motion compensation processing program for compensating motion during expansion of a compressed video using motion estimation is recorded, and particularly to a motion compensation processing method, a motion compensation processing system, and a computer used for decompression of a compressed video signal. The present invention relates to a recording medium on which a motion compensation processing program for compensating the motion of a video compressed by using motion estimation when the video is expanded is recorded.

[0002]

2. Description of the Related Art At present, audio, audio, still images, video, and the like are converted into digital data, which is recorded on a hard disk, a magnetic tape, a CD-ROM, a DVD-ROM, transmitted through a network, or broadcast by satellite. After that, it is common to play. Since these so-called "multimedia data" are enormous, they are recorded and transferred with a reduced data amount using a compression technique, and the compressed data is expanded during reproduction.

When compressing multimedia data, the data is often compressed into a data format in accordance with international standards in consideration of the compatibility of the data after compression. For example, in the case of a video having a particularly large amount of data per unit time, ITU-T Recommendation H. 261, H .; 262, H .; 263 or MPEG
(Moving Picture Experts Gr
In many cases, a bit stream data format according to “(out)” is adopted. Currently, the officially established MPEG
Standards include MP that can reproduce VHS video quality moving images.
EG-1 Video (ISO / IEC11172-
2. “Information Technology”
-Coding of Moving Pictu
res and associated audio
forDigital Storage Media
up to 1.5 Mbit / s ") and MPEG-2 Video (ISO / I
EC 13818-2, "Information Te
Chronology-Generic Coding o
f Moving Pictures and Asso
cited Audio ").

[0004] These video compression schemes use motion estimation (M
Omission Estimation (hereinafter referred to as ME), Discrete Cosine Transform (Discrete Cosine
ne Transform; hereinafter referred to as DCT), quantization (Quantization), and variable-length coding (Va).
The data amount of the video is compressed to several tenths by an operation such as a link length coding. When decompressing a compressed video signal, the reverse of these operations, that is, variable length decoding (Variable Length) is performed.
th Decoding), inverse quantization (Inverse)
Quantization), Inverse Discrete Cosine Transform (Inverse Discrete Cosine)
Transform; hereinafter referred to as IDCT) and motion compensation (Motion Compensation; hereinafter referred to as MC).

[0005] Real-time compression and decompression of video in accordance with these video compression standards requires a large amount of computation, and has conventionally been processed by a dedicated LSI. However, recently, video decompression processing can be performed only by software on a general-purpose processor.
This is a RISC (Reduced Instruction)
With the improvement of the basic performance of general-purpose processors due to architectural innovations such as ion set computer technology and superscaler technology, and the miniaturization of LSI manufacturing processes, and the spread of multimedia data, the instruction set of general-purpose processors This is due to the fact that special instructions specialized for multimedia operations have been introduced. In a device employing a general-purpose processor having such multimedia-dedicated instructions, for example, a multimedia personal computer, real-time playback (decompression and display) of a compressed video signal is enabled only by installing decompression software. Extension LS
Since it is not necessary to mount I, the price of the device can be reduced.

On the other hand, in low-cost multimedia devices such as home video game machines, in-vehicle navigation systems, and Internet terminals, the extension of MPEG-1 class video by software has been achieved at present. However, due to the low performance of the processor and memory system used in these embedded devices, complete software decompression of MPEG-2 class video has not been achieved. Therefore, in order to perform real-time playback of MPEG-2 class video with these devices, a part of the processing must be replaced with dedicated hardware.

In particular, in the MC processing requiring the most processing amount in the video decompression processing, a memory system outside the processor is frequently accessed. Since the access is frequently performed, the external memory system is slow in a low-cost system, which is a bottleneck in performance improvement.

That is, in a high-performance system such as a personal computer, a general-purpose processor and a large-capacity DRAM (Dynamic Random Ac) as a main memory are used.
2 to 3 stages of high-speed, small-capacity buffer memory (cache memory)
Between processor and cache and between cache and DRA
A relatively high-speed and large-capacity memory system can be configured by connecting M with a wide bus having a width of 64 to 128 bits. However, in embedded devices, at most one stage of cache memory is provided, and only the connection between the processor and the cache and the connection between the cache and the DRAM are made by buses of 16 to 32 bits wide, so that only a low-speed memory system can be obtained. Because there is no. In particular, when a cache miss occurs, it takes a long time to transfer data on the DRAM to the cache memory, and the cache miss penalty is large.

Here, the MC processing will be described using an example of MPEG video. For MPEG video, Barr
yG. "Digital V" by Haskell et al.
video: An Introduction to
MPEG-2 ", Chapman & Hall, 19
97, ISBN 0-412-08411-2, Chapter 8 (pp. 146-155), each image (picture) constituting a moving image
In one of the three encoding types. The three coding types are an I picture (Intra Coded Picture) and a P picture (Predictive Coded Picture).
re), B picture (Bidirectionally)
Predictive Coded Pictur
e).

[0010] Of these, the P picture and the B picture can reduce temporal redundancy by performing MC processing, and achieve higher compression efficiency than the I picture.
In MPEG video, one image (picture) is divided into a rectangular area of 16 pixels vertically and 16 pixels horizontally called a macroblock (Macroblock), and compression processing or expansion processing is performed. Whether to perform MC in a P picture or a B picture can be selected in macroblock units. In a P-picture or B-picture decompression process, in order to decompress a macroblock using MC, a motion vector (Motion Vecto) added for each macroblock is used.
It is necessary to acquire the data of the reference area indicated by r).

Next, MPEG-1 video or MP
MC in EG-2 video frame structure frame prediction
Will be described with reference to FIGS. 7 and 8. FIG.

FIG. 7 shows an example of forward prediction in a P picture using one motion vector. Referring to FIG. 7, the main memory 60 stores a P picture (current picture 61) which is currently undergoing decompression processing, and a reference picture 62 used for MC. As the reference picture 62, the closest expanded I picture or P picture among the pictures displayed earlier than the currently decoded picture 61 is used. In the current picture 61, it is assumed that the macroblock in the shaded area is expanded. This is the current macro block 63. The motion vector of the macro block 63 is MV1 (6
When given as in 5), in the first half of the motion compensation process,
In the reference picture 62, 16 pixels vertically and 16 pixels horizontally shown by oblique lines.
The data of the rectangular area of the pixel (reference area 64) is acquired and used for the latter half of the motion compensation processing.

Note that a difference between motion vectors is recorded on the bit stream. For this reason, it is necessary to restore the motion vector (MV1) 65 of the macroblock to be processed from the difference between the motion vector of the macroblock subjected to the previous decompression processing and the difference.

FIG. 8 shows an example of bidirectional prediction in a B picture using two motion vectors. Referring to FIG. 5, the main memory 60 stores a B picture (current picture 71) currently undergoing decompression processing, a second reference picture 72 used for MC, and a third reference picture 73. I have.

The second reference picture 72 is the closest decompressed I picture or P picture among the pictures displayed earlier than the current picture 71 currently being decoded, and the third reference picture 73 is the This is the closest expanded I picture or P picture among the pictures displayed after the picture 71 being decoded.

Here, it is assumed that the expansion processing of the macroblock in the hatched portion in the current picture 71 is performed. This is the current macro block 74. When the motion vector of the macro block 74 is given as a second motion vector (MV2) 77 and a third motion vector (MV3) 78 in the compressed bit stream, the first half of the motion compensation process is performed. In each of the second reference picture 72 and the third reference picture 73, data of a rectangular area of 16 pixels vertically and 16 pixels horizontally shown by hatched portions is obtained as a second reference area 75 and a third reference area 76, respectively. It is averaged and used for the latter half of the motion compensation processing.

In the latter half of the motion compensation operation, the DCT included in the bit stream after the motion vector and the coefficient group of the quantized error information are obtained, and the inverse quantization and the inverse DCT are performed.
After performing the calculation, it is added to the data in the reference area. These calculations are performed in units of "blocks" of 8 pixels vertically and 8 pixels horizontally. In the 4: 2: 0 format, which is currently most frequently used, one macroblock is composed of four blocks of a luminance signal and two blocks of a chrominance signal, for a total of six blocks.

In each of the examples shown in FIGS. 7 and 8, the reference picture and the picture undergoing the decompression process have a size of several hundred kilobytes per picture.
M, and a portion will be held in the data cache as needed. In the MC processing, as described above, the read access to the decompressed picture is frequently performed, so that a data cache miss frequently occurs, and the processing of the general-purpose processor is interrupted until the data is loaded into the cache. The speed of the MPEG video decompression process is reduced. In particular, in an embedded system in which the performance of a memory system is relatively lower than that of a general-purpose processor, this performance decrease is remarkable.

Some processors for embedded devices incorporate a mechanism for obtaining sufficient memory access performance even with a low-speed memory system. For example, the 9th IE
NEC's V830R / AV processor announced at the EEHot Chips Symposium (Tomohi
sa Arai et al., "Embedded Multim
edia Superscalar RISC Pro
cessor with Rambus Interf
ace, "IEEE Hot ChipsSympos
ium IX, Aug. 1997) has a "preload" instruction, and provides the address of data known to be needed in the future from the register file to the data cache controller. In this way, even if the data is not in the data cache, the data can be loaded from the main memory to the data cache in advance.

Since the preload operation operates in parallel with the execution of the operation instruction of the processor, the time required for data loading can be hidden behind the operation time, and the apparent data loading time can be reduced. In other words, data cache miss penalty can be reduced by generating a "preload" instruction in advance for a data cache miss that should occur at the time of future data loading and performing recovery processing from the data cache miss in parallel with the operation instruction. .

In the case of the V830R / AV processor described above, it takes about 100 clocks in 200 MHz system clock conversion to acquire 64 bytes of data for one cache line in one cache miss process. For this reason, the rate at which the reduction of the data cache miss penalty contributes to the overall speed improvement is large. In the MPEG video decompression processing, the MC section, which takes a long time due to the large number of memory accesses, can be accelerated by the preload instruction.
It is expected that the entire MPEG video decompression process can be accelerated.

Incidentally, Japanese Patent Application Laid-Open No. 7-23389 also discloses that
A technique relating to motion compensation is described.

[0023]

SUMMARY OF THE INVENTION However, MPE
Due to the characteristics of the G video decompression process, the preload instruction is not effective for speeding up MC as it is. This will be described below.

As shown in FIGS. 7 and 8, the reference area required for the MC is indicated by a motion vector. Therefore, in order to read the pixel data of the reference area, the value of the motion vector needs to be known. However, MPEG
In the video bit stream, the difference value of the encoded motion vector and the data of the block layer such as the DCT coefficient are close to each other. Therefore, after the motion vector is obtained, the data of the reference area indicated by the motion vector and the inverse DC
The time interval until the calculation of the T result is started is short. Therefore,
There is not enough time to preload data in the reference area indicated by the motion vector into the cache. Therefore, the preload instruction as it is is not effective for speeding up MC.

By the way, in order to acquire data necessary for the MC of a certain macro block from the main memory, at least one thousand and several hundred clocks are required. For example, it is assumed that, for MC processing of a luminance component of a certain macroblock, a reference area of 16 pixels in the vertical and horizontal directions allocated to the main memory is read as shown in FIG. In FIG. 9, a main picture 60 and a current picture 81 being decompressed and a reference picture 82 are stored in the main memory 60.

In the figure, of the current picture 81, an i-th macroblock 8 which is a certain macroblock
3 during the MC processing, the motion vector of the i-th macroblock 83 (the i-th motion vector 85)
Indicates a square area (i-th reference area 84) indicated by oblique lines in the reference picture 82. The size of the cache line 86 is, for example, 64 bytes, and each row of the i-th reference area 84 is located on another cache line. In this example, the reference area is 1 in the main memory.
It covers an area equivalent to 6 cache lines.

Assuming that it takes 100 clocks to preload from the main memory of one cache line to the cache, it takes 1600 clocks to acquire the entire reference area. Actually, it is necessary to obtain a chrominance component in addition to the luminance component. In the case of bidirectional prediction, two reference regions must be obtained, so that more clocks are required. On the other hand, the time from when the motion vector of a certain macroblock is determined to when the MC operation of the macroblock starts is only several tens of clocks.

FIG. 10 shows a part of the syntax of the macro block layer of MPEG-2 video described in a pseudo programming language similar to the C language according to ISO / IEC1381.
8 shows an example extracted from 8-2. Between the motion vector decompression processing motion_vectors () and the block layer processing block () for performing DCT coefficient decompression processing and the like, one-bit fixed bit (marker bit) read / discard processing marker_bit and encoded block pattern 3 To 9 bits (for 4: 2: 0 format)
Decompression processing of coded_block_patter
There is only n (), and the time required for these processes is usually several tens of clocks.

Here, as shown in FIG. 11, a case is considered in which MC processing is performed on a certain macroblock (hereinafter, referred to as an i-th macroblock). In this case, when the MC process is started (step 90), first, the motion vector MV (i) of the i-th macroblock is expanded (step 91). After this motion vector is found, a preload instruction is issued to the address of this reference area (step 9).
2) Even if the operation of loading the data of the reference area on the main memory into the data cache is performed in parallel with other arithmetic operations, the data of the reference area is immediately loaded (step 9).
3) Then, the calculation is performed by using it (step 94). For this reason, the preload operation and the operation operate in parallel only at the time of several tens of clocks at most. Therefore, in the worst case, there is a disadvantage that there is little possibility that thousands of clocks have to be spent for reading from the main memory the reference area required for the macroblock decompression process, which is hardly improved.

In the above-mentioned Japanese Patent Application Laid-Open No. Hei 7-23389, no cache memory is used, and the above-mentioned disadvantage cannot be solved.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks of the prior art, and has as its object to reduce the time required for the MC with the largest processing amount in MPEG video decompression processing, and to reduce the MPEG video decompression processing. To provide a motion compensation processing method, a motion compensation processing system, and a recording medium on which a motion compensation processing program is recorded.

[0032]

SUMMARY OF THE INVENTION A motion compensation processing method according to the present invention is a motion compensation processing method for compensating for motion when a compressed video is decompressed using motion estimation. A storage step of reading data corresponding to the next processing area to be processed next to the reference area indicated by the motion vector from the main memory where the data is stored and storing the data in the cache memory; And performing an operation on the data in the reference area.

The motion compensation processing system according to the present invention is a motion compensation processing system for compensating for motion during expansion of a compressed video using motion estimation, and the motion vector points after the motion vector expansion processing of a macroblock. Storage means for reading data corresponding to the next processing area to be processed next to the reference area from the main memory in which the data is stored, and storing the data in the cache memory; And an operation means for performing an operation on.

A recording medium according to the present invention is a recording medium in which a computer stores a motion compensation processing program for compensating a motion at the time of decompression of a video compressed using motion estimation. Storage means for reading data corresponding to the next processing area to be processed next to the reference area indicated by the motion vector after the vector expansion processing from the main memory in which the data is stored and storing the data in the cache memory; A program for causing the computer to function as an operation unit that performs an operation on the data in the reference area in parallel is recorded.

In short, according to the present invention, in a general-purpose processor having a preload mechanism, data is preloaded into a cache memory in order to perform data read processing from a main memory for MC operation in parallel with the operation of MC processing. Therefore, the time required for the MC having the largest processing amount in the MPEG video decompression processing can be reduced, and the MPEG video decompression processing can be accelerated.

That is, when the motion vector of a certain macroblock is expanded from the bit stream in the main memory,
In the reference picture in the main memory, the address of the area adjacent to the reference area (for example, 16 pixels vertically and 16 pixels horizontally) indicated by the motion vector is given to the data cache controller, and the data there is preloaded into the data cache. Assuming that the difference between the motion vector of this macroblock and the motion vector of the next macroblock to be processed is small, this preload increases the probability that the data in the reference area required for decompression exists in the data cache. Cache miss penalty can be reduced.

[0037]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a motion compensation processing system according to the present invention. FIG. 1 shows a data path system of a typical embedded computer system for realizing the present system.

The system shown in FIG. 1 includes a main memory 12 for storing a compressed bit stream, a reference picture, and a current picture to be decompressed, and a general-purpose processor 11.

The general-purpose processor 11 includes a register file 15 for storing data for motion compensation operation, that is, data to be operated, and a register file 1 in principle.
5, a data cache 13 which holds a copy of the main memory 12 and operates as a buffer for supplying data to the register file 15 at a high speed, And a data cache controller 14 for controlling a part of the data to be reflected in the data cache 13. The data cache controller 14 has a function of preloading data from the main memory to the data cache by giving an address from the register file.

In an actual system, in addition to the blocks shown in FIG. 1, constituent blocks of an instruction execution system are provided. The block reads and decodes the program on the main memory 12 and gives an instruction to the data path system. However, this block has been omitted for simplicity.

In an actual system, various input / output devices such as a keyboard and a display controller are provided. However, these devices are also omitted for simplicity.

In MPEG video decompression, the main memory 12 stores decompression software, a compressed bit stream, decompressed pictures, and intermediate data required for decompression work. The decompression operation is performed by loading necessary data from the main memory 12 into the register file 15 and performing an appropriate operation in the arithmetic unit 16. Main memory 12 and register file 1
5, a data cache 13 is arranged and the main memory 12
And operate as a buffer between the register file 15 and
Speed up data loading. The data cache controller 14 determines which data in the main memory 12 is to be stored in the data cache 13 having a limited capacity. This determination is basically automatic, but can be explicitly instructed from software by a preload mechanism described later.

When software attempts to load data at a certain address in the main memory 12 into the register file 15 and the data exists in the data cache 13 (cache hit), the data can be transferred at high speed without overhead. . However, if the data does not exist in the data cache 13 (cache miss), the transfer from the main memory 12 to the data cache 13 becomes necessary, and the operation of the instruction execution pipeline of the general-purpose processor 11 stops until the transfer is completed. Penalty occurs. The amount of penalty depends on the type of processor, the type of memory used for main storage, and many other factors.
For example, in the case of a NEC V830R / AV processor using a Concurrent Rambus memory for main storage, about 10 MHz is calculated in terms of a 200 MHz system clock.
0 clocks.

The general-purpose processor 11 shown in FIG. 1 has a preload mechanism in order to reduce the data cache miss penalty. This means that the preload instruction is executed well before the data access is performed, and the data cache controller 14 is read from the register file 15.
Is given, the data cache controller 14 determines whether or not the data at that address exists in the data cache 13, that is, when a data load instruction to that address is expected to cause a data cache miss. This mechanism pre-loads data from the main memory to the data cache. This allows
Reduce the occurrence of data cache misses, or reduce the amount of data cache miss penalties,
Speeds up software execution. However, in order for this preload mechanism to work effectively, there must be a sufficient time interval between the preload instruction and the data access instruction to complete the preload operation.

FIG. 2 shows a flowchart of a motion compensation method using a preload mechanism effectively. In the figure, first, MC processing is started for a certain macroblock (hereinafter referred to as an i-th macroblock) (step 2)
0). First, the motion vector MV (i) for the i-th macroblock is expanded (step 21). afterwards,
Before continuing the MC processing of the i-th macroblock, MV
(I) not the ith reference area itself, but the MV
A preload instruction is issued for a region of 16 pixels vertically and 16 pixels horizontally adjacent to the right side of the reference region shown in (i) (step 22).

Here, the direction in which the X coordinate of the pixel increases is defined as the right direction in the figure. Then, after issuing the preload instruction, the MC processing of the i-th macroblock is restarted. Specifically, the i-th
Is loaded into the register file 15 (step 23), and an MC operation is performed (step 24).

Since a picture is composed of a large number of macroblocks, there is a high probability that the macroblock adjacent to the right side will be expanded after the expansion of a certain macroblock is completed. Therefore, it is assumed that after the expansion of the ith macroblock, the expansion of the (i + 1) th macroblock adjacent to the right side of the ith macroblock is performed.

When the (i + 1) th macroblock is expanded (step 26), the motion vector MV (i + 1) for the (i + 1) th macroblock is expanded first (step 27). After that, before continuing the MC processing of the (i + 1) th macroblock, not the reference region itself indicated by MV (i + 1) but the region of 16 pixels vertically and 16 pixels horizontally adjacent to the reference region indicated by MV (i + 1) Issue a preload instruction. Then, after the preload instruction is issued, the MC processing of the (i + 1) th macroblock is restarted. Specifically, the data of the reference area (i + 1) is loaded into the register (Step 29), and the MC operation is performed (Step 30).

An embodiment of the present invention will be described in detail with reference to FIG.

FIG. 3 shows a relationship between a macro block, a reference area, and a cache line in two pictures stored in the main memory 12 of FIG. Main memory 1
2, a picture 41 currently undergoing decompression processing and a picture used as its reference picture 42 are reserved. Of the picture 41 currently being processed, the i-th macroblock 43 and the (i +
It is assumed that the expansion of the macro block 44 in 1) is performed continuously. That is, the next macroblock is located on the right side of the current macroblock.

It is assumed that the motion vector MV (i) 48 of the i-th macroblock 43 points to a certain reference area (i-th reference area 45) on the reference picture 42. I-th
It is assumed that an area 46 of 16 pixels vertically and 16 pixels horizontally adjacent to the right of the reference area 45 of FIG.

The operation of the embodiment of the present invention will be described in detail with reference to FIGS. In FIG. 2, first, expansion of the i-th macroblock 43 is started (step 20). First, the motion vector MV (i) 48 is decoded (step 21), and the motion vector MV (i) is decoded.
(I) 16 vertical pixels adjacent to the reference area 45 indicated by 48;
A preload instruction is issued to the area 46 of 16 pixels in width (step 22). Next, the motion vector MV (i) 4
8 to the register file 15
(Step 23), and the MC 16
Processing is performed (step 24).

Next, expansion processing of the (i + 1) -th macroblock 44 adjacent to the right side of the i-th macroblock 43 is started (step 26). First, the motion vector MV
(I + 1) 49 is decoded, and the motion vector MV
A preload instruction is issued to an area of 16 pixels vertically and 16 pixels horizontally adjacent to the (i + 1) th reference area 50 indicated by (i + 1) 49. Next, the motion vector MV (i + 1)
The data of the (i + 1) th reference area 50 indicated by 49 is loaded into the register file 15 (step 29), and MC processing is performed using the arithmetic unit 16 (step 30).

With the above operation, the data in the (i + 1) th reference area 50 is efficiently stored in the data cache 13.
, And the number of data cache misses when the data in the (i + 1) th reference area 50 is loaded into the register file 15 can be greatly reduced.

From the characteristics of the natural image, it can be expected that the motion vectors between the macro blocks spatially close to each other are very similar. In other words, it can be expected that the motion vector 48 of the i-th macroblock 43 and the motion vector 49 of the (i + 1) th macroblock 44 are the same or very close. Therefore, the motion vector 4 of the i-th macroblock 43
8 is completed, and when it is determined that the reference area referred to in the expansion processing of the i-th macroblock 43 is 45, the reference referred to in the expansion processing of the adjacent (i + 1) th macroblock 44 It may be assumed that the area is 46.

In the decompression processing of the (i + 1) -th macro block 44, the area 4 adjacent to the i-th reference area
When the data No. 6 is used, the data in this area has already been loaded into the data cache 13 by the preload instruction issued immediately after the motion vector 48 of the i-th macroblock 43 has been found. Hits can reduce the data cache miss penalty.

Between the expansion 21 of the motion vector of the i-th macroblock and the load 29 of the data used for the MC operation of the (i + 1) -th macroblock, the MC processing of one macroblock is inserted. There are 5000 clock times. Therefore, the preload instruction to the expected area as the reference area of the (i + 1) -th macroblock issued immediately after the expansion 21 of the motion vector of the i-th macroblock is (22), and the MC processing of the i-th macroblock is performed. (23,
24), the data of the reference area expected to be used in the MC processing (29, 30) of the (i + 1) th macroblock can be efficiently stored in the data cache 13.

Next, another embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG. FIG. 1 shows a preloading method when the number of preload instructions that can be issued for preloading data in a reference area is relatively limited.

When the number of preload instructions is limited,
The following cases are possible. That is, when the number of preload instructions that can be handled simultaneously is limited due to the design limitation of the data cache controller 14, the general-purpose processor 11 is equipped with a powerful multimedia-dedicated arithmetic unit that can collectively handle a plurality of data as the arithmetic unit 16. For example, there is a case where the MC operation process is completed in a relatively short time, a case where the memory interface mounted in the general-purpose processor 11 is at a low speed and all the reference areas cannot be preloaded during the MC operation process.

In the figure, the target of the preload instruction issued when the i-th macroblock 43 is decompressed is limited to the cache line near the central portion excluding the end of the i-th macroblock. This is because when the number of preload instructions that can be issued at the same time is small, data that is highly likely to be used in the MC processing of the (i + 1) th macroblock 44 is preloaded into the data cache 13 at least.

As shown in FIGS. 5 and 6, it is assumed that the motion vectors between adjacent macroblocks are not completely the same but slightly changed. FIG. 5 shows the (i +
The motion vector MV (i + 1) 4 of the macroblock of 1)
9 is the motion vector MV of the i-th macroblock 43
(I) It is a figure which shows the case where it points slightly upward from 48. On the other hand, FIG. 6 is a diagram showing a case where the motion vector MV (i + 1) 49 of the (i + 1) -th macroblock points slightly below the motion vector MV (i) 48 of the i-th macroblock 43. is there.

If the center line 51 of the area adjacent to the ith macroblock 43 is the area 52 to be preloaded, this area is used in the MC processing of the (i + 1) th macroblock. However, the upper and lower portions are not used as reference regions. For this reason, the target of the preload instruction can be limited to the cache line near the central portion excluding the end of the i-th macroblock.

If preloading is performed as described above, MPE
Data reading of the reference area at the time of MC processing, which has the largest processing amount in G video expansion processing, can be efficiently parallelized with the operation of MC processing, and the speed of MPEG video expansion processing can be increased. As a result, even without using the MPEG video decompression LSI,
By combining a general-purpose processor and software using the present invention, MPEG video decompression processing can be realized, and the price, power consumption, and size of the device can be reduced.

It is to be noted that a recording medium on which a program for realizing the processes of FIGS.
By controlling each part of FIG. 1 using this, the same M
Clearly, a PEG video decompression process can be performed. As this recording medium, various recording media other than the semiconductor memory and the magnetic disk device not shown in FIG. 1 can be used.

It is obvious that if the computer is controlled by the program recorded on the recording medium, the MPEG video decompression process can be performed in the same manner as described above. As this recording medium, various recording media other than the semiconductor memory and the magnetic disk device can be used.

The present invention can further take the following aspects in connection with the description of the claims.

(1) The reference area is a square area having 16 pixels on each side.
5. The motion compensation processing method according to any one of 5.

(2) The reference area is a square area having 16 pixels on each side.
The motion compensation processing system according to any one of claims 10 to 13.

(3) The reference area is a square area having one side of 16 pixels.
16. The recording medium according to any one of items 15 to 15.

[0071]

As described above, the present invention provides an MPEG
By efficiently parallelizing the data reading of the reference area at the time of MC processing, which has the largest processing amount in video expansion processing, with the operation of MC processing, and speeding up MPEG video expansion processing,
Even without using an LSI dedicated to MPEG video decompression, a combination of a general-purpose processor and software using the present invention enables
PEG video decompression processing can be realized, and there is an effect that the price, power consumption, and size of the device can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an embodiment of a motion compensation processing system according to the present invention.

FIG. 2 is a flowchart illustrating a preloading method according to an embodiment of the motion compensation processing method of the present invention.

FIG. 3 is a diagram showing a preload area in the motion compensation processing method of the present invention.

FIG. 4 is a flowchart showing a preload method in another embodiment of the motion compensation processing method of the present invention.

FIG. 5 is a diagram illustrating the effect of the preloading method of FIG. 4;

FIG. 6 is another diagram showing the effect of the preloading method of FIG. 4;

FIG. 7 is a diagram for explaining forward motion compensation.

FIG. 8 is a diagram for explaining bidirectional motion compensation.

FIG. 9 is a diagram showing an extension procedure of an MPEG-2 video macroblock layer.

FIG. 10 is a diagram showing a relationship between a reference area and a cache line on a main memory.

FIG. 11 is a flowchart showing a conventional preload method.

[Description of Signs] 11 General-purpose processor 12, 60 Main memory 13 Data cache 14 Data cache controller 15 Register file 16 Operation unit 41, 61 Current picture 42, 62, 72, 73, 82 Reference picture 43, 83 i-th macro Block 44 (i + 1) th macroblock 45,84 ith reference area 46 area adjacent to ith reference area 47 cache line 48 motion vector MV (i) 49 motion vector MV (i + 1) 50th (i + 1) th Reference area 51 Center line 52 Preload area 63, 74 Current macro block 64, 75, 76 Reference area 65, 77, 78 Motion vector 71, 81 Current picture 85 i-th motion vector 86 Cache line

Claims (15)

[Claims] 1. A motion compensation processing method for compensating a motion of a video compressed at the time of decompression using motion estimation, comprising: A storage step of reading data corresponding to the next processing area to be stored from the main memory storing the data and storing the data in the cache memory; and an operation step of performing an operation on the data of the reference area in parallel with the storage step. A motion compensation processing method comprising: 2. The motion compensation processing method according to claim 1, wherein in the storing step, a preload instruction of data from the main storage to the cache is issued for data corresponding to the next processing area. 3. The motion compensation processing method according to claim 1, wherein the next processing area has a data amount equal to the data amount of the reference area. 4. The motion compensation processing method according to claim 1, wherein the next processing area has a data amount smaller than the data amount of the reference area. 5. The motion compensation processing method according to claim 4, wherein the next processing area is a central area excluding an end of an area adjacent to the reference area. 6. A motion compensation processing system for compensating motion during decompression of a compressed video using motion estimation.
Storage means for reading data corresponding to the next processing area to be processed next to the reference area indicated by the motion vector after macroblock motion vector expansion processing from the main memory where the data is stored, and storing the data in the cache memory; And a calculating means for performing a calculation on the data in the reference area in parallel with the storing step. 7. The motion compensation processing system according to claim 6, wherein said storage means issues a data preload instruction from said main storage to said cache for data corresponding to said next processing area. 8. The motion compensation processing system according to claim 6, wherein the next processing area has a data amount equal to the data amount of the reference area. 9. The motion compensation processing system according to claim 6, wherein the next processing area has a data amount smaller than the data amount of the reference area. 10. The motion compensation processing system according to claim 9, wherein the next processing area is a central area excluding an end of an area adjacent to the reference area. 11. A recording medium recording a motion compensation processing program for compensating motion during expansion of a video compressed using motion estimation by a computer, wherein the computer controls the computer after performing a motion vector expansion process of a macroblock. Storage means for reading data corresponding to the next processing area to be processed next to the reference area indicated by the motion vector from the main memory in which the data is stored and storing the data in the cache memory; A recording medium having recorded thereon a program for functioning as an operation means for performing an operation on data in an area. 12. The recording medium according to claim 11, wherein the storage unit issues a preload instruction of data from the main storage to the cache for data corresponding to the next processing area. 13. The recording medium according to claim 11, wherein the next processing area has a data amount equal to the data amount of the reference area. 14. The recording medium according to claim 11, wherein the next processing area has a data amount smaller than a data amount of the reference area. 15. The recording medium according to claim 14, wherein the next processing area is a central area excluding an end of an area adjacent to the reference area.