JPH11205692A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform timing control that can be corresponded to a still camera which photographs and records a still image of a high image quality by having a signal producing means which produces video data for recording and a video signal for display from an output signal of an imaging device, and a means for producing a drive pulse of the imaging device and timing. SOLUTION: An imaging device 1 uses an imaging device which has more lines and higher pixels than a general TV system, is subjected to photoelectric conversion by a drive pulse 101 that is supplied from a timing producing circuit 2, produces a pixel signal and supplies it to a signal processing circuit 3. The circuit 3 reduces noise from the pixel signal, makes a signal level constant and performs A/D conversion. And after that, it performs signal processing that produces luminance and a color signal and produces video data for recording and a video signal for display. If an element which thinns and reads only a pixel signal that is necessary for display from all of the pixels as the device 1 is used, an image that is desired to be photographed can be shown on a display device 5 until the image contour to be photographed is decided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image pickup apparatus mainly for photographing a still image using an image pickup device having a high number of pixels.

[0002]

2. Description of the Related Art The prior art is disclosed in JP-B-63-45153.
In the case of a video camera that captures and records a moving image, the timing of a drive pulse of an image sensor and the timing of a synchronizing signal in a video signal to be recorded or displayed on a display device such as a liquid crystal are all used in a TV camera. It was determined by the method.

[0003]

In the case of a still camera that captures and records a high-resolution still image using an image sensor with a larger number of lines and a higher pixel count than the TV system, the video data written to the recording means is a liquid crystal display. Since the number of lines is greater than the number of video signals to be displayed on the display device, such as the timing of driving and signal processing of the image sensor for generating video data for recording, and the generation of a synchronization signal for displaying the video signal on the display device Are not the same, and therefore cannot be handled by the above-mentioned conventional technology.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an image pickup apparatus capable of performing timing control corresponding to a still camera for photographing and recording a still image using an image pickup device having a high number of pixels.

[0005]

According to the present invention, there is provided an image pickup apparatus comprising: a signal processing unit for generating video data for recording and a video signal for display from an output signal of an image sensor; Recording means for recording data, display means for displaying a video signal, and a drive pulse for the image sensor and a synchronizing signal for display are generated according to the number of pixels of the image sensor and a display system such as a TV system of the display device. Timing generating means is provided.

[0006]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an image pickup apparatus according to the present invention, wherein 1 is an image pickup device, 2 is a timing generation circuit, 3 is a signal processing circuit, 4 is a recording device, and 5 is a display device. .

In FIG. 1, an output terminal of the image pickup device 1 is connected to an input terminal of a signal processing circuit 3, and an output terminal of the signal processing circuit 3 for outputting video data for recording is connected to a recording device 4.
An output terminal for outputting a video signal for display is connected to an input terminal of the display device 5, and the timing generation circuit 2 supplies a drive pulse 101 to the image sensor 1 and a synchronization signal 102 to the display device 5. .

The image pickup device 1 uses an image pickup device having a larger number of lines and a higher number of pixels than a general TV system such as NTSC and PAL, and is subjected to photoelectric conversion by a driving pulse 101 supplied from a timing generation circuit 2 to perform pixel signal conversion. And supplies the pixel signal to the signal processing circuit 3. The signal processing circuit 3 performs signal processing for reducing noise from the pixel signal, making the signal level constant, performing A / D conversion, and then generating luminance and color signals, and converts the video data for recording and the video signal for display. The generated video data is supplied to the recording device 4 and the video signal is supplied to the display device 5. The recording device 4 records video data. The display device 5 is a general TV such as NTSC or PAL.
A display device for a monitor such as a liquid crystal display, which displays the video signal.

In the above configuration, since the number of lines (Ns) of one frame of the image sensor 1 is larger than the number of lines (N) of one frame of the display device 5, the video signals for all the pixels of the image sensor 1 are directly used. It cannot be displayed on the display device 5.
However, if an image sensor capable of thinning out and reading out only pixel signals necessary for display from all the pixels is used as the image sensor 1, an image to be photographed is displayed on the display device 5 until an image frame to be photographed is determined. (Hereinafter, referred to as a display mode).

On the other hand, when video data is recorded in the recording device 4 (hereinafter referred to as a recording mode), all pixel signals are read out without thinning out. It is longer than the frame period.

A case will be described below in which an image pickup device capable of reading out pixel signals by thinning out in the above configuration is used. FIG. 2 exemplifies the timing of the frame period (Ts) of the drive pulse 101 for driving the image sensor 1 and the frame period (Tm) of the synchronization signal 102 for displaying an image on the display device 5 when Ns ≒ 2N. FIG. In FIG. 2, Ts has a different period between a display mode in which pixel signals are thinned out and a recording mode in which all pixel signals are read, but Tm is always constant (T) because it depends on the TV system of the display device. Therefore, in the display mode and the recording mode, the timing generation circuit 2 controls the driving pulse 101 and the synchronization signal 1 at timings adapted to recording and display, respectively.
02 must be generated.

FIG. 3 shows an example of the timing generation circuit 2 for realizing the above operation. Reference numeral 21 denotes a horizontal drive pulse generation circuit, 22 denotes a vertical drive pulse generation circuit, 23 denotes a horizontal synchronization signal generation circuit, and 24 denotes a vertical synchronization signal. Generation circuits, 221 and 241 are counters, 222 and 242 are decoders, 25
And 26 are synthesis circuits, 27 is a switch, 271-273
Is a terminal of the switch 27, 104 is a clock, and 106 and 107 are reset pulses. The horizontal drive pulse generation circuit 21 receives the clock 104 to generate a horizontal drive pulse and a clock 105. In the vertical drive pulse generation circuit 22, the counter 221 inputs the clock 105 and outputs the count value to the decoder 222. 222 generates a vertical drive pulse whose phase changes at a certain timing of the count value and a reset pulse 106 that resets the counter 221 at a period Ts / n (n is an integer),
5 receives the horizontal and vertical drive pulses and generates a drive pulse 101.

The horizontal synchronizing signal generating circuit 23 receives the clock 104 to generate a horizontal synchronizing signal.
And outputs the count value to the decoder 242. The decoder 242 generates a vertical synchronizing signal whose phase changes at a certain timing of the count value and a reset pulse 107 having a period T / n (n is an integer). The reset pulses 106 and 107 and the control signal 103 are input, and the connection between the terminals 271 and 272 or 273 is switched according to the value of the control signal 103 to output a reset pulse 108. The counter 241 has a period Ts / n or T / n. After being reset, the synthesizing circuit 26 receives the horizontal and vertical synchronization signals and generates a synchronization signal 102.

Switching between the display mode and the recording mode is as follows.
This can be realized by switching the value of the control signal 103 of the switch 27. For example, suppose that the display and recording modes are switched by switching the frame immediately after the change of the control signal 103. When the value of the control signal 103 is 0, the terminal 271 and the terminal 272 of the switch 27 are connected in the display mode, and When the value of the signal 103 is 1, the terminals 271 and 273 of the switch 27 are connected in the recording mode.

FIG. 5 is a diagram showing the relationship between the control signal 103 and the reset pulses 106 to 108 in the display and recording modes when n = 1 in the above configuration. 5 that the reset pulse 108 of the counter 241 has a period T in any mode, so that the frame period of the synchronization signal 102 is always the same as the frame period of the display device, and synchronization can be achieved.

As described above, in this embodiment, the image pickup device is a general T
The number of lines is larger than that of the V system and the number of pixels is high. On the other hand, even when a still image is photographed by an image pickup device of a general TV system, the synchronization signal supplied to the display device is always constant. Therefore, when shifting from the display mode to the recording mode, or conversely, when shifting from the recording mode to the display mode, there is an effect that the video signal displayed on the display device is not interrupted or disturbed.

FIG. 4 is a block diagram showing another embodiment of the timing generation circuit 2. In FIG. 3 is different from FIG. 3 only in the arrangement of the switches 27. Therefore, description of the operation of the other blocks is omitted, and only the periphery of the switches 27 will be described. In FIG. 4, the vertical synchronizing signal generation circuit 24 directly inputs a reset pulse 107 to the counter 241 without passing through the switch 27,
On the other hand, the vertical drive pulse generation circuit 22 switches the reset pulses 106 and 107 by the switch 27 and inputs the reset pulse 109 to the counter 221.

FIG. 5 shows the relationship between the control signal 103 and the reset pulses 106 to 109 in the display and recording modes when n = 1 in the above configuration. FIG. 5 shows that the reset pulses input to the counters 221 and 241 in the embodiment shown in FIG. 4 are the same as the reset pulses in the embodiment shown in FIG.

As described above, in the present embodiment, as in the above-described embodiment, when the display mode shifts from the recording mode to the recording mode or vice versa, the video signal displayed on the display device is interrupted or disturbed. Has the effect of not letting you do.

FIG. 6 is a block diagram showing another embodiment of the image pickup apparatus according to the present invention. Reference numeral 6 denotes a control circuit, and portions corresponding to those in FIG. I do.

In FIG. 6, a control circuit 6 outputs driving pulses output from the timing generation circuit 2 in accordance with the number of pixels of the image sensor 1 in the horizontal and vertical directions and the frame frequency of a video signal to be displayed on the display device 5. 101 and synchronization signal 1
02, a control signal 110 for determining the timing of the horizontal and vertical phase changes is supplied to the timing generation circuit 2,
The timing generation circuit 2 includes a drive pulse 101 of horizontal and vertical timing designated by the control signal 110 and a synchronization signal 1
02 is generated.

As described above, according to the present embodiment, the control circuit supplies a control signal for determining the timing of the phase change of the pulse to the timing generation circuit, and generates a drive pulse and a synchronization signal at an arbitrary timing. This has the effect that the image pickup device can be driven and an image can be displayed on a display device of an arbitrary TV system.

[0024]

As described above, according to the present invention, the image pickup device has a larger number of lines than the general TV system such as NTSC and PAL, and uses a high pixel image pickup device. The device is an imaging device capable of capturing a high-definition still image using a general TV-type display device. In an imaging device, a shutter is pressed from a display mode for determining a frame to be captured to a recording mode for recording video data by pressing a shutter or vice versa. This has the effect of preventing instantaneous interruption or disturbance of the video signal displayed on the display device at the moment of returning from the recording mode to the display mode again.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an imaging device according to the present invention.

FIG. 2 is a timing chart showing the operation of an embodiment of the imaging apparatus according to the present invention.

FIG. 3 is a block diagram showing one embodiment of an imaging device according to the present invention.

FIG. 4 is a block diagram showing one embodiment of an imaging device according to the present invention.

FIG. 5 is a timing chart showing an operation of the embodiment of the imaging apparatus according to the present invention.

FIG. 6 is a block diagram showing an embodiment of an imaging device according to the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 imaging device 2 timing generating circuit 3 signal processing circuit 4 recording device 5 display device 6 control circuit 2
DESCRIPTION OF SYMBOLS 1 ... Horizontal drive pulse generation circuit, 22 ... Vertical drive pulse generation circuit, 23 ... Horizontal synchronization signal generation circuit, 24 ... Vertical synchronization signal generation circuit, 25, 26 ... Synthesis circuit, 221, 241
.., Counters, 222, 242, decoders, 27, switches, 271 to 273, terminals, 101, drive pulses, 10
2 ... Synchronization signal, 103,110 ... Control signal, 104,1
05: clock, 106 to 109: reset pulse.

Continued on the front page (72) Inventor Tatsushi Nishimura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Hitachi, Ltd. Multimedia Systems Development Division

Claims (4)

[Claims] A signal processing circuit for performing signal processing on an output signal of an image sensor to generate video data to be recorded in a recording device and a video signal to be displayed on a display device; Means for generating a synchronization signal for displaying an image on a display device, and switching means for keeping the frame period T of the synchronization signal constant even if the frame period Ts of the drive pulse is changed according to the number of pixels to be read out. An imaging device comprising a timing generation circuit. 2. The image pickup apparatus according to claim 1, wherein the image pickup device includes a pixel signal because a frame period Ts of a drive pulse, which is a time required for reading out all pixel signals, is longer than a frame period T of a synchronization signal. An image pickup device for obtaining information of a video signal to be displayed on a display device by thinning out and reading out. 3. The imaging device according to claim 1, wherein the timing generation circuit is configured to perform only display of a video signal generated from an output signal of the imaging element on the display device.
A driving pulse having a frame period Ts = T for reading out a pixel signal necessary for generating a video signal, and a synchronizing signal having a frame period T for displaying the video signal on a display device are generated. Is displayed on the display device, and at the same time, video data generated from all the pixel signals output from the image sensor is recorded in the recording device, and Ts / T = N (N is between the frame periods Ts and T). An imaging device that generates a drive pulse having a frame period Ts and a synchronization signal having a frame period T satisfying the relationship of (integer). 4. The image pickup apparatus according to claim 1, wherein the drive output from the timing generation circuit according to the number of pixels of the image pickup element and a frame frequency of a video signal to be displayed on the display device. An imaging apparatus comprising: a control circuit capable of setting timings of phase changes of a pulse and a synchronization signal in horizontal and vertical directions to arbitrary values.