JPH11204464A - Manufacture of wafer having high flatness - Google Patents

Manufacture of wafer having high flatness

Info

Publication number
JPH11204464A
JPH11204464A JP470898A JP470898A JPH11204464A JP H11204464 A JPH11204464 A JP H11204464A JP 470898 A JP470898 A JP 470898A JP 470898 A JP470898 A JP 470898A JP H11204464 A JPH11204464 A JP H11204464A
Authority
JP
Japan
Prior art keywords
wafer
etching
shape
back surfaces
flatness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP470898A
Other languages
Japanese (ja)
Inventor
Shinji Okawa
真司 大川
Kozo Abe
耕三 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Super Silicon Crystal Research Institute Corp
Original Assignee
Super Silicon Crystal Research Institute Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Super Silicon Crystal Research Institute Corp filed Critical Super Silicon Crystal Research Institute Corp
Priority to JP470898A priority Critical patent/JPH11204464A/en
Publication of JPH11204464A publication Critical patent/JPH11204464A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a wafer having excellent flatness on the surface and back sides, by calculating the shape of the surface and back sides of the wafer on the basis of optical interference fringes obtained from the surface and back sides of the wafer, and removing a portion to be worked, protruding from a reference surface, on the surface and back sides by plasma etching. SOLUTION: From shape measurement data of the surface and back sides of a wafer obtained by an optical measuring device, total quantities of etching of the surface side and the back side are calculated. Then, the side having the greater total quantity of etching is assumed as being the back side B and is etched at a high rate using a high-power plasma etching device. It is also possible to etch the back side B at a large scan pitch within such a range that the standard of the glossiness of the back side is met. Therefore, a portion to be worked C is quickly removed by etching. On the other hand, on the surface side A having the smaller quantity of removal, a portion to be worked D is removed by etching with a making power which does not cause any damage. Thus, a product wafer having high flatness both on the surface side A and on the back side B is provided.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、うねり成分までも除去
され、理想平面に近い表面をもつウェーハを製造する方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wafer having a surface close to an ideal plane, in which even a waviness component is removed.

【0002】[0002]

【従来の技術】インゴットから切り出された半導体ウェ
ーハは、ラッピング,ポリッシング等の工程を経た後、
高精度に平坦化するためにエッチングされている。この
ときのエッチングには、限られた領域を定められた量だ
け除去することが要求されるため、プラズマアシスト化
学エッチングが採用されている。エッチング量は、光学
干渉縞から求められ、或いは変位センサでウェーハ両面
をスキャンすることにより求められたウェーハの平坦度
を基準にして決定される。光学干渉縞を利用する方法で
は、特開平1−143906号公報で開示されているよ
うに、基準平面となる光学レンズとウェーハが作る干渉
縞からウェーハの平坦度が算出される。変位センサでウ
ェーハ両面をスキャンする方法では、特公平5−771
79号公報で紹介されているように、ウェーハの両側に
配置された二つの静電容量型の変位センサから得られた
変位信号に基づいてウェーハの厚み変動を計算し、裏面
側を計算上の理想平面に換算してウェーハの平坦度を求
めている。
2. Description of the Related Art A semiconductor wafer cut from an ingot is subjected to lapping, polishing and other processes.
It is etched to flatten with high precision. Since the etching at this time is required to remove a limited area by a predetermined amount, plasma-assisted chemical etching is employed. The etching amount is determined on the basis of the flatness of the wafer obtained from optical interference fringes or by scanning both surfaces of the wafer with a displacement sensor. In a method using optical interference fringes, as disclosed in Japanese Patent Application Laid-Open No. 1-143906, the flatness of a wafer is calculated from an optical lens serving as a reference plane and interference fringes formed by the wafer. In the method of scanning both sides of a wafer with a displacement sensor, Japanese Patent Publication No. 5-771
As disclosed in Japanese Patent Publication No. 79, the thickness variation of the wafer is calculated based on the displacement signals obtained from the two capacitive displacement sensors arranged on both sides of the wafer, and the back side is calculated. The flatness of the wafer is determined by converting it to an ideal plane.

【0003】[0003]

【発明が解決しようとする課題】しかし、何れの方式に
よる場合でも、片面を理想平面と仮定した他面の変位で
ある厚み偏差を平坦度として扱い、この平坦度からエッ
チングによる除去量を算出している。すなわち、厚み偏
差の少ない製品を目標として、ウェーハをエッチングし
ている。そのため、厚み偏差を伴わないウェーハのうね
りや傾斜等は、測定対象外として扱われ、エッチング除
去されることがない。厚み偏差を指標にすることは、平
坦度の測定に供されるウェーハが真空チャック等に吸着
保持されたときの吸着力によってウェーハが平面に矯正
されることにも一因がある。しかし、高集積化や超微細
化の要求が強くなる一方の半導体デバイスに使用される
ウェーハでは、吸着力による変形がデバイスの作り込み
や破損に及ぼす影響が無視できなくなってきている。そ
のため、表裏両面共に平面度が高いウェーハが望まれて
いるが、このような平面度の高いウェーハの製造方法は
これまでのところ提案されていない。
However, in either case, the thickness deviation, which is the displacement of the other surface assuming that one surface is an ideal plane, is treated as flatness, and the removal amount by etching is calculated from the flatness. ing. That is, the wafer is etched with a target of a product having a small thickness deviation. Therefore, undulations and inclinations of the wafer that do not have a thickness deviation are treated as not to be measured, and are not removed by etching. Using the thickness deviation as an index is partly due to the fact that the wafer to be measured for flatness is flattened by a suction force when the wafer is suction-held by a vacuum chuck or the like. However, in the case of wafers used for semiconductor devices, on which demands for higher integration and ultra-miniaturization are becoming stronger, the influence of deformation due to suction force on device fabrication and breakage cannot be ignored. For this reason, a wafer having high flatness on both the front and back surfaces is desired, but a method of manufacturing such a high flatness wafer has not been proposed so far.

【0004】ところで、本発明者等は、ウェーハ両面の
光学干渉縞からウェーハの表裏両面の形状及び平坦度を
求める光学式形状測定器を特願平9−154023号で
提案した。この装置では、ウェーハを吸着保持すること
なく、エッジ部を介して鉛直保持し、ウェーハの両側に
二つの光学測定器を対向配置している。そして、両光学
測定器で得られた光学干渉縞から表裏両面の形状及び平
坦度を算出している。本発明は、先に提案した光学式形
状測定器がウェーハ表裏両面の形状測定に有効なことに
着目し、得られた表裏両面の形状に応じてエッチングで
除去される量を表裏両面ごとに定めることにより、表裏
両面共に平面度の優れたウェーハを得ることを目的とす
る。
The present inventors have proposed in Japanese Patent Application No. 9-154023 an optical shape measuring instrument for determining the shape and flatness of both front and back surfaces of a wafer from optical interference fringes on both surfaces of the wafer. In this apparatus, the wafer is vertically held via an edge portion without being suction-held, and two optical measuring devices are arranged on both sides of the wafer to face each other. Then, the shape and flatness of both front and back surfaces are calculated from the optical interference fringes obtained by both optical measuring devices. The present invention focuses on the fact that the optical shape measuring device proposed earlier is effective for measuring the shape of the front and back surfaces of the wafer, and determines the amount removed by etching according to the obtained shape of the front and back surfaces for each of the front and back surfaces. Thereby, an object is to obtain a wafer having excellent flatness on both front and back surfaces.

【0005】[0005]

【課題を解決するための手段】本発明の製造方法は、そ
の目的を達成するため、鉛直保持したウェーハの表裏両
面から得られた光学干渉縞に基づきウェーハ表裏両面の
形状を算出し、基準となる表面よりも隆起している表裏
両面の被加工部をプラズマエッチングにより除去するこ
とを特徴とする。表面又は裏面が予め定まっていないウ
ェーハをエッチングする場合、除去される被加工部が多
い側を裏面とし、大出力のプラズマを照射する。裏面の
エッチングに際しては、表面側よりも大きなスキャンピ
ッチで裏面側をプラズマエッチングすると加工速度が速
くなる。
In order to achieve the object, the manufacturing method of the present invention calculates the shape of both the front and back surfaces of a wafer based on optical interference fringes obtained from both the front and back surfaces of a vertically held wafer, and obtains a reference and a reference value. It is characterized in that the processed parts on both the front and back surfaces which are raised from the front surface are removed by plasma etching. When a wafer whose front surface or back surface is not predetermined is etched, the side where a large number of processed parts to be removed is used as the back surface, and high-power plasma is irradiated. When etching the back surface, if the back surface side is plasma-etched at a scan pitch larger than that of the front side, the processing speed is increased.

【0006】[0006]

【実施の形態】ウェーハ表裏両面の形状測定装置は、た
とえば図1に示すようにウェーハ1のエッジ部を適宜の
手段で鉛直方向に保持する。ウェーハ1を鉛直保持する
ことにより、たとえば真空チャック等の保持手段による
拘束からウェーハ1が解放され、自由状態での測定が可
能になる。また、エッジ部を介してウェーハ1を保持す
るため、保持手段に起因する測定不可能領域が生じるこ
ともない。ウェーハ1の両側に、光学測定系10,20
が配置される。光学測定系10,20は、発光器11,
21から出射された測定光12,22をハーフミラー1
3,23を介してコリメータレンズ14,24に送り、
平行ビームとして基準平面レンズ15,25を透過さ
せ、ウェーハ1の表裏両面を照射させる。測定光12,
22は、ウェーハ1の表裏両面で反射されるが、一部は
ウェーハ1の表裏両面に対向する基準平面レンズ15,
25の基準面でも反射する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An apparatus for measuring the shape of both front and back surfaces of a wafer 1 holds an edge portion of a wafer 1 in a vertical direction by appropriate means, for example, as shown in FIG. By holding the wafer 1 vertically, the wafer 1 is released from restraint by a holding means such as a vacuum chuck, and measurement in a free state becomes possible. Further, since the wafer 1 is held via the edge portion, an unmeasurable region due to the holding means does not occur. Optical measurement systems 10 and 20 are provided on both sides of the wafer 1.
Is arranged. The optical measurement systems 10 and 20 include a light emitting device 11 and
The measurement light beams 12 and 22 emitted from 21 are reflected by the half mirror 1
Are sent to collimator lenses 14 and 24 via 3, 23,
The reference plane lenses 15 and 25 are transmitted as parallel beams, and the front and back surfaces of the wafer 1 are irradiated. Measuring light 12,
22 is reflected on both the front and back surfaces of the wafer 1, but a part of the reference plane lens 15,
It is also reflected on 25 reference planes.

【0007】ウェーハ1の表裏両面及び基準平面レンズ
15,25の基準面で反射した測定光12,22は、逆
の経路を辿って基準平面レンズ15,25及びコリメー
タレンズ14,24を透過し、ハーフミラー13,23
で反射され、受光器16,26に取り込まれる。ウェー
ハ1の表裏両面で反射した測定光12,22は、基準平
面レンズ15,25の基準面で反射した測定光と光路差
が異なる。このようにウェーハ1の面形状を反映して光
路差が生じることから、観察された干渉縞からウェーハ
1の表面形状及び裏面形状が判る。
The measuring beams 12, 22 reflected on the front and back surfaces of the wafer 1 and the reference planes of the reference plane lenses 15, 25 pass through the reference plane lenses 15, 25 and the collimator lenses 14, 24 along the reverse path. Half mirrors 13, 23
And is taken into the light receivers 16 and 26. The measurement light beams 12 and 22 reflected on the front and back surfaces of the wafer 1 have different optical path differences from the measurement light beam reflected on the reference surfaces of the reference plane lenses 15 and 25. Since the optical path difference reflects the surface shape of the wafer 1 in this manner, the surface shape and the back surface shape of the wafer 1 can be determined from the observed interference fringes.

【0008】発光器11,21及び受光器16,26
は、演算器17,27に接続されている。演算器17,
27は、モニタ18,28を備えており、光学レンズ1
5,25とウェーハ1の両面とがそれぞれ作る二つの干
渉縞が同時に取り込まれる。演算器17,27では、取
り込まれた干渉縞からウェーハ1の表裏両面の形状を演
算し記録する。また、一方の表面形状を基準にし、他方
の干渉縞からウェーハ1の平坦度を演算し記録する。或
いは、ウェーハ1の周方向に等間隔で厚さ計(図示せ
ず)を配置し、これら厚さ計で直接測定したウェーハ1
の厚みを基準として光学干渉縞からウェーハ1の表裏両
面の形状を演算する。形状測定するウェーハの表面が比
較的粗いとき、基準平面レンズ15,25に替えて三角
プリズムを用いた斜入射法を採用することもできる。こ
の場合、図2に示すような光学系をウェーハ1の両面に
配置する。すなわち、発光器31,41から出射した光
を凸レンズ32,42等で所定の光束に拡げ、コリメー
タレンズ33,43で平行光束とした測定光を三角プリ
ズム34,44に入射する。三角プリズム34,44
は、基準底面がウェーハ1の表裏両面に対向して配置さ
れている。
The light-emitting devices 11, 21 and the light-receiving devices 16, 26
Are connected to computing units 17 and 27. Arithmetic unit 17,
27 includes monitors 18 and 28, and the optical lens 1
Two interference fringes respectively formed by 5, 25 and both surfaces of the wafer 1 are simultaneously captured. The calculators 17 and 27 calculate and record the shapes of the front and rear surfaces of the wafer 1 from the captured interference fringes. In addition, the flatness of the wafer 1 is calculated and recorded from one interference pattern based on one surface shape. Alternatively, a thickness gauge (not shown) is arranged at equal intervals in the circumferential direction of the wafer 1, and the wafer 1 directly measured by the thickness gauge is used.
The shape of both the front and back surfaces of the wafer 1 is calculated from the optical interference fringes based on the thickness of the wafer 1. When the surface of the wafer whose shape is to be measured is relatively rough, an oblique incidence method using a triangular prism instead of the reference plane lenses 15 and 25 can be employed. In this case, an optical system as shown in FIG. That is, the light emitted from the light emitters 31 and 41 is spread into a predetermined light flux by the convex lenses 32 and 42 and the like, and the measurement light converted into the parallel light flux by the collimator lenses 33 and 43 enters the triangular prisms 34 and 44. Triangular prisms 34, 44
Is arranged such that the reference bottom surface is opposed to both the front and back surfaces of the wafer 1.

【0009】三角プリズム34,44に入射した測定光
は、一部が三角プリズム34,44を透過してウェーハ
1の表裏両面で反射され、残りが三角プリズム34,4
4の基準底面で反射される。そのため、ウェーハ1の表
裏両面で反射される測定光と三角プリズム34,44の
基準底面で反射される測定光との間に、ウェーハ1の表
裏面それぞれの平面度に対応した光路差が生じる。この
光路差に応じて、図1の場合と同様に光学干渉縞が発生
する。光学干渉縞は、スクリーン35,45に投影さ
れ、レンズ36,46を介してテレビカメラ37,47
の撮像面に結像され、映像信号として演算器38,48
に入力される。演算器38,48では、映像信号を解析
してウェーハ1の表面形状を演算し、記録すると共にモ
ニタ39,49に適宜表示する。
A part of the measuring light incident on the triangular prisms 34 and 44 passes through the triangular prisms 34 and 44 and is reflected on the front and back surfaces of the wafer 1, and the rest is reflected on the triangular prisms 34 and 4.
4 is reflected by the reference bottom surface. Therefore, an optical path difference corresponding to the flatness of each of the front and back surfaces of the wafer 1 is generated between the measurement light reflected on the front and back surfaces of the wafer 1 and the measurement light reflected on the reference bottom surfaces of the triangular prisms 34 and 44. According to this optical path difference, optical interference fringes are generated as in the case of FIG. The optical interference fringes are projected on screens 35 and 45 and are transmitted through lenses 36 and 46 to television cameras 37 and 47.
Are formed on the imaging surface of the arithmetic units 38 and 48 as video signals.
Is input to The computing units 38 and 48 analyze the video signal to calculate the surface shape of the wafer 1 and record it, and display it on the monitors 39 and 49 as appropriate.

【0010】このようにウェーハ1の表裏両面から得ら
れた二つの干渉縞を用いて平坦度を求めるとき、従来の
変位センサを利用した方式に比較して極めて短時間で測
定結果が得られる。また、平坦度だけではなく、ウェー
ハ1の表面形状や裏面形状も測定されるため、厚み変動
を伴わないうねり,反り等も判る。本発明では、このよ
うにして検出された平坦度,うねり,反り等に応じてエ
ッチング除去量を定める。たとえば、何れの面を表面又
は裏面にするかが予め定まっていないウェーハ1をエッ
チングする場合、図1又は図2の光学式測定器で得られ
たウェーハ1の表裏両面の形状測定データから、表面及
び裏面の総エッチング量を計算する。そして、図3に示
すように総エッチング量が大きい面を裏面Bとし、大出
力のプラズマエッチング装置を用いて高速エッチングす
る(a)。裏面Bに対しては、裏面の光沢度の規格が満
足される範囲で大きなスキャンピッチでエッチングする
ことも可能である。そのため、被加工部Cが迅速にエッ
チング除去される(b)。他方、除去量の少ない表面A
に対しては、ダメージの入らない投入パワーで被加工部
Dをエッチング除去する。このようにして、表面A及び
裏面B共に平面度の高い製品ウェーハが得られる
(c)。
As described above, when flatness is obtained by using two interference fringes obtained from both the front and back surfaces of the wafer 1, a measurement result can be obtained in an extremely short time as compared with a conventional method using a displacement sensor. In addition, since not only the flatness but also the front surface shape and the back surface shape of the wafer 1 are measured, it is also possible to determine waviness and warpage without thickness fluctuation. In the present invention, the etching removal amount is determined according to the flatness, undulation, warpage, and the like detected in this manner. For example, in the case of etching a wafer 1 for which which surface is to be the front surface or the back surface is not predetermined, from the shape measurement data of the front and back surfaces of the wafer 1 obtained by the optical measuring device of FIG. 1 or FIG. And the total etching amount on the back surface is calculated. Then, as shown in FIG. 3, a surface having a large total etching amount is defined as a back surface B, and high-speed etching is performed using a high-power plasma etching apparatus (a). The back surface B can be etched at a large scan pitch within a range that satisfies the specification of the back surface glossiness. Therefore, the processed portion C is quickly removed by etching (b). On the other hand, the surface A with a small removal amount
, The workpiece D is removed by etching with a power that does not cause damage. In this way, a product wafer having high flatness on both the front surface A and the back surface B is obtained (c).

【0011】表面及び裏面が定まっているウェーハ1を
エッチングする場合には、裏面Bに対して大出力のプラ
ズマエッチング装置を用いて大きなスキャンピッチで高
速エッチングする。表面Aに対しては、通常の条件でエ
ッチングする。プラズマエッチング装置としては、本発
明者等が先に特願平9−58878号で提案した装置が
使用される。このプラズマエッチング装置は、図4に示
すように被加工材であるウェーハ1のエッジ部を保持具
51で掴み、ウェーハ1を鉛直に保持し、反応チャンバ
50にセットする。反応チャンバ50を貫通するガス供
給管52は、ウェーハ1の表裏両面に向けてエッチング
ガス53を送り込むように、ウェーハ1の表面又は裏面
に臨む位置まで延びている。
When etching the wafer 1 having a fixed front and back surface, the back surface B is etched at a high scan pitch with a large scan pitch using a high-power plasma etching apparatus. The surface A is etched under normal conditions. As the plasma etching apparatus, an apparatus previously proposed by the present inventors in Japanese Patent Application No. 9-58878 is used. In this plasma etching apparatus, as shown in FIG. 4, an edge portion of a wafer 1 to be processed is gripped by a holder 51, the wafer 1 is held vertically, and set in a reaction chamber 50. A gas supply pipe 52 penetrating the reaction chamber 50 extends to a position facing the front or back surface of the wafer 1 so as to feed the etching gas 53 toward both the front and back surfaces of the wafer 1.

【0012】ガス供給管52内を通過するエッチングガ
ス53がマイクロ波励起によってプラズマ化されるよう
に、マグネトロン54から延びた導波管55がガス供給
管52を取り囲んでいる。プラズマ化により発生したラ
ジカル種56は、ガス供給管52からウェーハ1の表面
又は裏面に供給され、ウェーハ1のエッチングに使用さ
れる。ウェーハ1の裏面は多少のダメージがあっても支
障がないので、大きなプラズマ出力で被加工部Cを除去
できる。そのため、加工効率が向上すると共に、デバイ
スの製造工程に悪影響を及ぼすメタル等の不純物をダメ
ージ部分に捕捉するゲッタリング効果も得られる。
A waveguide 55 extending from a magnetron 54 surrounds the gas supply pipe 52 so that the etching gas 53 passing through the gas supply pipe 52 is turned into plasma by microwave excitation. The radical species 56 generated by the plasma are supplied from the gas supply pipe 52 to the front surface or the back surface of the wafer 1 and used for etching the wafer 1. Since there is no problem even if the back surface of the wafer 1 is slightly damaged, the processed portion C can be removed with a large plasma output. Therefore, not only the processing efficiency is improved, but also a gettering effect of capturing impurities such as metal that adversely affects the device manufacturing process at the damaged portion is obtained.

【0013】ウェーハ1の表面から被加工部Dを除去す
る際には、通常のエッチング条件が採用される。被加工
部C,Dの除去は、被加工部Cを除去した後で被加工部
Dを除去する2段階で、或いは被加工部C,Dを同時に
除去する1段階の何れで行っても良い。或いは、図4に
示すウェーハ1の両面に対向させたガス供給管52に替
えてウェーハ1の片面にガス供給管52を配置し、ウェ
ーハ1を反転させることによっても表裏両面が加工され
る。保持具51は、たとえば円周方向に等間隔でウェー
ハ1のエッジ部をつかみ、ウェーハ1の被加工部C又は
Dをラジカル種56に曝すようにウェーハ1を回転及び
/又は移動させる機構を備えている。このようにウェー
ハ1を電極に設置する必要がないマイクロ波励起のプラ
ズマを使用したエッチングの利点を活用し、ウェーハ1
をエッジ部で掴み、ガス供給管52から送り出されるラ
ジカル種56にウェーハ1の被加工部C又はDを曝すこ
とにより、ウェーハ1の表裏両面を高い平面度に加工す
ることが可能になる。
When removing the workpiece D from the surface of the wafer 1, ordinary etching conditions are employed. The removal of the workpieces C, D may be performed in either two steps of removing the workpiece D after removing the workpiece C, or in one step of removing the workpieces C, D simultaneously. . Alternatively, instead of the gas supply pipes 52 opposed to both sides of the wafer 1 shown in FIG. 4, the gas supply pipes 52 are arranged on one side of the wafer 1 and the wafer 1 is turned over to process both the front and back sides. The holder 51 is provided with a mechanism for, for example, gripping the edges of the wafer 1 at equal intervals in the circumferential direction and rotating and / or moving the wafer 1 so as to expose the processed portion C or D of the wafer 1 to the radical species 56. ing. In this way, the advantage of etching using microwave-excited plasma that does not require the wafer 1 to be placed on
And the exposed portion C or D of the wafer 1 is exposed to the radical species 56 sent out from the gas supply pipe 52, whereby both the front and back surfaces of the wafer 1 can be processed to a high flatness.

【0014】[0014]

【実施例】直径200mmの単結晶シリコンインゴット
から切り出され、両面研磨された平均厚み725μmの
ウェーハの平坦度を、図1に示す設備構成の形状測定器
を使用して測定した。ウェーハの表裏両面から得られた
干渉縞に基づいてウェーハ表面の断面形状を演算したと
ころ、図5に示すように表面及び裏面で高さが変動して
いた。表面側及び裏面側の高さ0μmのレベルを基準と
して隆起部を計算したところ、表面側隆起部の体積が1
5mm3 ,裏面側隆起部の体積が30mm3であった。
表裏両面に隆起部をもつウェーハ1を図4に示す反応チ
ャンバ50にセットし、隆起部をプラズマエッチングに
より表裏両面から除去した。
EXAMPLE A flatness of a wafer having an average thickness of 725 .mu.m, which was cut out from a single crystal silicon ingot having a diameter of 200 mm and polished on both sides, was measured using a shape measuring instrument having the equipment configuration shown in FIG. When the cross-sectional shape of the front surface of the wafer was calculated based on the interference fringes obtained from the front and back surfaces of the wafer, the height varied on the front surface and the back surface as shown in FIG. When the protrusions were calculated on the basis of the level of the height of 0 μm on the front side and the back side, the volume of the front side protrusion was 1
5 mm 3 , and the volume of the rear-side protuberance was 30 mm 3 .
The wafer 1 having protrusions on both front and back surfaces was set in the reaction chamber 50 shown in FIG. 4, and the protrusions were removed from both front and back surfaces by plasma etching.

【0015】裏面側隆起部の除去に当っては、周波数
2.45GHz,電力1KWのマイクロ波でエッチング
ガスSF6 を励起してプラズマを発生させ、プラズマ化
により発生したラジカル種56を、ガス供給管52を介
して真空度5トールの反応チャンバ50内に配置された
ウェーハ1に供給した。なお、ガス供給管52の開口部
とウェーハ1の裏面との間の間隔を5mmに、ガス供給
管52の開口径を10mmに設定した。エッチング中、
隆起部がラジカル種56に曝されるように、スキャンピ
ッチ10mmでウェーハ1を移動させた。表面側隆起部
に対しては、周波数2.45GHz,電力400Wのマ
イクロ波でエッチングガスSF6 を励起してプラズマを
発生させ、スキャンピッチ8mmでウェーハ1を移動さ
せる外は裏面側と同様な条件下でプラズマエッチングし
た。エッチングされたウェーハ1の表面形状を図1の形
状測定器で再度測定したところ、隆起部が表裏両面共に
2μm以下となった極めて平面度の高いウェーハである
ことが判った。
In removing the rear-side protuberance, the etching gas SF 6 is excited by a microwave having a frequency of 2.45 GHz and a power of 1 KW to generate plasma, and radical species 56 generated by the plasma are supplied to the gas supply. The wafer 1 was supplied via a tube 52 to a wafer 1 placed in a reaction chamber 50 at a vacuum degree of 5 Torr. The distance between the opening of the gas supply pipe 52 and the back surface of the wafer 1 was set to 5 mm, and the opening diameter of the gas supply pipe 52 was set to 10 mm. During etching,
The wafer 1 was moved at a scan pitch of 10 mm so that the ridge was exposed to the radical species 56. Except for moving the wafer 1 at a scan pitch of 8 mm, the same conditions as those on the back surface side are used to excite the etching gas SF 6 with a microwave of a frequency of 2.45 GHz and a power of 400 W to generate plasma, with respect to the front side protrusion. Plasma etched underneath. When the surface shape of the etched wafer 1 was measured again by the shape measuring instrument shown in FIG. 1, it was found that the wafer 1 had an extremely high flatness in which the protrusions were 2 μm or less on both the front and back surfaces.

【0016】[0016]

【発明の効果】以上に説明したように、本発明において
は、ウェーハ表裏両面の形状を測定し、得られた表面形
状及び裏面形状に基づいてウェーハ表面を選択的にエッ
チングすることにより、表裏両面共に平面度の高いウェ
ーハに加工している。このようにして得られたウェーハ
は、平面度が高い表面に各種機能層が形成されることか
ら、高信頼性の半導体デバイスを形成することが可能に
なる。また、後工程で種々の加工が施される際に真空チ
ャック等によって裏面側が吸着される場合にあっても、
作り込まれるデバイスに悪影響を及ぼすような変形を生
じることがない。
As described above, in the present invention, the shape of the front and back surfaces of a wafer is measured, and the front and back surfaces of the wafer are selectively etched based on the obtained surface shape and back surface shape. Both are processed into wafers with high flatness. In the wafer thus obtained, various functional layers are formed on the surface having a high flatness, so that a highly reliable semiconductor device can be formed. Also, even when the back side is sucked by a vacuum chuck or the like when various processes are performed in a later process,
There is no deformation that adversely affects the device to be built.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 基準平面レンズを使用してウェーハ表裏両面
の形状を測定する形状測定器
Fig. 1 A shape measuring instrument that measures the shape of both sides of a wafer using a reference plane lens

【図2】 三角プリズムを使用してウェーハ表裏両面の
形状を測定する形状測定器
Fig. 2 A shape measuring device that measures the shape of both sides of a wafer using a triangular prism.

【図3】 形状測定器で得られたウェーハ表裏両面の形
状(a),裏面側の被加工部が除去されたウェーハ
(b)及び表面側の被加工部が除去されたウェーハ
(c)
FIG. 3 shows the shape of the front and back surfaces of a wafer obtained by a shape measuring instrument (a), a wafer from which a processed part on the back side is removed (b), and a wafer from which a processed part on the front side is removed (c)

【図4】 本発明実施例で使用したプラズマエッチング
装置
FIG. 4 is a plasma etching apparatus used in an embodiment of the present invention.

【図5】 実施例で測定されたウェーハ表裏両面の形状FIG. 5 shows the shape of both sides of the wafer measured in the example.

【符号の説明】[Explanation of symbols]

1:ウェーハ 10,20:光学測定系 11,21:発光器 1
2,22:測定光 13,23:ハーフミラー 14,24:コリメータ
レンズ 15,25:基準平面レンズ 16,2
6:受光器 17,27:演算器 18,28:モ
ニタ 31,41:発光器 32,42:凸レンズ 3
3,43:コリメータレンズ 34,44:三角プリ
ズム 35,45:スクリーン 36,46:レン
ズ 37,47:テレビカメラ 38,48:演算
器 39,49:モニタ 50:反応チャンバ 51:保持具 52:ガス供
給管 53:エッチングガス 54:マグネトロン
55:導波管 56:ラジカル種 A:表面 B:裏面 C:裏面側加工部 D:裏
面側加工部
1: Wafer 10, 20: Optical measurement system 11, 21: Light emitting device 1
2, 22: measuring light 13, 23: half mirror 14, 24: collimator lens 15, 25: reference plane lens 16, 2
6: light receiver 17, 27: arithmetic unit 18, 28: monitor 31, 41: light emitter 32, 42: convex lens 3
3, 43: Collimator lens 34, 44: Triangular prism 35, 45: Screen 36, 46: Lens 37, 47: Television camera 38, 48: Computer 39, 49: Monitor 50: Reaction chamber 51: Holder 52: Gas Supply pipe 53: Etching gas 54: Magnetron 55: Waveguide 56: Radical species A: Front surface B: Back surface C: Back side processed part D: Back side processed part

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 鉛直保持したウェーハの表裏両面から得
られた光学干渉縞に基づきウェーハ表裏両面の形状を算
出し、基準となる表面よりも隆起している表裏両面の被
加工部をプラズマエッチングにより除去することを特徴
とする平面度の高いウェーハの製造方法。
1. The shape of both front and back surfaces of a wafer is calculated based on optical interference fringes obtained from both front and back surfaces of a vertically held wafer, and processed portions of both front and back surfaces which are raised from a reference surface are subjected to plasma etching. A method for manufacturing a wafer having a high flatness, characterized by removing.
【請求項2】 除去される被加工部が多い側を裏面と
し、大出力のプラズマを照射する請求項1記載の平面度
の高いウェーハの製造方法。
2. The method for manufacturing a wafer having high flatness according to claim 1, wherein a side having a large number of portions to be removed is set as a back surface, and high-power plasma is irradiated.
【請求項3】 表面側よりも大きなスキャンピッチで裏
面側をプラズマエッチングする請求項1記載の平面度の
高いウェーハの製造方法。
3. The method for manufacturing a wafer having high flatness according to claim 1, wherein plasma etching is performed on the rear surface side at a scan pitch larger than that on the front surface side.
JP470898A 1998-01-13 1998-01-13 Manufacture of wafer having high flatness Pending JPH11204464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP470898A JPH11204464A (en) 1998-01-13 1998-01-13 Manufacture of wafer having high flatness

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP470898A JPH11204464A (en) 1998-01-13 1998-01-13 Manufacture of wafer having high flatness

Publications (1)

Publication Number Publication Date
JPH11204464A true JPH11204464A (en) 1999-07-30

Family

ID=11591394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP470898A Pending JPH11204464A (en) 1998-01-13 1998-01-13 Manufacture of wafer having high flatness

Country Status (1)

Country Link
JP (1) JPH11204464A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008520528A (en) * 2004-11-19 2008-06-19 ヴェトロテヒ・サン−ゴバン・(インターナショナル)・アクチェンゲゼルシャフト Method and apparatus for processing streaks and planes on the surface of a glass plate
JP2008153404A (en) * 2006-12-15 2008-07-03 Shibaura Mechatronics Corp Flattening method and flattening device of semiconductor wafer and manufacturing method of semiconductor wafer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008520528A (en) * 2004-11-19 2008-06-19 ヴェトロテヒ・サン−ゴバン・(インターナショナル)・アクチェンゲゼルシャフト Method and apparatus for processing streaks and planes on the surface of a glass plate
JP2008153404A (en) * 2006-12-15 2008-07-03 Shibaura Mechatronics Corp Flattening method and flattening device of semiconductor wafer and manufacturing method of semiconductor wafer

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