JPH11163869A - Transmission method and device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively utilize memory source for band control and to reduce costs by controlling mass memory that is mounted on a switch part of an ATM exchange from a network interface card side and utilizing it for shaving. SOLUTION: A cell to an ATM terminal 31 is transmitted in a SW part 33 of an ATM exchange 30 at a transmission speed Y (e.g. Y=15) and is stored in a memory part 34. When a transmission speed X on the side of a network interface card(NIC) 32 is, for instance, X=3, a cell band control circuit 35 recognizes the ratio of the speeds X and Y, sends a band control signal to the part 34 based on it and controls them. For instance, when the ratio of the transmission speeds X and Y is 1 to 5, one cell is transferred to memory 32CA on the side of the NIC 32 every time five cells of the speed Y are stored in the part 34. Thus, the ATM cell can immediately be transmitted to the terminal 31.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a transmission method and apparatus which can be widely used in a communication system having a shaping function such as (Asynchronous Transfer Mode).

[0002]

2. Description of the Related Art A switch section of an ATM exchange and a plurality of input / output line corresponding sections NIC (Network Int.) Corresponding to each terminal.
2 is shown in FIG. In FIG.
The switch unit (SW) 10 of the ATM exchange 9 is an NIC 11
, And NICs 11 to 14 are connected to terminals 16 to 19, respectively.

[0003] In the ATM transmission, information is transmitted in a signal unit called a cell.
Although the speed is constant between 0 and each of the NICs 11 to 14, the speeds a to d are different between the NICs 11 to 14 and the terminals 16 to 19 as shown in the drawing, and the speeds Z are different for each NIC.

For example, focusing on the NIC 11, the following relationship exists between the transmission speeds Z and a.

(1) a = Z (2) a <Z In the former case (1), the bandwidths on the right side (the switch unit 10 side) and the left side (the terminal 16 side) of the NIC 11 coincide with each other. There is no need for control.

[0006]

However, in the latter case (2), there is a problem that the band a is narrower than the band Z. In the conversion of the transmission rate a → Z, that is, in the rate conversion from a to Z that occurs when the terminal 16 transmits, even if the speed is increased by inserting an empty cell into the increased band, the Z →
The problem remains in the conversion of a, that is, the speed conversion when the terminal 16 receives.

In this Z → a speed conversion, the only effective band in the band Z is a. A valid in band Z
When the band a of the TM cells is allocated uniformly, the band conversion can be performed by using only a small amount of memory on the NIC side. Must be used to perform bandwidth control.

That is, since the speed conversion from the speed Z to the speed a is performed by utilizing the difference between the writing speed and the reading speed of the memory mounted on the NIC side, a large amount of memory is required for each NIC, and a package is required. Problems such as difficulty in mounting and increase in cost arise.

[0009]

According to a first aspect of the present invention, a unit information transmitted at a first transmission rate in a first transmission unit is transmitted to a first transmission unit. In the second transmission means transferred via the mounted memory, in the transmission method of transmitting at a second transmission speed lower than the first transmission speed, the second transmission means is connected to the second transmission means via a transmission line. The second transmission unit, which attempts to transmit the unit information at the second transmission rate to the third transmission unit, controls the memory in the first transmission unit and stores the information in the memory. A timing for transferring the unit information to the second transmitting means is determined.

In the second invention, the unit information transmitted at the first transmission rate in the first transmission means is the first information.
Transmitted through the memory mounted on the transmission means of the second
In a transmission device transmitting at a second transmission speed lower than the first transmission speed, a transmission device connected to the second transmission device via a transmission line transmits the second transmission A second transmitting unit that transmits the unit information at a speed controls the memory in the first transmitting unit, and the unit information stored in the memory is transferred to the second transmitting unit. The timing is determined.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (A) Embodiment In this embodiment, a large amount of memory conventionally mounted in a switch section of an ATM exchange is controlled from the NIC side, and this memory is utilized for shaping. Features.

Hereinafter, a transmission method and apparatus according to the present invention will be referred to as A
One embodiment will be described with reference to the drawings, taking a case where the present invention is applied to a TM communication system as an example.

(A-1) Configuration of Embodiment FIG. 1 shows an outline of a main part of an ATM exchange, that is, a transmission apparatus 30 according to this embodiment.

In FIG. 1, a NIC 32 mounted on an ATM switch 30 corresponding to an ATM terminal 31 has a terminal 3
1 transmits and receives cells to and from a physical interface processing unit 32A for terminating an input line from 1; an ATM processing unit 32B for performing HEC (header error control) checking and header conversion; and a switch (SW) unit 33 inside the device. In addition to the provision of the in-apparatus IF unit 32C, by performing processing described later based on the band information on the NIC 32 side and the band information on the switch unit 33 side, the data is stored in the memory unit 34 mounted on the switch unit 33. The cell thus obtained is transferred to the IF section 32 in the apparatus.
A cell band control circuit 35 for transferring the data to the memory 32CA mounted on C is provided.

[0015] In addition to the ATM terminal, other ATM exchanges can be connected to the NIC.

Next, the internal configuration of the cell band control circuit 35 for controlling cell transfer from the memory section 34 to the memory 32CA will be described in detail.

(A-1-1) Detailed Configuration of Cell Band Control Circuit 35 The detailed configuration of the cell band control circuit 35 is shown in FIG.

In FIG. 3, a band information section 36 which is a register or ROM storing information on a transmission rate band X on the NIC 32 side and a transmission rate band Y on the switch section 33 side.
Is to inform the control unit 37 of these band information when necessary.

By performing processing described later based on the band information, a reset timing signal (band control signal) is generated and sent to the counter section 38, and the counter value C1 is reset. The counter value C1 received from the unit 38 is decoded and the memory unit 34 is decoded.
Has a function of generating a timing signal indicating the timing at which the cell is transferred to the memory 32CA and transmitting it to the memory controller 39 for controlling the memory 34. Eggplant

The counter unit 38 is provided with the NIC 32
It operates with a clock signal synchronized with both interfaces of the switch unit 33 and the switch unit 33, counts the number of ATM cells in the band Y, and sends the counter value C1 to the control unit 37.

On the other hand, the memory controller 39 transmits a read timing signal generated in accordance with the band control signal supplied from the controller 37 to the memory 34, and transmits the ATM cells stored in the memory 34. The memory 32CA
Is a controller that determines the timing of the transfer.

The configuration of the control unit 37 will be described in more detail.

(A-1-2) Detailed Configuration of Control Unit 37 In FIG. 4 showing the detailed configuration of the control unit 37, a counter for counting up from 0 to N is provided in the control unit 37 separately from the counter unit 38. 41 are provided. According to the counter value C2 of the counter 41, n of lines a to n
The selector 42 selects one of the +1 lines. The set value numbers 0, 1, 2,
.., N.

Set values A to N are set in advance for each of the lines a to n, and the selector 42 is used to output the set value of the line selected by the selector 42.
Is connected to the input terminal of the comparator 43.

The comparator 43 compares the selected set value with the counter value C1 of the counter unit 38 and outputs a reset timing signal (band control signal) when they match. And the counter section 38
And the memory controller 39.

Hereinafter, the operation of the present embodiment having the above configuration will be described.

(A-2) Operation of the Embodiment A cell transmitted to the ATM terminal 31 is transmitted through the switch unit 33 at the speed Y and stored in the memory unit 34. The timing of reading the cells stored in the memory unit 34 from the memory unit 34 is controlled by the cell band control circuit 35.

Next, the operation of the cell band control circuit 35 will be described.

(A-2-1) Operation of Cell Band Control Circuit 35 The transmission speed band X on the NIC 32 side is X = 3, and the transmission speed band Y on the switch unit 33 side is Y = 15.

In this case, the transmission speed band X on the NIC 32 side
= 3, the number of setting values is three, and only three lines of the setting value numbers 0, 1, and 2 are required.

As the band information, X = 1 and Y = 5 obtained by dividing the above X and Y by the greatest common divisor are stored in the band information section 36.

The control unit 37, which recognizes that the ratio of X and Y is 1: 5, stores five ATM cells of band Y in the memory unit 3.
Each time the data is stored in the memory unit 34, the ATM cells hatched in FIG.
Control to be transferred to In FIG. 5 (E), each cell without hatching, that is, each white cell corresponds to each clock in FIG. 5 (A) and is simply drawn to clearly indicate the passage of time, and does not actually exist. Cell. Here, for simplicity of description, the clock is an ATM including white cells in the band Y.
It is assumed that the detection timing coincides with the detection timing in the memory unit 34 of one cell.

First, in order to realize the cell transfer as shown in FIG. 5 (E), the control unit 37 sets the same set values of 4, 4, and 4 to all three lines. .

In the initial state, the counter values C1 and C2 of the counter 41 and the counter section 38 are both 0. At this time, since the counter value C2 of the counter 41 is 0, the selector 42 selects the line a of the set value 4 with the set value number 0, and the set value 4 is supplied to one input terminal of the comparator 43. I have.

Then, both the NIC 32 and the switch section 33 operate based on a common synchronous clock signal shown in FIG. This synchronous clock signal has the highest frequency at least in the cell band control circuit 35, and
The changes in the counter values in (B) and (D), the cell transfer (transmission) from the memory unit 34 in FIG. 5E, and the signal output from the comparator 43 in FIG. It is performed in synchronization with.

In this state, the ATM of the band Y is stored in the memory unit 34.
When one cell is stored, that is, when one clock of the synchronous clock signal is supplied, the counter value C1 of the counter unit 38 becomes 1, and the counter value C2 of the counter 41 maintains 0.

Each time a new clock is supplied, the counter 38 counts up by one, and becomes 4 which is the same as the set value of the line a.

At this time, the comparator 43, which recognizes that the values of the two input terminals have become the same, outputs the signal shown in FIG. 5C, and this signal is output to the counter 38, the counter 41, and the memory controller. 39.

This signal serves as a reset signal in the counter section 38, and the counter section 38 which has received the signal
Returns the counter value C1 to the initial value 0 as shown in FIG. In the counter 41, the counter value C2 is incremented by one by the same signal and becomes 1. Therefore, the selector 42 switches the selection from the line a to the line b.

Further, the same signal is supplied to the memory controller 39.
Then, it operates as a timing signal, that is, a band control signal, and operates the memory controller 39 at the supply timing so that the NIC 3
The one hatched ATM cell is transferred to the memory 32CA of the second in-device IF unit 32C. Therefore, the cell transfer rate from the memory unit 34 to the memory 32CA is X = 3.

This ATM cell is immediately stored in the memory 32CA.
From the terminal 31 to the terminal 31.

The line b is selected by the selector 42 when the counter value C2 changes to 1, but the set value of the line b is also 4 as described above. Is transferred from the switch unit 33 side to the NIC 32 side.
Can be transmitted to

Thereafter, this series of operations is repeated, and the band control of the ATM cells to be transferred is realized, so that the average cell transfer rate from the memory section 34 to the memory 32CA is (N
Not only is the band X) X = 3 on the IC 32 side, but the ATM cells being transferred are already shaped and transferred at even intervals.

Therefore, the memory 32CA does not need to store a large number of cells over a long period of time, and a small memory capacity is sufficient.

That is, the memory 32CA is a memory unit 34
While contributing to speed conversion of ATM cells in cooperation with
Since it does not have a shaping function, its capacity is small.

In the above example, since the bands X and Y have the least common multiple and all the set values are the same, it is not always necessary to prepare the number of lines corresponding to the band X. The operation of the cell band control circuit 35 in the case where Y and Y do not have the least common multiple and the meaning of providing the number of lines corresponding to the number of bands X becomes clearer will be described. For example,
This is the case where the bands X = 5 and Y = 13. Since X = 5, the required number of lines is five, that is, lines a to e (n).

In this case, the band information stored in the band information section 36 is, for example, [X = 1, Y = 3], [X = 1, Y =
2], [X = 1, Y = 2], [X = 1, Y = 4], [X = 1,
Y = 2].

The values set by the control unit 37 in the five prepared lines based on the values of Y of these five band information are:
Considering that the initial value of the counter 38 is 0, 1 is subtracted from the value of Y, A = 2, B = 1, C = 1, D =
3, E = 1.

That is, as shown in FIGS. 6C to 6E, when the counter value C2 is C2 = 0 and the set value A = 2, one cell is transferred to the NIC 32 for every three clocks. , C2 = 1 and the set value B = 1 is selected, one cell is transferred to the NIC 32 for every two clocks. Similarly, when the set value C = 1 is selected, 2
One cell per clock, one cell per four clocks when D = 3 is selected, and one cell per two clocks when E = 1 is selected.

The counter value C2 of the counter 41 is 0.
From 4 to 4 gives exactly 5 per 13 clocks
The cell is transferred to the NIC 32 side. Thereafter, similarly, the cell transfer of 5 cells is repeated for every 13 clocks.

Therefore, the ATM cell transferred to the memory 32CA mounted on the NIC 32 immediately
Since the data is transferred to 1, the memory 32CA requires a capacity for shaping, that is, a memory capacity required to enable reading so that the transmission speed of unit information such as cells does not exceed a certain value even instantaneously. And not.

In other words, unlike the prior art, the memory 32C
Since there is no substantial difference between the writing speed and the reading speed of A, no cells are accumulated and the memory capacity is small.
Since the shaping for the transmission path from the NIC 32 to the terminal 31 is performed by using the existing large capacity in the memory unit 34, the capacity of the memory 32CA is
This is because the minimum capacity for receiving the cells transferred from is sufficient.

When the above-mentioned bands X = 5 and Y = 13, in order to increase the degree of uniformity in allocating the bands and further save the capacity of the memory 32CA, the above-mentioned A is used.
= 2, B = 1, C = 1, D = 3, E = 1, for example, A
= 2, B = 2, C = 1, D = 2, E = 1, etc., it is better to reduce the variation between the set values.

(A-3) Effects of the Embodiment As described above, according to this embodiment, the amount of memory for shaping, which was conventionally required for each NIC, is eliminated, and N
Since the amount of memory on the IC side can be reduced, package mounting on the NIC can be facilitated, cost can be reduced, and cell transmission speed conversion can be performed more easily.

When there are no cells to be transmitted to the ATM terminal 31, the memory 32CA mounted on the NIC 32 is not used, whereas the memory unit 34 mounted on the switch unit 33 is different from the ATM terminal other than the terminal 31 and other devices. Can also be used to temporarily store cells sent to the switch in
The method according to the present embodiment, in which a large-capacity memory is not provided on the NIC side, makes it possible to increase the memory utilization efficiency of the entire system as compared with the conventional method, and to use limited memory resources more effectively.

(B) Other Embodiments In the above description, the case where the present invention is applied to the ATM exchange has been described. In addition to the ATM exchange, the present invention provides the first transmission means in the first transmission means. The unit information transmitted at the speed is transmitted at a second transmission speed lower than the first transmission speed in the second transmission device transferred via the memory mounted on the first transmission device. In the transmission method, it can be widely applied, for example, to packet exchange and the like.

In the description of the present embodiment, the setting value is automatically set by the control unit 37. However, the setting value may be set in advance when the terminal 31 is connected to the ATM exchange 30. Good.

The above-described band control may be performed by setting a transfer pattern from the memory unit 34 on the switch unit 33 side to the memory 32CA instead of setting a numerical value.

[0059]

As described above, according to the present invention, the memory for shaping which has been conventionally required for each second transmission means is eliminated, and the package mounting on the second transmission means is facilitated. It is possible to reduce the cost and more easily perform the transmission speed conversion of the unit information.

In addition, as a whole system including the first and second transmission means, it becomes possible to more effectively utilize limited memory resources.

[Brief description of the drawings]

FIG. 1 is a block diagram schematically showing an ATM exchange according to an embodiment.

FIG. 2 is a block diagram schematically showing a conventional ATM exchange.

FIG. 3 is a block diagram illustrating a detailed configuration of a cell band control circuit and a memory unit of a switch unit in the ATM exchange according to the embodiment;

FIG. 4 is a block diagram showing a detailed configuration of a control unit in the ATM exchange according to the embodiment.

FIG. 5 is a time chart illustrating an operation of the cell band control circuit according to the embodiment.

FIG. 6 is a time chart illustrating an operation of the cell band control circuit according to the embodiment;

[Explanation of symbols]

9,30 ... ATM switch, 10,33 ... Switch (S
W) part, 11 to 14, 32... NIC, 16 to 19, 31
... ATM terminal, 34 ... memory unit, 35 ... cell band control circuit, 37 ... control unit, 38 ... counter unit, 41 ... counter, 42 ... selector, 43 ... comparator, C1, C2 ... counter value, a to d , X to Z: Transmission speed.

Claims (8)

[Claims] The unit information transmitted at a first transmission rate in a first transmission means is transferred in a second transmission means via a memory mounted on the first transmission means. In a transmission method for transmitting data at a second transmission speed lower than the first transmission speed, the unit information is transmitted at a second transmission speed to a third transmission device connected to the second transmission device via a transmission line. The second transmitting means to be transmitted controls the memory in the first transmitting means to determine the timing at which the unit information stored in the memory is transferred to the second transmitting means. Characteristic transmission method. 2. The transmission method according to claim 1, wherein the timing is such that a ratio of a speed at which the unit information is stored in a memory to a speed at which the unit information is transferred from the memory to a second transmitting means is equal to a first and a second. A transmission method characterized in that the transmission speed is determined so as to be equal to the transmission speed ratio and to be equally spaced. 3. The transmission method according to claim 1, wherein a plurality of reference values are set so that an average value corresponds to a ratio between the first and second transmission speeds. Generating a clock corresponding to a first transmission rate in the means, outputting a counter value that changes sequentially with each generation of the clock, and one reference value selected from the plurality of reference values and this counter value And transferring the unit information from the memory to the second transmitting means at the timing when they coincide with each other, changing the selection of the reference value, and resetting the counter value to an initial value. Transmission method to do. 4. The transmission method according to claim 1, wherein the first transmission unit is a switch unit in the ATM exchange, and the second transmission unit is connected to an external unit provided in the ATM exchange. Wherein the unit information is a fixed-length ATM cell. 5. The method according to claim 1, wherein the unit information transmitted at the first transmission rate in the first transmission means is transferred via a memory mounted on the first transmission means in the second transmission means. In a transmission device transmitting at a second transmission speed lower than the first transmission speed, the unit information is transmitted at a second transmission speed to a third transmission device connected to a second transmission device via a transmission line. The second transmitting means to be transmitted controls the memory in the first transmitting means to determine the timing at which the unit information stored in the memory is transferred to the second transmitting means. Characteristic transmission equipment. 6. The transmission device according to claim 5, wherein the timing is such that a ratio of a speed at which the unit information is stored in the memory to a speed at which the unit information is transferred from the memory to the second transmitting means is equal to the first and the second. A transmission apparatus characterized in that the transmission rate is determined so as to be equal to the transmission speed ratio and to be equally spaced. 7. The transmission device according to claim 5, wherein a plurality of reference values are set so that an average value corresponds to a ratio between the first and second transmission speeds, and the first and second transmission rates are set. Means for generating a clock corresponding to a first transmission speed in the means; a counter for outputting a counter value which changes sequentially each time this clock is generated; one reference value selected from the plurality of reference values And a means for comparing the counter value with the counter value. At the timing when they match, transfer the unit information from the memory to the second transmitting means, change the selection of the reference value, and further set the counter value to the initial value. Reset means for resetting. 8. The transmission device according to claim 5, wherein the first transmission means is a switch unit in the ATM exchange, and the second transmission means is connected to an external unit provided in the ATM exchange. Wherein the unit information is a fixed-length ATM cell.