JPH11136047A - High frequency power amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the area of an expensive GaAs chip and then to reduce the cost of a high frequency power amplifier by adding the bypass capacitors used to a drain bias circuit and a gate bias circuit of a GaAs FET into a silicon IC chip including an attached circuit not into a GaAs MMIC chip. SOLUTION: The bypass capacitors 14/16 and 15/17 which secure the connection between a DC/DC converter 23 and the voltage output terminals 24/26 and the capacitor terminals 25 and 27 respectively are built into a silicon IC chip 2. The negative output VGG of the converter 23 is supplied via the gate voltage supply terminals 18 and 20 and the choke coils 10 and 12 as the gate bias voltage of FET 5 and 7 of a GaAs MMIC chip 1. At the same time, the drain bias voltage of the FET 5 and 7 are supplied from the outside via the drain voltage supply terminals 19 and 21 and the choke coils 11 and 13 of the chip 1. In such a constitution, the area of the chip 1 is reduced and accordingly the cost is reduced for a high frequency power amplifier.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a GaAs MMIC including a GaAs FET as a high-frequency amplifier,
The present invention relates to a high-frequency power amplifier including a silicon IC including an associated circuit for AsMMIC.

[0002]

2. Description of the Related Art FIG.
1 shows an example of a high-frequency power amplifier including an ET.

In this example, a GaAs MMI having a two-stage FET configuration is used.
This is an example in which a C chip 1 and a silicon IC chip 2 including a DC / DC converter 23 as an associated circuit are housed in the same package.

A DC / DC converter 23 is provided for converting a positive voltage to a negative voltage and obtaining a gate voltage of the GaAs FET.

A high-frequency input signal is connected from a signal input terminal 3 in the GaAs MMIC chip 1 to the gate of the first-stage FET 5 via an input matching circuit 4, and the drain of the FET 5 is further connected via a DC cut capacitor 6 to a subsequent stage. FE
The drain of the FET 7 is connected to the signal output terminal 9 via the output matching circuit 8.

The drain voltage of each FET is input from drain voltage supply terminals 19 and 21 and supplied to the drains of FETs 5 and 7 via choke coils 11 and 13, respectively.

On the other hand, regarding the gate voltage of each FET,
The voltage + VGG supplied from the voltage input terminal 22 is converted into a voltage −VG by the DC / DC converter 23 in the silicon IC 2.
G is output from the voltage output terminal 24 and is output through the gate voltage supply terminals 18 and 20 to the choke coil 1.
The signals are supplied to the gates of FETs 5 and 7 via 0 and 12, respectively.

In the GaAs MMIC chip 1,
As the bias circuits for the FETs 5 and 7, bypass capacitors 14, 15, 16 and 17 for preventing oscillation are provided together with the choke coils 10, 11, 12 and 13.

[0009]

The high-frequency power amplifier is provided with many capacitors, but a large-capacity bypass capacitor for preventing oscillation is required.

In the conventional high-frequency power amplifier as described above, since these bypass capacitors are formed in an expensive GaAs chip, the area of the GaAs chip is increased, which is one of the factors that raises the cost.

An object of the present invention is to provide a high-frequency power amplifier which can solve the above problems and can reduce the cost.

[0012]

In order to achieve the above object, the present invention relates to a high frequency power amplifier comprising a GaAs MMIC including a GaAs FET as a high frequency amplifying element and a silicon IC including an associated circuit for the GaAs MMIC. Each bypass capacitor used for the drain bias circuit and the gate bias circuit,
It was provided inside the silicon IC and connected to each of the bias circuits.

[0013]

FIG. 1 is a circuit diagram of an embodiment of a high-frequency power amplifier according to the present invention. In this embodiment, the configuration of the present invention is applied to a power amplifier equivalent to the conventional example shown in FIG. Things.

In this embodiment, bypass capacitors 14, 15, 16, 17 are built in the silicon IC chip 2 together with the DC / DC converter 23, and these capacitors have terminals 24, 25, 26, 27, respectively. Through the GaAs chip 1 side.

Power is supplied from the voltage input terminal 22 and the DC / D
Output voltage -VG whose polarity has been converted by C converter 23
G is output from the voltage output terminals 24 and 26.

The voltage output terminals 24 and 26 are connected to bypass capacitors 14 and 16, respectively, and the capacitor terminals 25 and 27 are connected to bypass capacitors 15 and 17, respectively.

The voltage output terminals 24 and 26 are connected to gate voltage and voltage supply terminals 18 and 20, respectively, and supply gate bias voltages to the FETs 5 and 7 via the choke coils 10 and 12, respectively.

The capacitor terminals 25 and 27 are connected to drain voltage supply terminals 19 and 21 (a drain voltage is supplied from an external circuit), respectively.
9 and 21 are FETs via the choke coils 11 and 13
Drain bias voltages are supplied to 5 and 7, respectively.

As described above, in this embodiment, the large-capacity bypass capacitors 14, 15, 1617 are connected to the D of the associated circuit.
Silicon IC chip 2 together with C / DC converter 23
Since it is built in the GaAs chip, the area of the expensive GaAs chip can be reduced and the cost can be reduced.

[0020]

As described above, in the high-frequency power amplifier of the present invention, each bypass capacitor used for the drain bias circuit and the gate bias circuit of the GaAs FET is provided not in the GaAs MMIC chip but in the silicon IC chip including the associated circuit. , The area of the expensive GaAs chip can be reduced, and the cost of the high-frequency power amplifier can be reduced.

Further, as shown in the embodiment, when a silicon IC chip has a built-in accessory circuit such as a DC / DC converter directly connected to a bias power supply, a wiring connection with a bypass capacitor in the same chip. Can be
Connection between chips can be simplified.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of a high-frequency power amplifier according to the present invention.

FIG. 2 is a circuit diagram of a conventional example of a high-frequency power amplifier.

[Explanation of symbols]

 1: GaAs MMIC chip 2: silicon IC chip 3: signal input terminal 4: input matching circuit 5, 7: FET 6: DC cut capacitor 8: output matching circuit 9: signal output terminal 10, 11, 12, 13: choke coil 14, 15, 16, 17: bypass capacitors 18, 20: gate voltage supply terminals 19, 21: drain voltage supply terminals 22: voltage input terminals 23: DC / DC converters 24, 26: voltage output terminals 25, 27: for capacitors Terminal.

Claims (1)

[Claims] 1. A high frequency power amplifier comprising a GaAs MMIC including a GaAs FET as a high frequency amplifying element and a silicon IC including an auxiliary circuit for the GaAs MMIC, wherein each bypass capacitor used for a drain bias circuit and a gate bias circuit of the GaAs FET is provided. A high frequency power amplifier provided inside the silicon IC and connected to each of the bias circuits.