JPH1084126A - Semiconductor element and solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the manufacture of a good quality thin film single crystal solar cell possible by a method wherein a semiconductor junction is formed between a thin film single crystal semiconductor layer obtained by growing epitaxially and a polycrystalline silicon layer. SOLUTION: An SiO2 layer is deposited on the surface of a porous silicon layer 103 formed on a wafer 101 as an insulating layer, a wet etching is performed to form a lattice point-shaped insulating layer 102, then, a selective growth is performed to form an epitaxial silicon layer 104. Moreover, the SiO2 insulating layer 102 is removed and a selective etching of the layer 103 is performed. The layer 104 is put on the SUS substrate 101 on which a Cr layer and a silicide layer 107 are deposited is formed on the interface between the surface of the Cr layer and the layer 104 by an annealing treatment to fix the layer 104 on the substrate. Then, a thermal diffusion of P is performed in the surface of the layer 104 to form an n<+> layer 108 and after a wet oxidation, the Cr layer is also oxidized to form insulating layers 109 and lastly, a TTO transparent conductive film and a current collecting electrode are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a solar cell and a solar cell. Particularly, the present invention relates to a solar cell having good energy conversion efficiency.

[0002]

2. Description of the Related Art In various devices, a solar cell is used as a driving energy source.

[0003] A solar cell uses a pn junction for a functional part, and silicon is generally used as a semiconductor constituting the pn junction. Silicon forms used as semiconductors include single crystal, polycrystalline, and amorphous.
Amorphous silicon is considered advantageous in terms of large area and low cost, but single crystal silicon is preferably used in terms of efficiency and stability in converting light energy into electromotive force.

[0004] In recent years, the use of polycrystalline silicon has been studied for the purpose of obtaining low cost comparable to amorphous silicon and high energy conversion efficiency comparable to single crystal silicon. However, it is difficult to reduce the thickness to 0.3 mm or less using the conventionally proposed method by slicing a lump polycrystal into a plate-like body just like the case of single crystal silicon. Therefore, the thickness is more than necessary to sufficiently absorb the light quantity, and in this regard, the effective use of the material is not sufficient. That is, it is necessary to reduce the thickness sufficiently in order to reduce the cost. Recently, a method of forming a silicon sheet by a spin method in which molten silicon droplets are poured into a mold has been proposed, but the thickness is at least 0.1 mm.
The thickness is about 0.2 mm, and the thickness is still not sufficiently reduced as compared with the film thickness (20 to 50 μm) necessary and sufficient for light absorption as crystalline silicon.

[0005]

In view of the above, moreover, by separating (peeling) the epitaxial layer of a thin film grown on a single crystal silicon substrate from the substrate and using it in a solar cell, high energy conversion efficiency and low cost can be achieved. Attempts to achieve have been proposed (Milnes, AG and Fe
ucht, D .; L. , "Peel-ed Film T
technology Solar Cells ", IEEE
E Photo-voltaic Specialis
t Conference, p. 338, 1975).

However, in the above-described method, SiGe is provided between the single crystal silicon as a substrate and the grown epitaxial layer.
It is necessary to insert the intermediate layer and perform heteroepitaxial growth and then selectively melt this intermediate layer to peel off the grown layer. In general, when heteroepitaxial growth is performed, the lattice constant is different, so that defects are likely to be induced at the growth interface. In addition, process and
It cannot be said that it is advantageous in terms of cost.

On the other hand, U.S. Pat. S. Pat. No. 4,81
6,420, that is, a sheet-like crystal is formed on a crystal substrate through a mask material by selective epitaxial growth and lateral growth, and then separated from the substrate. It was shown that a thin crystalline solar cell could be obtained by the manufacturing method.

However, the openings provided in the mask material in the above-described method are linear, and sheet-like crystals grown by selective epitaxial growth and lateral growth are separated from the line seeds. If the shape of the line seed is larger than a certain size because it is mechanically peeled by using the opening, the contact area with the substrate increases, so that the sheet crystal is damaged during the peeling. In particular, when increasing the area of a solar cell, the line length is several meters, no matter how narrow the line width is (actually around 1 μm).
When the size is from m to several cm or more, it becomes a fatal problem.

In the method described above, S is used as a mask material.
Although an example is shown in which a silicon thin film is grown by selective epitaxial growth and lateral growth at a substrate temperature of 1000 ° C. using iO ₂ , the reaction between the growing silicon layer and SiO _{2 at} such a high temperature is described. In the vicinity of the silicon layer / SiO ₂ interface, a considerable stacking fault (plane defect) may be introduced on the silicon layer side. Such defects have a great adverse effect on the characteristics of the solar cell.

The method of the present invention eliminates the above-mentioned disadvantages of the prior art and provides a method of manufacturing a high-quality thin-film single-crystal solar cell.

An object of the present invention is to provide a high quality solar cell using a single crystal semiconductor.

It is another object of the present invention to provide an inexpensive solar cell by transferring an epitaxial layer formed on a silicon wafer to a substrate such as a SUS substrate.

[0013]

The present invention firstly comprises a thin film single crystal semiconductor and polycrystalline silicon obtained by epitaxial growth, and formed between the thin film single crystal semiconductor and the polycrystalline silicon. A semiconductor element having a semiconductor junction has a first feature. Second, the semiconductor element has a thin film single crystal semiconductor, polycrystalline silicon, and a pair of electrodes obtained by epitaxial growth. And a solar cell having a semiconductor junction between the solar cell and the solar cell.

The solar cell of the present invention comprises: i) a step of forming a porous layer on one surface of a silicon wafer by anodization; and ii) forming an insulating layer on the porous layer and patterning the insulating layer. Iii) a step of forming a silicon layer on a porous surface of the substrate other than the insulating layer by selective epitaxial growth, and iv) a semiconductor bonding to a surface of the silicon layer. And v) a step of removing the insulating layer and the porous layer by etching through a gap formed on the insulating layer to separate the silicon layer from the substrate. Is what you do.

As shown in FIG. 3, the main technique of the present invention is to make the surface of a silicon wafer porous by anodizing in an HF solution, and to form a partially non-nucleated surface and a porous surface on the silicon wafer. The purpose of the present invention is to form a single-crystal silicon thin film by stacking a silicon layer by selective epitaxial growth performed using the method and selectively removing the porous layer through a gap on the non-nucleation surface by selective etching.

Here, the general principle of the selective epitaxial growth method will be briefly described. As shown in FIGS. 2A and 2B, the selective epitaxial growth method refers to a method of performing epitaxial growth using a vapor phase growth method or the like on an insulating layer such as an oxide film formed on a silicon wafer. Is a selective crystal growth method in which epitaxial growth is performed using an exposed silicon surface other than the insulating layer as a seed crystal under conditions such that nucleation does not occur.

The formation of porous silicon by anodization requires holes for the anodic reaction, and therefore, it is said that porosification is performed mainly with p-type silicon having holes (T. Unagami, J. Electrochem.
Soc. , Vol. 127, 476 (1980)).

However, on the other hand, there is a report that low-resistance n-type silicon can be made porous (RP Holm).
strom and J.M. Y. Chi, Appl. P
hys. Lett. , Vol. 42,386 (198)
3)), regardless of whether it is p-type or n-type, it can be made porous with low-resistance silicon. According to transmission electron microscope observation, porous silicon obtained by anodizing single crystal silicon has pores with a diameter of about several hundreds of mm, and the density is less than half that of single crystal silicon. Nevertheless, single crystallinity is maintained, and it is generally well known that an epitaxial layer is grown on porous silicon by LPCVD or the like. Further, as described above, porous silicon has a large amount of voids therein, and its surface area is dramatically increased as compared to its volume. Therefore, the chemical etching rate is significantly increased compared to the etching rate of ordinary single crystal silicon. Speeded up.

Conventionally, a conventional selective etching solution for crystalline silicon and porous silicon is only an aqueous solution of NaOH. In the selective etching of porous silicon using this aqueous solution of NaOH, Na ions are adsorbed on the etching surface. Therefore, there is a problem that impurity contamination is caused.

The present inventors have repeated experiments and formed an insulating layer partially serving as a non-nucleation surface on the upper surface of the porous silicon layer, so that the porous surface was formed by selective epitaxial growth using the insulating layer and the porous surface. A single-crystal silicon layer can be formed only on the top, and only a porous silicon layer is selected with a mixed solution of hydrofluoric acid, alcohol, and hydrogen peroxide that has no etching effect on crystalline silicon through voids in the insulating layer And found that it can be etched.
As a result, they have found that a high-quality thin-film single-crystal silicon layer can be transferred onto a non-single-crystal substrate such as a metal substrate, and have completed the present invention. Hereinafter, the experiments performed by the present inventors will be described in detail.

(Experiment 1) Formation of Porous Silicon A p having a thickness of 500 μm and a specific resistance of 0.01 Ω · cm
The mold (100) single crystal silicon wafer was anodized in an aqueous HF solution. Table 1 shows the anodizing conditions.

When the surface of the obtained porous silicon layer was observed with a transmission electron microscope, holes having an average diameter of about 600 mm were formed. When the cross section of the porous silicon layer was observed with a high-resolution scanning electron microscope, it was confirmed that minute holes were formed in a direction perpendicular to the substrate. Further, when the time of anodization was increased under the conditions of Table 1 to increase the thickness of the porous silicon layer and the density was measured,
The density of the porous silicon layer was found to be 1.1 g / cm ³ , which was about half that of single crystal silicon.

[0023]

[Table 1]

(Experiment 2) Selective using porous silicon
On the surface of the porous silicon layer on the wafer formed in the epitaxial growth method experiment 1, as shown in FIG. 3A, a thermal oxide film is formed as an insulating layer 302 at 3000.degree., And etched using photolithography. = 70 μm and patterned at intervals of b = 400 μm. Next, selective epitaxial growth was performed by a normal low pressure CVD method (LPCVD method). SiH ₂ Cl ₂ was used as a raw material, H ₂ was added as a carrier gas, and HCl was further added to suppress generation of nuclei on an oxide film of an insulating layer. Table 2 shows the growth conditions at this time.

When the state of the crystal growth surface after the completion of the growth was observed with an optical microscope and a scanning electron microscope, it was confirmed that the state was as shown in FIG. 3B.

[0026]

[Table 2]

Here, a flat surface was obtained, and when the cross section of the growth layer was observed with a transmission electron microscope, it was confirmed that the single crystal epitaxial layer had good crystallinity. FIGS. 4A and 4B show the state before and after the growth as viewed from above the substrate, respectively. The size of the air gap is smaller than that of the insulating layer because the epitaxial layer overgrows on the insulating layer.

(Experiment 3) Selective etching of porous silicon
The etching of porous silicon produced under the same conditions as in the first experiment using a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide was investigated.

FIG. 5 shows that 49% hydrofluoric acid, 100% ethyl alcohol and 30%
The time dependence of the thickness of the etched porous silicon and single crystal silicon when infiltrating into the mixed solution (10: 6: 50) with the aqueous hydrogen peroxide without stirring is shown. The thicknesses of porous silicon and single crystal silicon before the start of etching were 300 μm and 500 μm, respectively.

When the porous silicon and the single crystal silicon were infiltrated into the above-mentioned mixed solution at room temperature and the decrease in thickness was measured.
Porous silicon is rapidly etched, leaving about 1
07 μm, and 244 μm after 80 minutes. Despite such a high etching rate, the surface after etching was very flat. In contrast,
In the case of single crystal silicon, even after 120 minutes had passed, the etched thickness was 50 ° or less, which revealed that the silicon was hardly etched.

(Experiment 4) By removing the insulating layer and the porous layer
The wafer on which the epitaxial film 305 was grown on the porous silicon 304 obtained in the separation experiment 2 of the epitaxial film was immersed in an HF aqueous solution, and the oxide film 302 as an insulating layer was removed by etching through the void 303 (FIG. c)). Next, when the wafer was immersed in the same mixed etching solution as above and allowed to stand,
03, only the porous silicon was selectively etched, and the epitaxial film 305 was separated from the wafer (FIG. 3D). The state of the epitaxial surface (the side facing the porous layer) after washing / drying was observed with a high-resolution scanning electron microscope. As a result, a very flat single-crystal silicon layer having a thickness of about 13 μm was formed. I was When the surface of the wafer (the side facing the porous layer) was similarly observed, it was found to be very flat.

(Experiment 5) Formation of Solar Cell A solar cell was manufactured based on the results of Experiments 1 to 4. A porous silicon layer was formed on a silicon wafer under the conditions shown in Table 1 in the same manner as in Experiment 1. A thermal oxide film is formed as an insulating layer on the surface of the porous silicon at 3000.degree.
It was patterned into a μm square and provided at intervals of b = 400 μm. Next, selective epitaxial growth was performed using a conventional LPCVD apparatus under the conditions shown in Table 2. In the same manner as in Experiment 4, the wafer is immersed in an aqueous HF solution to remove the oxide film through the voids, and further infiltrated in a mixed solution of hydrofluoric acid / ethyl alcohol / hydrogen peroxide to selectively etch the porous silicon. And the epitaxial film were separated. After the separated epitaxial thin film is washed / dried, it is placed on a metal substrate (Cr substrate) and annealed at 600 ° C. in N ₂ to form a silicide layer at the interface between the metal (Cr) and the epitaxial layer. An epitaxial layer was fixed thereon.

Next, the surface of the epitaxial layer and the surface of the metal (Cr) exposed in the voids of the epitaxial layer were simultaneously oxidized while maintaining the temperature at 900 ° C. in an O ₂ atmosphere. H
Only the oxide film on the surface of the epitaxial layer was etched with an aqueous F solution to expose the silicon surface.

Next, P is applied to the surface of the epitaxial layer by 50K.
ion implantation at eV, 1 × 10 ¹⁵ cm ⁻² , and 55
0 ℃, 1hour / 800 ℃, 30min / 550 ℃,
Continuous annealing was performed under the condition of 1 hour to activate the impurities and recover the damage caused by ion implantation to form a junction. Finally, a transparent conductive film and a current collecting electrode were vacuum-deposited on the surface of the epitaxial layer to produce a solar cell.

The current-voltage characteristics (IV characteristics) under irradiation of AM1.5 (100 mW / cm ² ) light of the solar cell formed by separating the epitaxial thin film grown on the porous material from the wafer in this manner were formed. ) was subjected to measurement for the open-circuit voltage 0.56V in cell area 6 cm ^2, short-circuit photoelectric current 30 mA / cm ^2, a fill factor 0.74, the conversion efficiency 1
2.4%, and a good crystalline solar cell was obtained.

A feature of the present invention is that the wafer for forming the porous layer can be reused, which is advantageous in cost.

In the anodization for forming the porous silicon layer used in the present invention, a hydrofluoric acid solution is used.
When the F concentration is 10% or more, porosity can be obtained. The amount of current flowing during anodization is appropriately determined depending on the HF concentration, the desired thickness of the porous layer, and the like.
cm ² - several ten mA / cm ² range are suitable. Also HF
By adding alcohol such as ethyl alcohol to the solution, bubbles of the reaction gas generated during anodization can be removed from the reaction surface without instantaneous stirring, and porous silicon can be formed uniformly and efficiently. . The amount of the alcohol to be added is appropriately determined depending on the HF concentration and the desired thickness of the porous layer, and it is particularly necessary to carefully determine that the HF concentration does not become too low.

As the selective etching solution for porous silicon used in the present invention, a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide solution is used. In particular, by adding hydrogen peroxide solution, the oxidation of silicon can be accelerated, and therefore the reaction rate can be increased compared to the case without addition, and the reaction rate can be controlled by changing the ratio of hydrogen peroxide solution. can do. In addition, by adding alcohol such as ethyl alcohol, bubbles of a reaction gas generated by etching can be instantaneously removed from the etching surface without stirring, and porous silicon can be uniformly and efficiently etched. The conditions of each solution concentration of the etchant and the temperature at the time of etching are such that the etching rate of porous silicon and the selectivity of etching between porous silicon and ordinary single-crystal silicon are within the range where there is no practical problem in the manufacturing process, etc. It is determined appropriately within a range where the effect of alcohol is not impaired.

In the present invention, as the material of the insulating layer which is provided on the porous silicon and serves as a non-nucleation surface, the nucleation density on the surface is considerably higher than that of silicon in terms of suppressing nucleation during epitaxial layer growth. A small material is used. For example, SiO ₂ , Si ₃ N _{4 and the} like are used as representatives. The thickness of the insulating layer is not particularly limited, but is preferably in the range of 0.1 to 1 μm.

The shape of the non-nucleation surface provided on the porous silicon in the present invention is not particularly limited, and may be any shape. In the case of a square, the length of the side is the thickness of the epitaxial layer to be grown. Depending on the size, a = 30 to 300 μm is appropriate. The method of arranging the non-nucleation surface is not particularly limited, but a lattice point is a typical example. The interval (period) at which the non-nucleation surfaces are arranged is appropriately determined by the thickness of the insulating layer serving as the non-nucleation surface and the thickness of the epitaxial layer.
= 50 μm to 5 mm is appropriate.

Examples of the method of forming the insulating layer serving as the non-nucleation surface include thermal oxidation and normal pressure CVD for SiO ₂ , and LPCVD and plasma CVD for Si ₃ N _4.
The VD method or the like is used.

The selective epitaxial growth method used in the present invention includes LPCVD, sputtering, and plasma CVD.
Method, a photo-CVD method or a liquid phase growth method. For example, L
The source gas used in the case of a vapor phase growth method such as a PCVD method, a plasma CVD method or a photo CVD method is SiH ₂
Cl ₂ , SiCl ₄ , SiHCl ₃ , SiH ₄ , Si ₂ H ₆ ,
Representative examples include silanes such as SiH ₂ F ₂ and Si ₂ F ₆ and halogenated silanes. In addition, H ₂ is added as a carrier gas or in order to obtain a reducing atmosphere for promoting crystal growth, in addition to the above-mentioned source gas.
The ratio of the amount of the source gas to the amount of hydrogen is appropriately determined as desired depending on the forming method, the type of the source gas, and the forming conditions, but is preferably 1:10 or more and 1: 1000 or less (introduction flow ratio). Preferably 1:20
It is desirable to set the ratio to 1: 800 or less.

In the vapor phase growth method, HCl is used for the purpose of suppressing generation of nuclei on the insulating layer. The amount of HCl added to the source gas depends on the forming method, the type of the source gas and the material of the insulating layer. It can be determined as desired according to the forming conditions, but generally from 1: 0.1 to 1:10
A value of 0 or less is appropriate, and a more preferred range is from 1: 0.2 to 1:80.

When the liquid phase growth method is used, Si is dissolved in a solvent such as Ga, In, Sb, Bi, Sn or the like in an H ₂ or N ₂ atmosphere, and the solvent is gradually cooled or a temperature difference is caused in the solvent. To perform epitaxial growth. When Sn is used as a solvent, the resulting crystal is electrically neutral, and the conductivity type can be determined at a desired doping concentration by adding a desired impurity as needed after or during growth.

The temperature and pressure in the selective epitaxial growth method used in the present invention vary depending on the forming method, the kind of the raw material gas used, the flow rate ratio between the raw material gas and H _2, and the like. Is, for example, approximately 600 ° C. or higher and 1250
C. or less, more preferably 650.degree.
It is desirable that the temperature be controlled to 00 ° C. or less. In the case of the liquid phase growth method, it depends on the kind of the solvent, but when Sn is used, it is 850.
It is desirable that the temperature be controlled to be not lower than 1050 ° C. In a low-temperature process such as a plasma CVD method, the temperature is preferably 200 ° C. or higher and 600 ° C. or lower, more preferably 200 ° C.
It is desirable that the temperature be controlled to at least 500 ° C.

Similarly, the pressure is approximately 10 ⁻² Torr.
~ 760 Torr is appropriate, and more preferably 10 ^-1.
A range of Torr to 760 Torr is desirable.

In the method for manufacturing a solar cell according to the present invention, any metal which has good conductivity and forms a compound such as silicon and silicide is used as a metal substrate material for transferring an epitaxial film. Mo, C
r and the like. Of course, any other material may be used as long as the metal having the above-mentioned properties is adhered to the surface, and an inexpensive substrate other than the metal can be used. The thickness of the silicide layer is not particularly limited, but is desirably 0.01 to 0.1 μm.

The depth of the junction formed in the method of manufacturing a solar cell according to the present invention is suitably in the range of 0.05 to 3 μm, preferably 0.1 to 3 μm, though it depends on the amount of impurities to be introduced. It is desirable that the thickness be 1 to 1 μm.

[0049]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in more detail with reference to specific examples, but the present invention is not limited to these examples.

Example 1 As described above, an epitaxial silicon thin film solar cell was manufactured by the process shown in FIG. 1 in the same manner as in Experiments 1 to 5.

Anodization was performed on a 500 μm-thick p-type (100) silicon wafer 101 (ρ = 0.01 Ω · cm) in an aqueous HF solution under the conditions shown in Table 3 to make the wafer 101 porous and form a porous silicon layer 103. Formed (Fig. 1
(A)).

[0052] the porous silicon layer 103 surface by normal atmospheric pressure CVD apparatus SiO ₂ is 4000Å is deposited as an insulating layer, one side by performing wet etching a = 120
The insulating layer 102 was patterned into a square of μm, and the insulating layers 102 were provided in lattice points at intervals of b = 600 μm (FIG. 1A).

[0053]

[Table 3]

Selective epitaxial growth was performed by the LPCVD apparatus under the conditions shown in Table 4 to form an epitaxial silicon layer 104 having a thickness of about 50 μm (FIG. 1B).

[0055]

[Table 4]

In the same manner as in Experiments 4 and 5, the wafer was immersed in an HF aqueous solution, and the SiO ₂ insulating layer 102 was removed through the gap.
Further, the porous layer 103 was selectively immersed in a mixed solution (10: 6: 50) of 49% hydrofluoric acid, 100% alcohol and 30% hydrogen peroxide solution (FIG. 1).
(C)). The separated epitaxial layer 104 was placed on the SUS substrate 101 on which Cr was deposited, and a silicide layer 107 was formed at the interface between the Cr surface and the epitaxial layer by the same annealing treatment as in Experiment 5 to fix the epitaxial layer 104 to the substrate ( FIG. 1 (d)). Next, P is thermally diffused on the surface of the epitaxial layer 104 at a temperature of 900 ° C. using POCl 3 as a diffusion source to form an n ⁺ layer 108.
A junction depth of about μm was obtained (FIG. 1E). The formed dead layer on the surface of the n ⁺ layer 108 was wet-oxidized and then removed by etching to obtain a junction depth having an appropriate surface concentration of about 0.2 μm. In the wet oxidation step at this time, the surface of Cr exposed in the voids of the epitaxial layer is also oxidized to form the insulating layer 109 (FIG. 1F).

Finally, EB (Electron Beam)
m) ITO transparent conductive film (820 °) / current collecting electrode (Cr / Ag / Cr (200 ° / 1 μm / 400) by vapor deposition
Å)) was formed on the n ⁺ layer (FIG. 1H).

When the IV characteristics of the thin-film crystalline silicon solar cell thus obtained were measured under irradiation of AM1.5 (100 mW / cm ² ) light, an open-circuit voltage of 0.58 V and a cell area of 6 cm ² were obtained. Short-circuit photocurrent 32mA
/ Cm ² and fill factor 0.75, and an energy conversion efficiency of 13.9% was obtained. Using the epitaxial layer separated (separated) from the wafer in this way, a thin-film crystal solar cell exhibiting good characteristics was produced.

Example 2 A p ⁺ n thin crystalline solar cell was produced in the same manner as in Example 1. 500 μm thick n-type (100) silicon wafer 10
Anodization was performed on the wafer 1 (ρ = 0.01 Ω · cm) in an aqueous HF solution under the conditions shown in Table 1 to form a porous silicon layer 103 on the wafer 101.

Using an LPCVD apparatus, Si ₃ N ₄ was added to 300
0Å is deposited, and RIE (Reactive Ion Et
a = 1 using the same device as in Example 1.
The Si ₃ N ₄ layer 102 was patterned at 00 μm, b = 500 μm.

Selective epitaxial growth was performed by the LPCVD apparatus under the conditions shown in Table 4 to form an epitaxial layer 104 having a thickness of about 50 μm.

The wafer is immersed in a hot phosphoric acid solution at 180 ° C. to remove Si ₃ N ₄ through voids, and then a mixed solution of 49% hydrofluoric acid, 100% alcohol and 30% hydrogen peroxide (10: 6: 50) And the porous layer 103 was selectively etched.

An epitaxial layer 104 separated from a wafer is placed on a Mo substrate 101 having a thickness of 0.9 mm and placed at 550 ° C.
To form a silicide layer 107. Next, the surface of the epitaxial layer 104 was thermally diffused with B at a temperature of 950 ° C. using BCl ₃ as a diffusion source to form ap ⁺ layer 108, and a junction depth of about 0.5 μm was obtained. Formed p
The dead layer on the surface of the ⁺ layer was removed by etching after wet oxidation, and a junction depth having an appropriate surface concentration of about 0.2 μm was obtained. At this time, the surface of Mo exposed in the void of the epitaxial layer is also oxidized and insulated in the wet oxidation step.

Finally, an ITO transparent conductive film (820 °) / current collecting electrode (Cr / Ag / Cr (200 °)
/ 1 μm / 400 °)) was formed on the p ⁺ layer.

When the IV characteristics of the thin-film crystalline silicon solar cell thus obtained were measured under irradiation of AM1.5 (100 mW / cm ² ) light, an open-circuit voltage of 0.57 V and a cell area of 6 cm ² were obtained. Short-circuit photocurrent 31.5
mA / cm ² , the fill factor was 0.77, and an energy conversion efficiency of 13.8% was obtained.

Example 3 An n ⁺ p-type polycrystalline solar cell as shown in FIG. 1 was manufactured by using a liquid phase growth method. A 500 μm thick p-type (100) silicon wafer (ρ = 0.01Ω · c)
m) Anodization was performed on 101 in an aqueous HF solution under the conditions shown in Table 3 to form a porous silicon layer 103 on the wafer 101. SiO ₂ is formed on the surface of the porous silicon by thermal oxidation.
Is formed, and is subjected to wet etching to pattern a square having a side of a = 120 μm, and b = 6
The insulating layers 102 were provided in lattice points at intervals of 00 μm.

[0067]

[Table 5]

The selective epitaxial growth was carried out by the liquid phase growth method under the conditions shown in Table 5, and the epitaxial layer 104
The growth was 5 μm. At this time, Sn was used as a solvent, and Si was previously dissolved and dissolved in Sn before growth, and then gradual cooling was started. When a certain degree of supersaturation was reached, the surface of the porous layer of the wafer was changed to an Sn solution. And grown for a predetermined time. Since Sn has poor wettability with respect to SiO ₂ , Si does not precipitate on SiO ₂ and extremely high selective growth is maintained.

The wafer is immersed in an aqueous HF solution,
After removing iO ₂ , a mixed solution of 49% hydrofluoric acid, 100% alcohol and 30% hydrogen peroxide solution (10: 6: 5
0), and the porous layer 103 was selectively etched. The separated epitaxial layer 104 is placed on the SUS substrate 101 on which Cr is deposited, and the silicide layer 10 is formed on the interface between the Cr surface and the epitaxial layer by annealing.
7 was formed and the epitaxial layer was fixed to the substrate. Next, POCl ₃ was used as a diffusion source on the surface of the epitaxial layer.
Thermal diffusion of P was performed at a temperature of 00 ° C. to form an n ⁺ layer 108, and a junction depth of about 0.5 μm was obtained. N ⁺ formed
After wet oxidation of the dead layer on the layer surface, the layer was removed by etching to obtain a junction depth having an appropriate surface concentration of about 0.2 μm. In this wet oxidation step, the surface of Cr exposed in the voids of the epitaxial layer is also oxidized and insulated.

Finally, EB (Electron Beam)
m) ITO transparent conductive film (820 °) 110 /
Current collecting electrode (Cr / Ag / Cr (200 mm / 1 μm / 40
0Å)) 111 was formed on the n ⁺ layer 108.

When the IV characteristics of the thin-film crystalline silicon solar cell thus obtained were measured under irradiation of AM1.5 (100 mW / cm ² ) light, an open-circuit voltage of 0.58 V and a cell area of 4 cm ² were obtained. Short-circuit photocurrent 31mA
/ Cm ² and fill factor 0.75, and an energy conversion efficiency of 13.5% was obtained.

According to the present invention, a high-quality epitaxial silicon layer grown on porous silicon formed on a wafer can be transferred onto a non-single-crystal substrate. Can be manufactured.

[0073]

As described above, according to the present invention, it is possible to form a crystalline thin-film solar cell having good characteristics on a non-single-crystal substrate such as a metal substrate. This allows
Inexpensive, high-quality thin solar cells with mass productivity can be provided to the market.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining a manufacturing process of a solar cell of the present invention.

FIG. 2 is a schematic diagram for explaining a selective epitaxial growth method.

FIG. 3 is a schematic diagram illustrating a state in which a thin layer of epitaxial silicon is separated from a wafer by the method of the present invention.

FIG. 4 is a schematic diagram illustrating a state in which a thin layer of epitaxial silicon is separated from a wafer by the method of the present invention.

FIG. 5 is a graph showing the time dependence of the thickness of porous silicon and single crystal silicon etched by a selective etching solution.

[Explanation of symbols]

101, 202, 301, 601 Si wafer 106, 606 Substrate 102, 302, 602 Insulating layer 103, 303, 603 Porous silicon layer 104, 203, 304, 604 Epitaxial silicon layer 108 p ⁺ layer (n ⁺ layer) 609 p ⁺ μc-Si layer 110, 610 Transparent conductive layer 111, 611 Current collecting electrode 105, 305, 605 Void 107, 607 Metal 109, 608 Oxide layer 201 Non-nucleation surface

Claims (16)

[Claims] 1. A semiconductor device having a thin film single crystal semiconductor and polycrystalline silicon obtained by epitaxial growth, and having a semiconductor junction formed between the thin film single crystal semiconductor and the polycrystalline silicon. 2. The semiconductor device according to claim 1, wherein said epitaxial thin film is a thin film obtained by a vapor deposition method. 3. The semiconductor device according to claim 1, wherein said epitaxial thin film is a single crystal silicon thin film. 4. The semiconductor device according to claim 1, wherein said epitaxial thin film is a thin film obtained by a liquid phase growth method. 5. The semiconductor device according to claim 4, wherein said epitaxial thin film is a single-crystal silicon thin film. 6. The method according to claim 1, wherein the liquid phase growth method comprises: Ga, In, Sb,
6. The semiconductor device according to claim 5, wherein the growth method uses a solution in which silicon is dissolved in Bi or Sn as a solvent. 7. The semiconductor device according to claim 6, wherein the liquid is a liquid containing impurities. 8. The semiconductor device according to claim 1, wherein said semiconductor junction is a pn junction. 9. A thin film single crystal semiconductor obtained by epitaxial growth, polycrystalline silicon, and a pair of electrodes, wherein a semiconductor junction is provided between the thin film single crystal semiconductor and the polycrystalline silicon. Solar cells. 10. The solar cell according to claim 9, wherein the epitaxial thin film is a thin film obtained by a vapor deposition method. 11. The solar cell according to claim 9, wherein the epitaxial thin film is a single-crystal silicon thin film. 12. The solar cell according to claim 9, wherein the epitaxial thin film is a thin film obtained by a liquid phase growth method. 13. The solar cell according to claim 12, wherein said epitaxial thin film is a single-crystal silicon thin film. 14. The method of claim 1, wherein the liquid phase growth method comprises Ga, In, S
14. The solar cell according to claim 13, which is a growth method using a solution obtained by dissolving silicon in a solvent using b, Bi or Sn as a solvent. 15. The solar cell according to claim 14, wherein the liquid is a liquid containing impurities. 16. The solar cell according to claim 9, wherein said semiconductor junction is a pn junction.