JPH1050982A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a high performance lattice commensurate system (X=0.53) or lattice incommensurate system (X>0.53) InP base HEMT(high electron mobility transistor) by suppressing or reducing generation of kink, lowering of breakdown strength, increase of drain conductance, etc. SOLUTION: In a heterojunction field effect transistor having a double heterostructure channel layer of lattice commensurate system and lattice incommensurate system where a two-dimensional electron channel is formed by a gate voltage, spatial positions where electron and hole are present locally are superposed by inserting a semiconductor layer located above the valence band of the channel layer into a heterojunction interface on the side for forming the two-dimensional electron channel in the double heterostructure of the channel layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor field-effect transistor for ultra-high speed and ultra-high frequency having a double heterostructure channel.

[0002]

2. Description of the Related Art Conventionally, among high electron mobility transistors (HEMTs), a heterojunction field effect transistor fabricated on an InP substrate has a high In composition (X ≧ 0.53) of an In _x Ga ₁ -x As channel. ) Provides high electron mobility, so that high-speed operation is possible as compared with GaAs-based HEMTs. However, the In _x Ga ₁ -x As channel having a high In composition has a high collision ionization rate, and thus generates many holes in the device operation. This causes current-voltage characteristics (IV characteristics). Phenomena unfavorable in device operation, such as generation of kink, reduction in breakdown voltage, and increase in drain conductance in the above. Therefore, in order to improve the performance of the InP-based HEMT, it is necessary to suppress or reduce these phenomena.

[0003]

SUMMARY OF THE INVENTION An object of the present invention is to provide a lattice-matched (X = 0.53) and non-lattice-matched system (X> 0.5).
It is an object of the present invention to improve and improve the performance of an InP-based HEMT by suppressing or reducing the occurrence of kinks, a decrease in breakdown voltage, an increase in drain conductance, and the like observed in the InP-based HEMT 3).

[0004]

SUMMARY OF THE INVENTION The present invention provides a lattice matching (X
= 0.53) and non-lattice-matched systems (X> 0.53), the following methods are used to suppress or reduce the occurrence of kinks, reduction in breakdown voltage, increase in drain conductance, etc. observed in conventional InP-based HEMTs. Thereby, the recombination of electrons and holes in the device is promoted to lower the hole concentration, thereby realizing the above object.

The main structure of the present invention has a channel layer having a double hetero structure of a lattice-matched system and a lattice-mismatched system,
In a hetero-junction field-effect transistor in which a two-dimensional electron channel is formed by a gate voltage, the upper end of a valence band is formed at the hetero-junction interface on the side where a two-dimensional electron channel is formed in the double hetero structure of the channel layer. By inserting a semiconductor layer located above the valence band of, the spatial positions where electrons and holes (holes) are localized overlap each other.

Here, the thickness of the inserted semiconductor layer is preferably 2 nm or less.

The semiconductor layer to be inserted is, for example, an Al _Y1 Ga _{1 -Y 1} As _{1 -Y 2} Sb _{Y 2} layer, an In _{Y 1} Al _{1 -Y 1}
As _1-Y2 Sb _{Y2 layer, In Y1 Ga 1-Y1 As} 1-Y2 Sb Y2 layer (0 <Y1, Y2 <1 ), GaAs 1-Y3 Sb Y3 layer (0.
2 ≦ Y3 ≦ 0.4) or an Sb layer or the like.

Further, the heterojunction on the side for forming the two-dimensional electron channel is formed of an In _x Ga ₁ -x As channel layer and an I.sub.x Ga.sub.1 _-x As channel layer.
and n _Y Al _1-Y As barrier layer.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, FIGS. 1 and 2 show conceptual diagrams of a potential structure of an InP-based HEMT according to the present invention.

FIG. 1 shows a structure in which Al _Y1 G is _placed between an In _x Ga ₁ -x As channel layer and an In _Y Ga _{1 -Y} As barrier layer on the substrate surface side.
a _1-Y1 As _1-Y2 Sb _Y2 layer, In _Y1 Al _1-Y1 As _1-Y2 Sb
FIG. 5 is a diagram showing a channel potential structure in which a _Y2 layer (0 <Y1, Y2 <1), a GaAs _{1 -Y3} Sb _Y3 layer (0.2 ≦ Y3 ≦ 0.4), or a Sb monoatomic layer is inserted. .

FIG. 2 shows an In _Y1 G layer between the In _x Ga ₁ -x As channel layer and the In _Y Al _{1 -Y} As barrier layer on the substrate surface side.
_{a 1-Y1 As 1-Y2} Sb Y2 layer (0 <Y1, Y2 <1 ) is a diagram showing the potential structure is inserted.

The essential feature of FIGS. 1 and 2 showing the potential structure of the present invention is that the upper end of the valence band of the insertion layer exists above the upper end of the valence band of the InGaAs channel layer. That is.

The operation of the channel potential structure according to the present invention shown in FIGS. 1 and 2 will now be described with reference to FIGS.
It will be described in detail with reference to FIG.

FIG. 3 shows a conventional example. In the potential structure of the conventional InP-based HEMT shown in FIG.
FIG. 4 is a diagram schematically showing the square of the wave function of electrons and holes in a ground state in a state where a gate voltage is applied, together with a channel potential shape. The square of the wave function indicates the probability of existence of electrons or holes in the quantum state.
The shape indicates the distribution state of electrons or holes.
In FIG. 3, the wave function (square value) 101 of electrons is attracted to the substrate surface side, and the wave function (square value) 102 of holes is attracted to the anti-substrate surface side by the electric field generated by the gate voltage application. For this reason, both (101 and 10)
It can be seen that the spatial overlap of 2) is small.

Since the probability of recombination of electrons and holes is proportional to the overlap of the wave functions (square values) of the two, the state of FIG. 3 shows that the probability of recombination in this channel potential structure is small. Therefore, it was found that a high concentration of holes was present in the device.

Here, FIG. 4 is a diagram showing the I of the present invention shown in FIG.
Wave function (square value) of ground-state electrons in the potential structure of nP-based HEMT with gate voltage applied
20 schematically shows a wave function (square value) 202 of a hole and a hole potential shape together with a channel potential shape.

In FIG. 4, between the In _x Ga ₁ -x As channel layer and the In _Y Al _{1 -y} As barrier layer on the substrate surface side,
Al _Y1 Ga _1-Y1 As _1-Y2 Sb _Y2 layer, InY ₁ Al _1-Y1 A
s _{1 -Y 2} Sb _{Y 2} layer (0 <Y 1, Y 2 <1), GaAs _{1 -Y 3}
Since the Sb _Y3 layer (0.2 ≦ Y3 ≦ 0.4) or the Sb monoatomic layer is inserted, the upper end of the valence band of the insertion layer is I
It exists above the upper end of the valence band of the nGaAs channel layer, and as a result, the wave function (square value) 202 of the holes is drawn to the substrate surface side similarly to the wave function (square value) 201 of the electrons. The situation is shown.

Therefore, in the channel potential structure of the present invention, since the overlap of the wave function (square value) of electrons and holes becomes large, the probability of recombination is promoted and the hole concentration in the device is reduced. As a result, phenomena unfavorable for device operation, such as the appearance of kink, a decrease in breakdown voltage, and an increase in drain conductance, are suppressed or reduced.

FIG. 5 is a diagram showing the I of the present invention shown in FIG.
FIG. 9 schematically shows the square of the wave function of electrons and holes in the ground state in the nP-based HEMT when a gate voltage is applied, together with the channel potential shape.

In FIG. 5, between the In _X Ga _{1 -X} As channel layer and the In _Y Ga _{1 -Y} As barrier layer on the substrate surface side,
In _Y1 Ga _1-Y1 As _1-Y2 Sb _Y2 layer (0 <Y1, Y2 <
1) is inserted, the upper end of the valence band of the insertion layer exists above the upper end of the valence band of the InGaAs channel layer. As a result, the hole wave function (square value) 302 As in the case of the wave function (square value) 301, a state of being drawn to the substrate surface side is shown.

This situation is basically the same as the situation shown in FIG. 4. Even in the channel potential structure of the present invention, phenomena unfavorable for device operation such as occurrence of kink, reduction in breakdown voltage, and increase in drain conductance are suppressed.・ It is reduced.

In both cases of FIGS. 4 and 5 of the present invention, if the thickness of the insertion layer is set to 2 nm or less, the lattice mismatch of the insertion layer is a problem in the element composition shown in the following examples. Not be.

[0023]

EXAMPLES It goes without saying that the present invention is not limited to the following examples.

Example 1 In the structure of FIG. 1, the insertion layer is made of GaAs _{1 -Y 2} Sb _{Y 2} and 0.2 ≦ Y 2 ≦ 0.4. When Y2 is changed in this manner, ΔEh in FIG. 1 changes as 0.2 eV ≦ ΔEh ≦ 0.5 eV, and the situation shown in FIG. 4 is created. Note that ΔEe is Δ
Ee was about 0.1 eV.

(Example 2) In Example 1, In _X G
a _{1-x In} channel composition _{X of the} As channel layer is 0.53 ≦ X ≦ 0
A structure comprising a non-lattice matched channel that is: In _X Ga _1-X A
Since the upper end of the valence band of s does not change significantly even when X changes, the situation shown in FIG. 4 was also created in this structure.

(Embodiment 3) In the first embodiment, In _X G
a _1-x As channel structure in which the In composition X of the channel layer includes a compositionally modulated non-lattice matched channel in which the In composition X is changed in the channel layer. Here, X is set to 0.53 ≦ X ≦ 1. For example, X
From the substrate surface side to the opposite substrate surface side, X = 1.0 → 0.5
An example is a channel structure changed stepwise or continuously as shown in FIG.

(Embodiment 4) In the structure of FIG. 1, the insertion layer is an Al _Y1 Ga _1-Y1 As _1-Y2 Sb _Y2 layer, and 0 <Y1 ≦
A structure in which 0.5, 0.4 ≦ Y2 ≦ 0.7. In the structure of this embodiment, ΔEh and ΔEe in FIG.
0.2 eV ≦ ΔEh ≦ 0.6 eV, 0.1 eV ≦ ΔEe
It was about ≦ 0.3 eV. FIG.
The situation shown in was created. In the fourth embodiment, ΔEe is larger than that in the first embodiment, and the structure is advantageous for confining more electrons in the channel.

(Example 5) In Example 4, In _X G
a _1-x In composition _{X of the} As channel layer is 0.53 ≦ X ≦
Structure including a non-lattice matched channel that is 0.8. In _X G
The upper end of the valence band of a _{1 -X} As did not change significantly even when X changed, and the situation shown in FIG. 4 was created in this structure as well.

(Embodiment 6) In the embodiment 4, the In _X G
a _1-x As channel structure in which the In composition X of the channel layer includes a compositionally modulated non-lattice matched channel in which the In composition X is changed in the channel layer. Here, X is set to 0.53 ≦ X ≦ 1.0. For example, when X is moved from the substrate surface side to the opposite substrate surface side, X = 1.0 →
An example is a channel structure changed stepwise or continuously as in 0.53.

(Embodiment 7) In the structure of FIG. 1, the insertion layer is an In _Y1 Al _{1 -Y 1} As _{1 -Y 2} Sb _{Y 2} layer, and Y 1 = 0.5.
2. Structure in which 0.2 ≦ Y2 ≦ 0.4. When Y2 is changed in this manner, ΔEh in FIG. 1 is 0.2 eV ≦ Δ
It changed as Eh ≦ 0.5 eV, and the situation shown in FIG. 4 was obtained. Note that ΔEe was about ΔEe to about 0.1 eV.

(Embodiment 8) In the embodiment 7, the In _X G
a _1-x In composition _{X of the} As channel layer is 0.53 ≦ X ≦
Structure including a non-lattice matched channel that is 0.8. In _X G
The upper end of the valence band of a _{1 -X} As did not change significantly even when X changed, and the structure shown in FIG. 4 was obtained even with this structure.

(Embodiment 9) In the embodiment 7, the In _X G
a _1-x As channel structure in which the In composition X of the channel layer includes a compositionally modulated non-lattice matched channel in which the In composition X is changed in the channel layer. Here, X is set to 0.53 ≦ X ≦ 1.0. For example, when X is moved from the substrate surface side to the opposite substrate surface side, X = 1.0 →
An example is a channel structure changed stepwise or continuously as in 0.53.

(Embodiment 10) A structure in which the insertion layer is a single atomic layer of Sb in the structure of FIG. The top of the valence band at the insertion interface rose, creating the situation shown in FIG.

(Embodiment 11)
_When the In composition X of the _X Ga _1-x As channel layer is 0.53 ≦ X ≦
Structure including a non-lattice matched channel that is 0.8. In _X G
Since the upper end of the valence band of a _1-X As does not change significantly even when X changes, the situation shown in FIG. 4 was created in this structure as well.

(Embodiment 12)
A structure including a compositionally modulated non-lattice-matched channel in which the In composition X of the _X Ga _1-X As channel layer is changed in the channel layer. Here, X is set to 0.53 ≦ X ≦ 1.0. For example, when X is moved from the substrate surface side to the opposite substrate surface side, X = 1.0 →
An example is a channel structure changed stepwise or continuously as in 0.53.

(Embodiment 13) Insertion layer In having the structure of FIG._Y1
Ga_1-Y1As_1-Y2Sb_Y2Layer (0 <Y1, Y2 <1)
And Y1 = X1, 0.2 ≦ Y2 ≦ 0.4.
Where X1 is In _XGa_1-XIn composition of As channel layer
X = X1, and 0.53 ≦ X1 ≦ 0.8. Y2
Is changed in this manner, Δ in FIG.
Eh is 0.2 eV ≦ ΔEh ≦ 0.6 eV, and FIG.
The situation shown was created. Note that ΔEe is ΔEe <0.
It was 1 eV.

(Example 14) In Example 13, In
A structure including a compositionally modulated non-lattice-matched channel in which the In composition X of the _X Ga _1-X As channel layer is changed in the channel layer. Here, X is set to 0.53 ≦ X ≦ 0.8. In this case, the In _Y1 Ga _1-Y1 As _1-Y2 Sb _Y2 layer (0 <Y1, Y
It is assumed that Y1 in 2 <1) is equal to the maximum value of X.

[0038]

According to the present invention, since the recombination speed of electrons and holes in the InGaAs channel layer is promoted, the hole concentration in the device can be reduced. As a result, InGaAs such as kink, reduced withstand voltage, increased drain conductance, etc., which had been more difficult to solve than in the past.
It is possible to suppress and reduce a phenomenon that is unfavorable for device operation that occurs in the s channel.

[Brief description of the drawings]

FIG. 1 is a diagram showing a potential structure of an InP-based HEMT according to the present invention.

FIG. 2 is a diagram showing a potential structure of an InP-based HEMT according to the present invention.

FIG. 3 is an explanatory diagram showing the operation of the present invention.

FIG. 4 is an explanatory diagram showing the operation of the present invention.

FIG. 5 is an explanatory diagram showing the operation of the present invention.

FIG. 6 is a diagram showing a potential structure of a conventional InP-based HEMT.

Claims (4)

[Claims] 1. A semiconductor device having a channel layer having a double-hetero structure of a lattice-matching system and a lattice-mismatching system.
A heterojunction field-effect transistor for forming a two-dimensional electron channel, wherein the double heterostructure of the channel layer is
By inserting a semiconductor layer in which the upper end of the valence band is located above the valence band of the channel layer at the heterojunction interface on the side where a two-dimensional electron channel is formed, the spatial position where electrons and holes are localized can be changed. A semiconductor device characterized by being stacked. 2. The semiconductor device according to claim 1, wherein said semiconductor layer has a thickness of 2 nm or less. 3. The method according to claim 1, wherein the semiconductor layer is Al _Y1 Ga _{1 -Y1} As.
_1-Y2 Sb _Y2 layer, In _Y1 Al _1-Y1 As _1-Y2 Sb _Y2 layer (0 <
Y1, Y2 <1), In _Y1 Ga _1-Y1 As _1-Y2 Sb _Y2 layer (0 <Y1, Y2 <1), GaAs _1-Y3 Sb _Y3 layer (0.
3. The semiconductor device according to claim 1, wherein the semiconductor device is selected from the group consisting of 2 ≦ Y3 ≦ 0.4) and an Sb layer. 4. The side on which the two-dimensional electron channel is formed
The heterojunction is In _XGa_1-XAs channel layer and In_YA
l_1-YAnd an As barrier layer.
The semiconductor device according to claim 1.