JPH10276447A - Clock reproduction circuit in color demodulation circuit of video device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the appearance of display interference such as color fringes even when the number of lines to which an inverted color burst signal is multiplexed is increased at the time of directly displaying a video signal to which a color burst signal is inversely multiplexed on a screen for the purpose of copy prevention of a video program. SOLUTION: This circuit discriminates the existence of phase inversion of a multiple color burst signal 1a' to a video signal 1a by a burst inversion detection circuit 1, makes a phase inversion signal 1b active and output it when phase inversion occurs, inverts the phase of the signal 1a' only when a phase correction circuit 2 inputs an active phase inversion signal 1b, always outputs a phase correction signal 2b in a normal rotation color burst state and generates a clock 3b which undergoes phase synchronization of a color burst signal in a normal rotation color burst state through a PLL circuit 3 that is a phase- locked loop.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock recovery circuit in a color demodulation circuit of a video device for receiving or reproducing a video signal of a video program which has been protected from copying and displaying the video signal. The present invention relates to a technique for preventing display disturbance caused by inverting the phase of a color burst signal (color synchronizing signal) for copy protection when is directly displayed on a screen.

A color burst signal representing a phase reference of a carrier chrominance signal in color demodulation generally has a color subcarrier frequency (3.58 MHz) with respect to a back porch during a horizontal scanning period.
8 to 12 cycles are inserted. When performing color demodulation on a video device, for example, a television receiver, it is necessary to generate a color subcarrier on the receiver. It is important that the frequency and phase of the generated color subcarrier exactly match the frequency and phase of the color subcarrier removed on the image transmission side. A color burst signal is used to control the phase of the color subcarrier.

[0003] The above-mentioned video program refers to contents (general works and the like) converted into video signals. For example, a movie work or a program work created by a broadcasting station recorded as package media (video cassette tape, DVD (Digital Versatile Disk), etc.)
It also has a broad concept including the broadcast wave itself as a broadcast medium to be aired.

[0004]

2. Description of the Related Art In recent years, the number of video sources (package media, broadcast media) provided with copy protection of video programs has been increasing. No. 4,577,216 as an example
(Issued November 14, 1983, inventor Jhon O. Ry
an, et al.) “METHOD OF APPARATUS FOR MODIFYING THE
COLOR BURST TO PROHIBIT VIDEOTAPE RECORDING ". This proposes a method in which the effect of the copy protection function is enhanced by inverting the color burst code for some lines in the video period.

In particular, in the method of inverting the color burst code of only a specific line disclosed in US Pat. No. 4,577,216, in the case of a television receiver, the time constant of the color demodulation PLL circuit is long and the burst phase of several lines is inverted. On the other hand, in video recording and playback equipment such as video tape recorders, the time constant of the frequency shifter PLL of the chroma signal during recording is short, and the image when the recorded video signal is reproduced on the screen Has a significant effect on That is, a video recording / reproducing device (VTR, DV
D player, etc.), it is permitted to correctly display the video signal on the screen of the television receiver, but the video signal is recorded on package media using a video recording / reproducing device. In such a case, since the interference signal is recorded while being multiplexed, when it is reproduced, a color stripe or the like appears on a specific line so that a correct display cannot be performed (see FIG. 11). In particular, in the case of high-definition video signal media, if illegal copying is permitted, serious infringement of copyright will be caused. To prohibit this, the color burst signal should be inverted and scrambled for recording on VTR. While exerting the effect, it is devised so that the projection on the screen of a video device such as a television receiver does not interfere (for example, the burst inversion technology of Macrovision Inc. is instructed by the broadcasting station, Is being standardized).

The configuration of a PLL circuit (phase synchronous circuit) in a clock recovery circuit used in a conventional color demodulation circuit of a television receiver of this type will be described below with reference to FIG.

In FIG. 8, reference numeral 1a denotes an input video signal in which a color burst signal is inverted and multiplexed only for a specific line for copy protection, and reference numeral 41 denotes a period during which the color burst signal is multiplexed. The burst gate signal 1a generated inside the clock recovery circuit
a, the input video signal 1a (actually, the video signal 1a
The phase comparison circuit outputs a phase error signal 41b by comparing the phase of the color burst signal 1a ') extracted and separated from the clock 3b output by the voltage controlled oscillator (VCO) 43. Reference numeral 42 denotes a phase error signal 41b. A low-pass filter (LPF) that removes high-frequency components and determines the control speed of the PLL circuit and outputs control voltage data 42b;
Reference numeral 3 denotes a voltage controlled oscillator (VCO) that changes the oscillation frequency in accordance with the control voltage data 42b.

FIG. 9 shows the internal configuration of the phase comparison circuit 41. The phase comparison circuit 41 includes an A / D converter 51, a shift register 52, an averaging circuit 53, and a comparison circuit 54. When the A / D converter 51 is driven by the clock 3b from the VCO 43, the input video signal 1
a, and sampled data is taken into the shift register 52 in synchronization with the burst gate signal 1aa. Then, the averaging circuit 53 averages the sampled data, the comparison circuit 54 compares the average value with the reference phase value, and outputs the difference as a phase error signal 41b.

Hereinafter, the operation of the conventional clock recovery circuit configured as described above will be described. FIG. 10 (a),
In (b), the sine wave of the color burst signal 1a 'represented by one cycle actually represents a color burst signal of eight cycles multiplexed on the back porch in one horizontal scanning line. . Further, the whole of the figure represents seven horizontal scanning periods.

First, based on the timing chart of FIG. 10A, when it is not necessary to prevent copy, a video signal 1a in which the color burst signal 1a 'is multiplexed in a normal phase state (normal rotation). The operation in the case where is input will be described. In this case, the color burst signal 1a of the input video signal 1a is generated by the clock 3b oscillated by the VCO 43.
When a 'is sampled, the sampling data is always constant amplitude data, the level of the phase error signal 41b is constant, and the control voltage data 42b does not change. Therefore, the oscillation frequency of the VCO 43 becomes constant, and the clock 3b synchronized in phase with the color burst signal 1a 'of the input video signal 1a can be reproduced.

Next, based on the timing chart of FIG. 10 (b), the color burst signal 1a 'is multiplexed in a state in which the phase is inverted with respect to the normal phase in a predetermined horizontal scanning line in order to prevent copying. Video signal 1a
The operation in the case where is input will be described. In this case, the phase comparison circuit 41 outputs a phase error signal 41b indicating that the amplitude data of the color burst signal 1a 'sampled at the clock 3b has greatly changed.

If the time constant of the LPF 42 is sufficiently large, the control voltage 42b does not change immediately even if a certain phase change occurs.
As shown by a two-dot chain line in FIG. In the television receiver, since the time constant of the color demodulation PLL circuit is set to be large, interference for copy protection does not appear on a screen displayed by reception or reproduction.

However, in the case of a video recording / reproducing apparatus, since the time constant of the color demodulation PLL circuit is small, if a color burst signal is multiplexed in an inverted state over several lines to prevent copying, FIG. As shown by the solid line, the control voltage data 42b changes, the oscillation frequency of the VCO 43 shifts greatly, and the phase of the reproduced clock 3b is greatly disturbed. When recording is performed in a video recording / reproducing apparatus while performing color demodulation while the phase of the reproduced clock is disturbed, when the recorded video signal is reproduced, a specific line on the screen is displayed as shown in FIG. As a result, interference of color fringes appears, and a substantial copy protection effect is exhibited. FIG. 11 shows a case where inverted bursts are multiplexed and input in two periods in one field.

[0014]

However, in video equipment such as a television receiver, the time constant of a color demodulation PLL circuit (phase synchronization circuit) is considered in consideration of the response speed of a video reception or video reproduction system. It can only be increased to a certain size.

Therefore, when the number of lines on which the inverted color burst signal for copy protection is multiplexed increases, even in the case of video equipment such as a television receiver, the same as the case of the solid line in FIG. However, the control by the time constant becomes impossible, the control voltage data 42b changes, the oscillation frequency of the VCO 43 shifts greatly, and the phase of the reproduced clock 3b is greatly disturbed. When the image is received or reproduced by the television receiver in the state where the color demodulation is performed while the phase of the reproduced clock is disturbed, interference of color fringes appears on the screen as shown in FIG. As a result, the intended function cannot be exhibited.

In view of the above problems, the present invention does not disturb the phase of a reproduced color demodulation clock even if the number of lines on which inverted color burst signals for copy protection are multiplexed increases. It is an object of the present invention to provide a clock recovery circuit in a color demodulation circuit of a video device which does not affect a received or reproduced image projected.

[0017]

According to the present invention, there is provided a clock recovery circuit in a color demodulation circuit of a video apparatus according to the present invention, wherein a phase inversion of a color burst signal multiplexed with a video signal is detected by a burst inversion detection circuit. The phase correction circuit outputs a phase inversion signal when there is phase inversion, and inverts the phase of the color burst signal only when the phase inversion signal is input by the phase correction circuit to correct the phase of the normal color burst state. A signal is output, and the phase correction signal is input by a phase synchronization circuit to generate a clock phase-synchronized with the color burst signal in a normal color burst state. In video equipment such as television receivers, considering the response speed of video reception or video reproduction systems, the time constant of the phase synchronization circuit for color demodulation can only be increased to a certain extent, and Then, if the number of lines on which the inverted color burst signal for copy protection is multiplexed increases, it becomes impossible to cover with the time constant, and the phase of the clock generated for color demodulation is disturbed. The projected image may be affected by color fringe interference or the like. However, according to the above configuration of the present invention, when an inverted color burst signal for copy protection is multiplexed, the inverted The phase of the color burst signal thus inverted is converted into a phase correction signal in a normal color burst state, and the phase correction signal, which is a color correction signal in a normal color burst state, is obtained. -Since a clock synchronized with the burst signal is generated, even if the number of lines on which the inverted color burst signal for copy protection is multiplexed increases, the reproduced clock for color demodulation can be generated. It is not necessary to disturb the phase and to prevent influences such as color fringe disturbance on the image received and reproduced and projected.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION

(1) The clock recovery circuit in the color demodulation circuit of the video device according to the first aspect of the present invention determines whether or not the phase of the multiplexed color burst signal is inverted in the video signal, and detects the phase inversion signal when the phase is inverted. A phase inversion detection circuit that outputs a phase correction signal in a non-inverted color burst state by inverting the phase of the color burst signal only when the phase inversion signal is input; And a phase synchronization circuit for generating a clock phase-locked to the color burst signal in the input non-inverting color burst state.

In a video device such as a television receiver, the time constant of a phase synchronization circuit for color demodulation can be increased only to a certain size in consideration of the response speed of a video reception or video reproduction system. However, if the number of lines on which the inverted color burst signal is multiplexed for copy protection becomes large as it is in the case of the conventional technique, the time constant cannot be covered, and the clock generated for color demodulation is not possible. May be disturbed in phase, and an image such as a color fringe disturbance may be produced on an image received or reproduced and projected.

[0020] On the other hand, the above-mentioned claim 1 of the present invention.
According to the configuration, when an inverted color burst signal for copy protection is multiplexed, the inverted color burst signal is inverted in phase to be a phase correction signal in a normal color burst state, Since a clock synchronized with the color burst signal in the normal color burst state, which is the phase correction signal, is generated, the number of lines on which the inverted color burst signal is multiplexed for copy protection is large. Even so, the phase of the reproduced clock for color demodulation will not be disturbed, and the received or reproduced image projected will not be affected by interference such as color fringes.

(2) The clock recovery circuit in the color demodulation circuit of the video equipment according to claim 2 of the present invention.
Wherein the burst inversion detection circuit uses a clock phase-synchronized with the color burst signal in the normal color burst state and a burst gate signal indicating a multiplex period of the color burst signal, and an amplitude of the color burst signal within the burst gate period. And a code matching circuit that activates and outputs a phase inversion signal when there is a phase inversion by detecting the phase of the multiplexed color burst signal by matching the amplitude code. When the phase inversion signal in the inactive state is input during the burst gate period, the phase correction circuit outputs the phase correction signal in the normal color burst state without inverting the color burst signal, and When the phase inversion signal is input, the color burst signal is inverted and the Has been configured to output a phase correction signal to the state, the phase synchronization circuit, in said burst gate period, performs phase synchronization control by entering the phase correction signal of the forward color burst state,
It is characterized in that it is configured to generate a clock synchronized in phase with the color burst signal in the normal color burst state.

When there is no phase inversion based on the amplitude sign of the color burst signal, an inactive phase inversion signal is output to output a phase correction signal in which the color burst signal is kept in the normal color burst state. ,
Conversely, when a phase inversion occurs, an active phase inversion signal is output to output a phase correction signal obtained by inverting the color burst signal and converting the color burst signal into a normal color burst state. In either case, the color burst signal is in the non-inverting color burst state, and phase synchronization control is performed based on the color burst signal. Therefore, the number of lines on which the inverted color burst signal is multiplexed for copy protection is reduced. At most, the reproduced color demodulation clock is not disturbed in phase and the received or reproduced image projected does not have an effect such as color fringe disturbance.

(3) The clock recovery circuit in the color demodulation circuit of the video equipment according to claim 3 of the present invention.
The burst inversion detection circuit detects the amplitudes of a plurality of color burst signals within a burst gate period in place of the code matching circuit according to claim 2 and determines the multiplexed color burst signals based on the result of the majority determination of the amplitude code. , And a code majority decision circuit for outputting an inactive or active phase inversion signal.

In the present invention, in interpreting the technical scope of "majority decision", even when the expression "majority decision" is used, it is not a majority decision in a normal sense, but a specific embodiment described later. As explained in the explanation, it is a "majority decision with redundancy", and this must be noted.

Depending on environmental conditions, the color burst signal is affected by noise due to a weak electric field and distortion of a transmission line (space or cable), and may affect the amplitude of the sampled burst data. An error in the amplitude code may occur in such data. Especially,
In the case of a weak electric field, the amplitude itself becomes small and close to the noise level, so it is difficult to determine the amplitude sign when the positive one becomes negative, the negative one becomes positive, or zero. become. This also occurs when there is no distortion in the transmission path. As a result, there is a possibility that an image such as color fringes may occur on an image received or reproduced and projected on a screen of a video device.

[0026] On the other hand, claim 3 according to the present invention.
According to the configuration of the above, a code majority decision circuit is provided to determine the amplitude code of a plurality of color burst signals by majority decision, so that the color burst signal is affected by noise and transmission line distortion caused by a weak electric field. In the case where the amplitude of the received and sampled and latched burst data is also affected, and especially, even when there is no distortion in the transmission path, the amplitude itself decreases to the noise level, making it difficult to determine the amplitude code. Even in the case of an extremely small weak electric field, even if an error such as the reversal of the amplitude sign occurs in some burst data, the possibility of erroneous determination of the normal rotation state / reversal state of the color burst signal is greatly increased. Can be reduced. As a result, the number of lines in which the inverted color burst signal is multiplexed for copy protection is constant under the condition that the color burst signal is affected by noise or transmission line distortion caused by a weak electric field. Even if the number increases, the clock for color demodulation generated by the phase synchronization circuit can be phase-synchronized with the color burst signal in the case of normal rotation in a stable state by suppressing the phase disturbance. Alternatively, it is possible to reliably prevent the influence of color fringes or the like from appearing on an image reproduced and projected on a screen of a video device.

(4) The clock recovery circuit in the color demodulation circuit of the video equipment according to claim 4 of the present invention.
And a burst inversion detecting circuit, in addition to the configuration of the burst inversion detecting circuit of claim 3, detects the amplitudes of a plurality of color burst signals within a burst gate period and compares the burst data with a level set value from the system. It is characterized in that it is provided with an amplitude comparison circuit that outputs positive or negative burst data to the code majority decision circuit based on the comparison result.

Depending on the environmental conditions, the amplitude may be distorted at the sampling timing due to the influence of the reflected wave due to the distortion of the transmission line and the like, even in the case of a strong electric field and the sampled burst data has a certain size. As a result, since an accurate value cannot be obtained, an error in the amplitude code may occur in some data, making it difficult to determine the amplitude code. Then, as a result, there is a possibility that an image such as a color stripe may occur on an image received or reproduced and projected on a screen of a television receiver.

[0029] On the other hand, the above-mentioned claim 4 of the present invention.
According to the configuration of the above, an amplitude comparison circuit is provided at the preceding stage of the code majority decision circuit for performing the majority decision processing, and the burst data is compared with a required level set value to correct the sign of the burst data. However, the color burst signal is affected by reflected waves due to transmission line distortion,
Since the amplitude of the burst data sampled and latched is distorted and cannot take an accurate value, an error in the amplitude code occurs in some data, making it difficult to determine the amplitude code. However, the above-described correction can greatly reduce the possibility of erroneous determination of the normal rotation state / reversal state of the color burst signal. As a result, the number of lines on which the inverted color burst signal for copy protection is multiplexed under the condition that the color burst signal is affected by the degree of the reflected wave and the strength of the electric field due to the distortion of the transmission path. Even if the number exceeds a certain level, the clock for color demodulation generated by the phase synchronization circuit can be phase-synchronized with the color burst signal in the case of normal rotation by suppressing the phase disturbance. In addition, it is possible to reliably prevent the influence of color fringes or the like from appearing on an image that is received or reproduced and projected on a screen of a video device. If the influence of color fringes or the like appears, the level can be adjusted to adjust the level to a normal image state.

Hereinafter, specific embodiments of the clock recovery circuit in the color demodulation circuit of the television receiver according to the present invention will be described in detail with reference to the drawings.

[First Embodiment] FIG. 1 is a block diagram showing a configuration of a clock recovery circuit in a color demodulation circuit according to a first embodiment. In FIG. 1, reference numeral 1 denotes an input video signal 1a in which a color burst signal 1a 'is multiplexed in an arbitrary line with its phase inverted for copy protection, and a burst gate signal indicating a color burst multiplexing period. Within the period of 1aa, the amplitude of a plurality of color burst signals 1a 'per line is changed by a clock 3b to be a reference for color demodulation (to be described later), which results in phase synchronization with the color burst signal 1a'. It detects whether the phase of the color burst signal 1a 'has been inverted based on the condition of the coincidence of the amplitude codes. When the phase has not been inverted, that is, when it is normal rotation, it is made inactive. And a burst inversion detection circuit that activates when the signal is on and outputs the phase inversion signal 1b. Reference numeral 2 denotes a copy obtained by inverting the color burst signal 1a 'of the input video signal 1a in the color burst multiplexing period and inverting the color burst signal 1a' only when the phase inversion signal 1b is active (inversion state). A phase correction circuit for outputting a phase correction signal 2b converted into a color burst signal 1a 'having a normal phase (in a normal color burst state) which does not indicate prevention, and a phase correction signal 2
b, which controls the phase synchronization during the period of the burst gate signal 1aa and outputs a clock 3b synchronized with the color burst signal 1a 'in the normal color burst state.
Circuit (phase-locked loop).

FIG. 2 is a block diagram showing a more specific configuration of the burst inversion detection circuit 1 in FIG. In FIG. 2, reference numeral 11 denotes a gate based on the logical sum of a burst gate signal 1aa generated in the color demodulation circuit and a clock 3b phase-synchronized with the color burst signal 1a 'to indicate a color burst multiplexing period of the input video signal 1a. A clock gate circuit 12 for generating a clock 11b receives an input video signal 1a and receives the input video signal 1a at the timing of a gate clock 11b from the clock gate circuit 11.
Is a shift register circuit that latches the data. The shift register circuit 12 is constituted by cascade connection of a plurality of flip-flops, for example, as shown in FIG. 3, and outputs a plurality of burst data 12b latched by each gate clock 11b. 13 is a plurality of burst data 12
b is sequentially input, the polarity of the amplitude code of each burst data 12b is determined, and if there is no inversion and all are plus (forward rotation), the phase inversion signal 1b is made inactive and output. When there is no forward rotation and all are minus (inverted), the phase inversion signal 1b is activated and output to the phase correction circuit 2, and when plus and minus coexist, the phase inversion signal 1b is set to a high impedance state. It is a matching circuit. This phase inversion signal 1b is output to the phase correction circuit 2 shown in FIG.

In FIG. 5 used in the description of the operation described later, the number of color burst signals 1a 'in one line is indicated by four, and the number of gate clocks 11b in the color burst multiplexing period is set to four in correspondence with this. Although the number of flip-flops is four in FIG. 3, this is merely for convenience. Actually, the number of the color burst signals 1a 'in one line is determined in the range of 8 to 12. For example, when eight color burst signals 1a 'are multiplexed, the gate clock 11b
And the number of flip-flops are also eight.

FIG. 4 is a block diagram showing a more specific configuration of the phase correction circuit 2 in FIG. In FIG.
Reference numeral 21 denotes a delay circuit which receives the input video signal 1a and delays the input video signal 1a in order to adjust signal delay and timing by processing in the burst inversion detection circuit 1, and 22 denotes an output 21b from the delay circuit 21 as a burst gate signal. 1aa
In other words, the inversion circuit 23 inverts only the color burst signal 1a ', that is, when the phase inversion signal 1b is inactive (the color burst signal 1a).
When a 'is normal rotation, the output 21b of the delay circuit 21 is selected and output. When the phase inversion signal 1b is active (when the color burst signal 1a' is inverted for copy protection), the inversion circuit is selected. This is a selection circuit that selects the output 22b of the output signal 22 and outputs it to the PLL circuit 3 of FIG. 1 as the phase correction signal 2b. As a result of the operation of the phase correction circuit 2, as the data of the color burst signal 1a 'input to the PLL circuit 3, the non-inverted data is always input.

The operation of the clock recovery circuit in the color demodulation circuit of the television receiver configured as described above will be described below with reference to FIGS. 5 (a) and 5 (b). FIG. 5A is a timing chart for explaining the operation of a non-inverted color burst video signal 1a in which the color burst signal 1a 'for copy protection is not inverted and multiplexed, and FIG. 5 is a timing chart for explaining the operation of the inverted color burst video signal 1a obtained by inverting and multiplexing the color burst signal 1a '.

In the color demodulation circuit, a burst gate signal 1aa is generated to indicate a color burst multiplexing period of the input video signal 1a, and this burst gate signal 1aa is generated by the clock gate circuit 11 in the burst inversion detection circuit 1.
The signal is input to the sign matching circuit 13 and the inverting circuit 22 in the phase correction circuit 2. The clock gate circuit 11 receives the clock 3b from the PLL circuit 3 which results in phase synchronization with the color burst signal 1a ',
Only during the period of the burst gate signal 1aa, the clock 3b is output to the shift register circuit 12 as the gate clock 11b. The shift register circuit 12 sequentially latches the amplitude value of the color burst signal 1a 'in the input video signal 1a at the timing of the gate clock 11b,
A plurality (for example, eight) of burst data 12 b is sent to the code matching circuit 13. The code matching circuit 13 determines the polarity of the amplitude code of the plurality of burst data 12b input during the period of the burst gate signal 1aa.
As shown in (a), when all are positive (in the case of a normal color burst), the phase inversion signal 1b is made inactive and output to the selection circuit 23 of the phase correction circuit 2 and, for example, as shown in FIG. As shown in ()), when the amplitude signs of the plurality of burst data 12b are all negative, the phase inversion signal 1b is activated and output to the selection circuit 23.

In the meantime, in the phase correction circuit 2, the video signal 1a is input to the delay circuit 21, and after adjusting the signal delay and the timing by the processing in the burst inversion detection circuit 1, the output 21b from the delay circuit 21 is output. Selection circuit 2
3 and the inversion circuit 22 inverts the video signal 1a, that is, the color burst signal 1a 'only during the period of the burst gate signal 1aa, and inputs the output 22b to the selection circuit 23.

When the phase inversion signal 1b from the code matching circuit 13 in the above-described burst inversion detection circuit 1 is inactive (when the color burst signal 1a 'is normal rotation) as shown in FIG. The selection circuit 23 to which the inactive phase inversion signal 1b is input selects the output 21b from the delay circuit 21 as it is and outputs it to the PLL circuit 3. That is, the PLL circuit 3 performs phase synchronization control based on the normal color burst, and generates a clock 3b phase-synchronized with the normal color burst signal 1a '.

Conversely, when the phase inversion signal 1b from the code matching circuit 13 is active as shown in FIG. 5B (the color burst signal 1
a 'is inverted), this active phase inverted signal 1
b, the selection circuit 23 receives the output 2 from the inversion circuit 22.
2b is selected and output to the PLL circuit 3 as the phase correction signal 2b. The phase correction signal 2b, which is the output 22b from the inversion circuit 22, is obtained by inverting the color burst signal 1a 'inverted and multiplexed to the input video signal 1a for copy protection. The correction signal 2b eventually becomes a non-inversion color burst as in the case of FIG.

Therefore, the data of the color burst input to the PLL circuit 3 is always non-inverted data.
The L circuit 3 performs phase synchronization control based on the non-inverted color burst, and generates a clock 3b that is phase-synchronized with the non-inverted color burst signal 1a '. The generated clock 3b is output to the clock gate circuit 11 in the burst inversion detection circuit 1 and to a predetermined circuit portion of the color demodulation circuit.

As a result, even if the number of lines on which the inverted color burst signal for copy protection is multiplexed becomes larger than a certain value, all the lines on which the inverted color burst has been applied by the clock recovery circuit are processed. A PLL is used to forcibly convert the color burst signal to the normal rotation state.
The clock for color demodulation generated by the circuit is phase-synchronized with the color burst signal in the case of normal rotation without disturbing its phase, so it is received or reproduced and displayed on the screen of the television receiver. It is possible to reliably prevent the influence of color fringes or the like from appearing in the output image.

A plurality of burst data 1 in one line
It is considered that there is not much possibility that both plus and minus are mixed in 2b. Then, in such a case, the same operation as in the case of FIG. With respect to the clock 3b generated by the PLL circuit 3, a minute period (shorter than a color burst multiplex period) in a range of one line
Causes a phase shift, but has little effect on the image displayed on the screen after being received or reproduced.

It goes without saying that copy protection works for the video recording / reproducing apparatus as in the conventional case. That is, when a video signal 1a received from an antenna or reproduced from a DVD player is recorded on a video recording / reproducing device, when the recorded video signal is reproduced and displayed on a screen, as shown in FIG. Symptoms such as color stripes that interfere with viewing occur, and the effect of substantial copy protection is improved.

[Embodiment 2] By the way, depending on environmental conditions, the video signal 1a is affected by noise due to a weak electric field and distortion of a transmission line (space or cable), and accordingly, the video signal 1a is multiplexed with the video signal 1a. The color burst signal 1a 'is also affected, which may affect the amplitude of the burst data 12b sampled and latched by the gate clock 11b, and an amplitude code error may occur in some data. . In particular, in the case of a weak electric field, the amplitude itself becomes small and approaches the level of noise, so that it is difficult to determine the amplitude code. This also occurs when there is no distortion in the transmission path. The details are as follows.

That is, when the color burst is originally a normal color burst, the amplitude A (positive) of the latched burst data is smaller than the expected value due to the influence of the transmission path and noise. Noise amplitude B (negative)
If the absolute value of is larger, the composite amplitude (A +
B) becomes negative, and a positive → negative inversion phenomenon occurs. Conversely, when the color burst is originally an inverted color burst for copy protection, the amplitude A '(negative) of the latched burst data becomes smaller than the expected value due to the influence of the transmission path and noise. And the amplitude B 'of the noise interfered with by this
If the absolute value of (positive) becomes larger, the composite amplitude (A + B) becomes positive, and a negative → positive inversion phenomenon occurs. In some cases, the combined amplitude value becomes zero depending on the situation. When the amplitude sign inversion phenomenon as described above occurs, in the case of the clock recovery circuit of the first embodiment, an erroneous judgment is made in the judgment of the normal state / inversion state of the color burst signal by the sign matching circuit 13. May occur. Then, as a result, there is a possibility that an image such as a color stripe may occur on an image received or reproduced and projected on a screen of a television receiver.

Therefore, the second embodiment is proposed for the purpose of solving such inconvenience.

FIG. 6 shows a burst inversion detection circuit 1 of the clock recovery circuit in the color demodulation circuit according to the second embodiment.
FIG. 4 is a block diagram showing a configuration of only a part of FIG. Regarding another configuration of the clock recovery circuit according to the second embodiment,
Since it is the same as the case of FIG. 1 according to the first embodiment, illustration and description are omitted. In the second embodiment, the configuration of the burst inversion detection circuit 1 is slightly different from that of the first embodiment.

In FIG. 6, reference numeral 11 denotes a clock gate circuit similar to that of the first embodiment, and reference numeral 12 denotes a shift register circuit similar to that of the first embodiment. Therefore, detailed description is omitted. Reference numeral 14 inputs a plurality of burst data 12b output from the shift register circuit 12, determines the polarity of the amplitude code of each burst data 12b, and compares the number of plus data and the number of minus data among them. In a majority vote (the expression of the majority rule has redundancy as described later), when the number of positive data is larger than the number of negative data, in principle, it is determined that the normal color burst state is established. Phase inversion signal 1b
Is inactive and output to the phase correction circuit 2 (see FIG. 1). In the opposite case, it is determined that the color burst state is reversed, and the phase inversion signal 1b is activated and output to the phase correction circuit 2. This is a code majority decision circuit.

The majority decision processing of the code majority decision circuit 14 will be described. When the number of burst data 12b is, for example, eight, plus and minus are 8: 0 and 7:
In the case of 1, 6: 2 and 5: 3, it is determined that the color rotation is in the normal rotation state as a result of the majority decision, and the phase inversion signal 1b is made inactive.
At 5, 2: 6, 1: 7 and 0: 8, as a result of majority decision, it is determined that the color burst state is inverted, and the phase inversion signal 1b is activated. If the number is the same, that is, 4: 4, it is regarded as a normal color burst state. Therefore, even if the expression "majority decision" is used,
It is not a majority vote in the usual sense, but a majority vote with redundancy. In the present invention, this should be taken into account when interpreting the technical scope of "majority decision" (more specifically described later).

The code majority decision circuit 14 is configured to perform the above processing during the period of the burst gate signal 1aa.

Next, the operation will be described. The clock gate circuit 11 receives a clock 3b from the PLL circuit 3 (see FIG. 1) which results in phase synchronization with the color burst signal 1a ', and the clock 3b is applied only during the period of the burst gate signal 1aa. To the shift register circuit 12 as the gate clock 11b. The shift register circuit 12 sequentially latches the amplitude value of the color burst signal 1a 'in the input video signal 1a at the timing of the gate clock 11b, and sends out a plurality (for example, eight) of burst data 12b to the code majority decision circuit 14. .
The code majority decision circuit 14 determines the polarity of the amplitude code of the plurality of burst data 12b input during the period of the burst gate signal 1aa, and executes the above-described majority decision processing with redundancy. As a result of the majority decision, when it is determined that the color burst is in the normal rotation state, the phase inversion signal 1b is made inactive and output to the phase correction circuit 2 (see FIG. 1). When it is determined that the state is the color burst state, the phase inversion signal 1b is activated and output to the phase correction circuit 2.

As a result of the majority decision processing, it is determined that the color rotation is in the normal rotation state.
5A becomes inactive as shown in FIG. 5A, the selection circuit 23 in the phase correction circuit 2 of FIG. Is selected as it is and output to the PLL circuit 3 of FIG. That is, P
The LL circuit 3 performs phase synchronization control based on the normal color burst, and generates a clock 3b that is phase-synchronized with the normal color burst signal 1a '.

Contrary to the above, as a result of the majority decision processing, it is determined that the state is the inverted color burst state, and the phase inversion signal 1b from the code majority decision circuit 14 becomes active as shown in FIG. When the active phase inversion signal 1b is input, the selection circuit 23 in FIG. 3 selects the output 22b from the inversion circuit 22 and outputs the phase correction signal 2b.
Is output to the PLL circuit 3 of FIG. This inversion circuit 2
The phase correction signal 2b output from the PLL circuit 3 is an inverted version of the color burst signal 1a ', which is inverted from the input video signal 1a to prevent copy, since the phase correction signal 2b, which is the output 22b from the second circuit 2, is inverted. Finally, FIG. 5 (a)
A normal color burst is obtained as in the case of (1).

Therefore, the data of the color burst input to the PLL circuit 3 is always non-inverted data.
The L circuit 3 performs phase synchronization control based on the non-inverted color burst, and generates a clock 3b that is phase-synchronized with the non-inverted color burst signal 1a '. The generated clock 3b is output to the clock gate circuit 11 in the burst inversion detection circuit 1 and to a predetermined circuit portion of the color demodulation circuit.

Therefore, the color burst signal 1a 'is affected by noise and transmission line distortion caused by a weak electric field,
In the case where the amplitude of the burst data 12b latched by the sampling is also affected, and particularly, even when there is no distortion in the transmission path, the amplitude itself becomes small to the noise level, and it is difficult to determine the amplitude code. Even in the case of an extremely small weak electric field, even if an error such as the inversion phenomenon of the amplitude code occurs in some burst data, as a result of the majority decision processing in the code majority decision circuit 14 as described above, the embodiment 1 In the case of (1), the possibility of erroneous determination of the normal rotation state / inversion state of the color burst signal by the code matching circuit 13 can be greatly reduced. As a result, the number of lines in which the inverted color burst signal is multiplexed for copy protection is constant under the condition that the color burst signal is affected by noise or transmission line distortion caused by a weak electric field. Even if the number is larger than the above, almost in the same manner as in the first embodiment,
A clock for color demodulation generated by a PLL circuit can be phase-synchronized with a color burst signal in the case of normal rotation in a stable state by suppressing phase disturbance, and can be received or reproduced to obtain a television receiver. Can be reliably prevented from appearing on the image projected on the screen.

In the above, the redundancy of the word "majority decision" has been described with a specific example, but this redundancy has a wider range. That is, for example,
When the number of the burst data 12b is the same as the above eight,
When plus / minus is 8: 0, 7: 1 and 6: 2, it is determined that the color rotation is in the normal rotation state as a result of majority decision, and plus / minus is 4: 4, 3: 5, 2: 6,
At 5: 3 in addition to 1: 7 and 0: 8, the reverse color burst state may be determined as a result of the majority decision. Alternatively, it may be configured such that the criterion for majority decision is made variable. The number of color burst signals 1a 'to be multiplexed is generally in the range of 8 to 12, but the number of color burst signals sampled during the period of the burst gate signal 1aa can be arbitrarily set within the above range. . The number may be even or odd. In the present invention, this should be taken into account when interpreting the technical scope of “majority decision”.

[Third Embodiment] Depending on environmental conditions, even in the case of a strong electric field, the burst data 1 sampled by the influence of the reflected wave due to the distortion of the transmission line may be used.
Even if 2b has a certain size, the amplitude is distorted at the sampling timing and an accurate value cannot be obtained. Therefore, an amplitude code error may occur in some data, and it is difficult to determine the amplitude code. become. Then, as a result, there is a possibility that an image such as a color stripe may occur on an image received or reproduced and projected on a screen of a television receiver.

Therefore, the third embodiment is proposed for the purpose of solving such inconvenience.

FIG. 7 shows a burst inversion detection circuit 1 of the clock recovery circuit in the color demodulation circuit according to the third embodiment.
FIG. 4 is a block diagram showing a configuration of only a part of FIG. Regarding another configuration of the clock recovery circuit according to the third embodiment,
Since it is the same as the case of FIG. 1 according to the first embodiment, illustration and description are omitted. In the third embodiment, the configuration of the burst inversion detection circuit 1 is slightly different from that of the second embodiment.

In FIG. 7, reference numeral 11 denotes a clock gate circuit similar to that of the second embodiment, reference numeral 12 denotes a shift register circuit similar to that of the second embodiment, and reference numeral 14 denotes a majority code similar to that of the second embodiment. It is a determination circuit. Therefore,
Detailed description is omitted. 15 is a shift register circuit 12
A plurality of burst data 12b output from
The level of each burst data 12b is compared with the level set value 15a set by the system of the television receiver, and the burst majority data of the burst data 12b having the level set value 15a or more is set as plus burst data 15b. The amplitude comparison circuit is configured to output the burst data 12b having a value less than the level set value 15a to the code majority decision circuit 14 as the negative burst data 15b.
The level setting value 15 given to the amplitude comparing circuit 15
The value a is set to an optimum value in response to the influence of the distortion of the transmission line and the strength of the electric field. The setting is performed by the system microcomputer, and the set value is variable.

Next, the operation will be described. The clock gate circuit 11 receives the clock 3b from the PLL circuit 3 (see FIG. 1) which results in phase synchronization with the color burst signal 1a ', and the clock 3b is applied only during the period of the burst gate signal 1aa. To the shift register circuit 12 as the gate clock 11b. The shift register circuit 12 sequentially latches the amplitude value of the color burst signal 1a 'in the input video signal 1a at the timing of the gate clock 11b, and sends out a plurality (for example, eight) of burst data 12b to the amplitude comparison circuit 15. The amplitude comparison circuit 15 compares the input individual burst data 12b with the level set value 15a, and outputs the burst data 12b having the level set value 15a or more as the plus burst data 15b to the code majority decision circuit 14, and sets the level. The burst data 12b having a value less than 15a is output to the code majority decision circuit 14 as negative burst data 15b. The sign majority decision circuit 14 controls the amplitude comparison circuit 15 during the burst gate signal 1aa.
Then, the polarity of the amplitude code of the plurality of burst data 15b input from the CPU is determined, and the above-described majority decision processing with redundancy is executed. As a result of the majority decision, when it is determined that the color burst is in the normal rotation state, the phase inversion signal 1b is made inactive and output to the phase correction circuit 2 (see FIG. 1). When it is determined that the state is the color burst state, the phase inversion signal 1b is activated and output to the phase correction circuit 2.

As a result of the majority decision processing, it is determined that the color rotation is in the normal rotation state.
5A becomes inactive as shown in FIG. 5A, the selection circuit 23 in the phase correction circuit 2 of FIG. Is selected as it is and output to the PLL circuit 3 of FIG. That is, P
The LL circuit 3 performs phase synchronization control based on the normal color burst, and generates a clock 3b that is phase-synchronized with the normal color burst signal 1a '.

Contrary to the above, as a result of the majority decision processing, it is determined that the state is the inverted color burst state, and the phase inversion signal 1b from the code majority decision circuit 14 becomes active as shown in FIG. When the active phase inversion signal 1b is input, the selection circuit 23 in FIG. 3 selects the output 22b from the inversion circuit 22 and outputs the phase correction signal 2b.
Is output to the PLL circuit 3 of FIG. This inversion circuit 2
The phase correction signal 2b output from the PLL circuit 3 is an inverted version of the color burst signal 1a ', which is inverted from the input video signal 1a to prevent copy, since the phase correction signal 2b, which is the output 22b from the second circuit 2, is inverted. Finally, FIG. 5 (a)
A normal color burst is obtained as in the case of (1).

Therefore, the data of the color burst input to the PLL circuit 3 is always non-inverted data.
The L circuit 3 performs phase synchronization control based on the non-inverted color burst, and generates a clock 3b that is phase-synchronized with the non-inverted color burst signal 1a '. The generated clock 3b is output to the clock gate circuit 11 in the burst inversion detection circuit 1 and to a predetermined circuit portion of the color demodulation circuit.

Although the color burst signal 1a 'is in a strong electric field, the amplitude of the burst data 12b sampled and latched is distorted due to the influence of the reflected wave due to the distortion of the transmission line, etc., and an accurate value is obtained. Therefore, even under the condition that the amplitude code error occurs in some data and the determination of the amplitude code becomes difficult, the majority decision by the code majority decision circuit 14 in the second embodiment can be performed. Before performing the determination processing, the amplitude comparison circuit 1
5, the burst data 12 from the shift register circuit 12
b, and the level of each burst data 12b is compared with the level set value 15a set by the television receiver system according to the degree of the reflected wave due to the distortion of the transmission path and the strength of the electric field. Set value 15a
The above burst data 12b is output to the code majority decision circuit 14 as plus burst data 15b, and the burst data 12b having a level less than the set value 15a is output to the code majority decision circuit 14 as minus burst data 15b. Next, such burst data 15b is sent to the code majority decision circuit 14.
As a result of the majority decision processing in the sign majority decision circuit 14, the sign matching circuit 1 as in the first embodiment is obtained.
3, the possibility of erroneous determination of the normal rotation state / reversal state of the color burst signal can be greatly reduced. And
As a result, the number of lines on which the inverted color burst signal is multiplexed for copy protection is constant under conditions where the color burst signal is affected by the degree of the reflected wave and the strength of the electric field due to transmission line distortion. Even if more than that,
In substantially the same manner as in the first embodiment, the clock for color demodulation generated by the PLL circuit can be phase-synchronized with the color burst signal in the normal rotation in a stable state by suppressing the phase disturbance. It is possible to reliably prevent the influence of color fringes or the like from appearing on an image that is received or reproduced and projected on the screen of the television receiver. If the influence of color fringes or the like appears, the level can be adjusted so that a normal image state is obtained by adjusting the level setting value 15a.

In the third embodiment, the interpretation of the technical scope of the word “majority decision” should be interpreted in the same manner as in the second embodiment.

[Fourth Embodiment] The configuration of the fourth embodiment is not shown. The clock recovery circuit according to the fourth embodiment is different from the burst inversion detection circuit 1 shown in the third embodiment (FIG. 7) in that the code majority decision circuit 14
Instead of the code matching circuit 1 shown in the first embodiment (FIG. 2).
3 is provided.

The effect is that under the condition that the color burst signal is affected by the degree of the reflected wave or the strength of the electric field due to the distortion of the transmission line, the line in which the inverted color burst signal for copy prevention is multiplexed. Even if the number increases beyond a certain level, the clock for color demodulation generated by the PLL circuit is suppressed in the phase disorder, and the clock is stably rotated forward in substantially the same manner as in the first embodiment. Can be phase-synchronized with the color burst signal, and can reliably prevent the influence of color fringes and the like from appearing on the image received or reproduced and projected on the screen of the television receiver. .

[0069]

In a video device such as a television receiver, the time constant of the phase synchronization circuit for color demodulation can be increased only to a certain size in consideration of the response speed of the video reception or video reproduction system. Therefore, conventionally, if the number of lines on which the inverted color burst signal for copy protection is multiplexed increases, the time constant cannot be covered, and the phase of the clock generated for color demodulation is disturbed. However, there is a possibility that an image such as color fringe interference may occur on an image received or reproduced and projected on a screen of a video device.

On the other hand, according to the clock recovery circuit in the color demodulation circuit of the video equipment according to the present invention, when the inverted color burst signal for copy protection is multiplexed, the inverted color burst signal is used. Since the phase of the burst signal is inverted to form a phase correction signal in the normal color burst state, and a clock synchronized with the color burst signal in the normal color burst state as the phase correction signal is generated, a clock is generated. Even if the number of lines in which the inverted color burst signal for copy protection is multiplexed increases, the reproduced or demodulated clock is received or reproduced and displayed on the screen of the video equipment without disturbing the phase of the reproduced color demodulation clock. There is an effect that the influence of color fringe disturbance or the like on the reproduced image can be eliminated.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a clock recovery circuit in a color demodulation circuit of a television receiver according to Embodiment 1 of the present invention.

FIG. 2 is a block diagram showing a more specific configuration of a burst inversion detection circuit according to the first embodiment.

FIG. 3 is a block diagram illustrating an internal configuration of a shift register circuit according to Embodiment 1.

FIG. 4 is a block diagram illustrating a more specific configuration of a phase correction circuit according to the first embodiment.

5A and 5B are timing charts for explaining the operation of the clock recovery circuit according to the first embodiment, wherein FIG. 5A is a timing chart in a normal color burst state;
(B) is a timing chart in the reverse color burst state.

FIG. 6 is a block diagram showing a configuration of only a burst inversion detection circuit in a clock recovery circuit in a color demodulation circuit of a television receiver according to Embodiment 2 of the present invention.

FIG. 7 is a block diagram illustrating a configuration of only a burst inversion detection circuit in a clock recovery circuit in a color demodulation circuit of a television receiver according to Embodiment 3 of the present invention.

FIG. 8 is a block diagram showing a configuration of a PLL circuit in a clock recovery circuit in a color demodulation circuit of a television receiver according to the related art.

FIG. 9 is a block diagram illustrating an internal configuration of a phase comparison circuit in a PLL circuit according to the related art.

FIG. 10 is a timing chart for explaining the operation of the clock recovery circuit according to the related art, where (a) is a timing chart in a normal color burst state;
(B) is a timing chart in the reverse color burst state.

FIG. 11: When a video signal multiplexed with an inverted color burst signal for copy protection is recorded by a video recording / reproducing device, the video signal reproduced from the video recording / reproducing device is displayed on a screen of a television receiver. FIG. 8 is a screen display state diagram showing a display state when the display is turned on.

[Explanation of symbols]

 1 burst inversion detection circuit 1a video signal 1a 'color burst signal 1aa burst gate signal 1b phase inversion signal 2 phase correction circuit 2b phase correction signal 3 PLL circuit ( Phase synchronization circuit) 3b Clock serving as a reference for color demodulation 11 Clock gate circuit 11b Gate clock 12 Shift register circuit 12b Burst data 13 Code matching circuit 14 Code Majority decision circuit 15 Amplitude comparison circuit 15a Level setting value 15b Modified burst data 21 Delay circuit 22 Inverting circuit 23 Selection circuit

Claims (4)

[Claims] 1. A burst inversion detection circuit for determining whether or not a phase of a multiplexed color burst signal is inverted in a video signal and outputting a phase inversion signal when the phase is inverted, and when a phase inversion signal is input. A phase correction circuit that inverts the phase of the color burst signal and outputs a phase correction signal in a normal color burst state, and generates a clock that receives the phase correction signal and is phase-synchronized with the color burst signal in the normal color burst state A clock recovery circuit in a color demodulation circuit of a video device, comprising: 2. A burst inversion detecting circuit, comprising: a clock which is phase-synchronized with a color burst signal in a normal color burst state; and a burst gate signal indicating a multiplex period of the color burst signal. It has a code matching circuit that detects the signal amplitude, identifies the phase of the multiplexed color burst signal by matching the amplitude code, and activates and outputs the phase inversion signal when there is phase inversion. In the burst gate period, the phase correction circuit
When an inactive phase inversion signal is input, the color burst signal is not inverted and a phase correction signal is output in the normal color burst state. When an active phase inversion signal is input, the color burst signal is inverted. The phase-locked circuit is configured to output a phase correction signal in a non-inversion color burst state.
The phase correction signal in the normal color burst state is input to perform phase synchronization control, and a clock synchronized with the color burst signal in the normal color burst state is generated. 2. A clock recovery circuit in the color demodulation circuit of the video device according to 1. 3. A burst inversion detection circuit detects the amplitudes of a plurality of color burst signals within a burst gate period instead of the code matching circuit of claim 2, and multiplexes the signals based on the result of majority decision of the amplitude code. 3. The color demodulation of an image device according to claim 2, further comprising a code majority decision circuit that identifies the phase of the color burst and outputs an inactive or active phase inversion signal. Clock recovery circuit in the circuit. 4. A burst inversion detecting circuit, in addition to the configuration of the burst inversion detecting circuit according to claim 3, detects the amplitude of a plurality of color burst signals in a burst gate period, and sets the burst data and the level from a system. 4. The color of a video device according to claim 3, further comprising an amplitude comparison circuit that outputs positive or negative burst data to a code majority decision circuit based on a result of comparison with the value. Clock recovery circuit in demodulation circuit.