JPH10276216A - Packet data transfer controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the communication efficiency of packet data made into a cell and to reduce the cost by temporarily storing packet data which cannot directly be transferred to a packet memory and holding the number of entries registered in an entry control table for respective reception destination ports in a reserve counter. SOLUTION: Packet data is divided into plural small unit cells. The respective cells are time-divisionally transferred from a transmission source port to the reception destination port. When packet data cannot directly be transferred from the transmission source port to the reception destination port, packet data is temporarily stored in the packet memory PM. The reserve counters RC are provided for the respective reception destination ports. The transfer request of packet data is registered in the entry control table as the entry and the number of the registered entries is held in the reserve counter RC. Thus, a transmission time sequence between the transmission request of new packet data and the entry registered in the entry control table is completely held.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a network constructed by interconnecting a plurality of computers.
The present invention relates to a packet data transfer control device that is divided into a plurality of small unit cells and relays the transfer of packet data (also referred to as a frame or frame data) that is transferred in a time-division manner using the cell as a transfer unit.

[0002]

2. Description of the Related Art A packet data transfer control device is, as represented by a switching hub, a plurality of computers, a plurality of networks, or a network in which these are mixed and connected to form an integrated network. An apparatus for constructing an environment, having a function of relaying transfer of packet data, which is communication data between computers.

FIG. 7 shows a conceptual diagram of an example of a packet data transfer control device. In the illustrated example, the packet data transfer control device 20 includes n ports P1, P2,.
-1, Pn, and each port P1, P2,
, Pn−1, Pn, corresponding to the packet memories PM1, PM2,.
n-1, PMn and an entry control table or the like for registering a packet data transfer request as an entry,
Port controllers PTC1, PTC2,..., PTC controlling the respective ports P1, P2,.
n-1, PTCn.

[0004] Each port controller PTC1, PT
, PTCn-1, PTCn are switch buses SB for transmitting and receiving packet data, and port controllers PTC1, PTC2,..., PTCn-1,.
Are interconnected via a control bus CB for transmitting and receiving control signals used between the PTCs,
Packet memories PM1, PM2,..., PMn-1, PM
n is the corresponding port controller PTC1,
PTC2,..., PTCn-1, and PTCn are connected one-to-one.

The packet data transfer control device 2
0, a computer PC1 is connected to the port P1, a computer PC2 is connected to the port P2,..., A computer PCn-1 is connected to the port Pn-1, and the computers PCn1 and PCn2 are connected to the port Pn. Is connected. Here, for example, port P1
From computer PC1 connected to port Pn
Assume that packet data is transferred to the computer PCn-1 connected to the PC-1.

[0006] The packet data transferred from the computer PC1 is first transferred to a port controller PTC1 which controls the port P1. The header information of the packet data includes the computer PC that is the transmission source (source).
1 and the network address of the computer PCn-1 serving as the destination (destination). Based on this, the source port P1 and the destination port Pn- corresponding to the respective network addresses are included.
1 is detected.

Here, the port Pn-
1 is not communicating (BUSY), the packet data held in the port controller PTC1 that controls the port P1 is divided into a plurality of small unit cells, and the port Pn
-1 is sequentially transferred directly to the port controller PTCn-1 which controls -1 and is output as continuous packet data from the port Pn-1. And the computer PCn-
1 determines whether or not the packet data is to be received by itself, based on the header information of the packet data output from the port Pn-1, and receives the packet data.

On the other hand, the port Pn-1 serving as a destination port
Is communicating, the packet data held in the port controller PTC1 that controls the port P1 is
The transfer request is temporarily stored in the first packet memory PM1, and this transfer request is sequentially registered in the entry control table as a new entry that has not been transmitted as a standby control state by the port controller PTC1.

However, in such a configuration, it is determined whether or not it is possible to transmit a new entry or a packet data input from another port in the standby state. Must be monitored via the control bus CB, and control of which port should be prioritized must be similarly performed via the control bus CB, and the period for this control is a packetized packet. Switching data to switching bus S
B, and the bus efficiency was extremely poor.

[0010] In particular, in a system for increasing the efficiency of the switching bus SB by dividing packet data into cells for improving bus efficiency and multiplexing data transfer, how to solve this problem is of great concern. Met. Further, in the packet data transfer control device 20, each of the port controllers PTC1, PTC2,.
1, PTCn, the packet memories PM1, PM
2,..., PMn−1, PMn, there is also a problem that the cost becomes very high.

[0011]

SUMMARY OF THE INVENTION It is an object of the present invention to improve the communication efficiency of packetized packet data and reduce the cost by considering the problems based on the prior art. An object of the present invention is to provide a transfer control device.

[0012]

In order to achieve the above object, the present invention divides packet data into a plurality of small unit cells, and transfers each packet data cell from a source port to a destination port. A packet data transfer control device for transferring in a time-division manner, a packet memory for temporarily storing the packet data when the packet data cannot be directly transferred from the source port to the destination port,
An entry control table for registering a packet data transfer request as an entry, and a reserve counter provided for each destination port and holding the number of entries registered in the entry control table. The present invention provides a packet data transfer control device that performs the following.

[0013]

The packet data transfer control device according to the present invention divides packet data into a plurality of small unit cells, and transmits the individual packet data cells in a time-division manner using this cell as one unit. Number of entries registered in the entry control table for each destination port, that is, the number of entries for which transmission has been requested but not yet completed Is held. When a new packet data transmission request is registered in the entry control table, the value of the reserve counter of the destination port of the packet data is counted up, and when the reception of one packet data is completed, Then, the value of the reserve counter of the port receiving this packet data is counted down.

As described above, by providing a reserve counter for each destination port, a transmission request to be transmitted prior to a new packet data transmission request is already registered in the entry control table. Can be checked instantaneously, so that the transmission efficiency between the new packet data transmission request and the entry that has already been registered in the entry control table is completely maintained while maintaining the communication efficiency. Can be maximized. Further, according to the packet data transfer control device of the present invention, since the packet memory is shared, the cost can be reduced.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a packet data transfer control device according to the present invention will be described in detail based on a preferred embodiment shown in the accompanying drawings.

FIG. 1 is a conceptual diagram of an embodiment showing an internal configuration of a packet data transfer control device of the present invention. The illustrated example of the packet data transfer control device 10 includes n ports P
, Pn, a packet transfer information interpreting unit PRP, a packet controller PQC, a packet memory PM, and respective ports P1, P2,.
Port controllers PTC1, PTC2 for controlling
, PTCn, reserve counter RC, and transfer reference table group TRT.

Here, each port controller PTC
, PTCn include a switch bus SB for transmitting and receiving packet data, a header bus HB for outputting header information of the packet data to the packet transfer information interpreting unit PRP, and port controllers PTC1 and PTC2. ,..., PTCn are mutually connected via a control bus CB for transmitting and receiving control signals used.

Further, the packet transfer information interpreting section PRP
The packet controller PQC and the packet memory PM are connected to the header bus HB and the control bus CB, and similarly, are connected to the switch bus SB and the control bus CB. Packet transfer information interpreter P
The RP is connected to the transfer lookup table group TRT, and the packet transfer information output from the packet transfer information interpreter PRP is input to the packet controller PQC. The packet controller PQC is connected to the transfer reference table group TRT and the reserve counter RC.

A computer PC1 is connected to the port P1 of the packet data transfer control device 10 in the illustrated example, and similarly, a computer PC2 is connected to the port P2,..., The computers PCn1 and PCn2 are connected to the port Pn. It is connected.

The illustrated packet data transfer control device 10
, The packet transfer information interpreting unit PRP refers to an address conversion table ATT described later based on the header information of the packet data output from each of the port controllers PTC1, PTC2,. Interprets which port the packet data is to be transferred from, and transmits the packet transfer information as the interpretation result to the packet controller PQ.
Output to C.

The packet controller PQC refers to a port monitor table PMT, which will be described later, to determine the communication state of each of the ports P1, P2,.
The packet data is controlled from the source port to the destination port or the packet memory PM based on information indicating whether or not communication is in progress (BUSY), packet transfer information input from the packet transfer information interpreter PRP, and the like. hand,
The packet is transferred from the source port to the packet memory PM or from the packet memory PM to the destination port.

Subsequently, the packet memory PM stores the packet data when the receiving port is not communicating, or when the receiving port is not communicating in order to maintain the time series of the transfer of the packet data. However, when there is packet data to be transferred prior to this packet data, each port controller PTC1, PTC2,
.., For temporarily storing packet data output from the PTCn.

Here, in the packet data transfer control device 10 of the present invention, like the conventional packet data transfer control device 20 shown in FIG. 7, for example, each of the port controllers PTC1, PTC2,. P
Instead of providing the packet memories PM1, PM2, and PMn for each TCn, as shown in FIG. 1, by sharing one packet memory PM for all the port controllers PTC1, PTC2,..., PTCn,
There is an advantage that the cost of the entire apparatus can be reduced.

Subsequently, the port controllers PTC1, PTC
, PTCn are computers PC1, PC2,..., PCn1 and PCn2 connected to the corresponding ports P1, P2,.
And outputs it to the switch bus SB, and conversely, receives packet data transferred by the packet controller PQC,
This is output from each of the ports P1, P2,..., Pn.

On the switch bus SB, for example, FIG.
As in the conventional packet data transfer control device 20 shown in FIG. 1, cell data is transferred from each port controller in a time-division manner. Therefore, the packet data from the port P1 is cellized (cell i) and
At the same time as transferring the packet data to n-1, the packet data from the port Pn can be cellized (cell k) and transferred to the port P2. At this time, there is no relationship between the cells, and independent transfer is possible.

This is because each port controller PTC
1, PTC2,..., PTCn have a data communication speed of, for example, 10 Mb (megabit) / sec, whereas a switch bus S for transmitting and receiving packet data is used.
B has a data communication rate of, for example, 1 Gb (gigabit) / second, and each packet data is divided into a plurality of small unit cells, and is transferred in a time-division manner using this cell as a transfer unit. In other words, it becomes possible only after multiplexing.

Subsequently, the reserve counter RC indicates the number of entries registered in an entry control table ECT described later for each of the receiving ports P1, P2,. This is to hold the number of entries that have not been transmitted yet.

When a new packet data transmission request is registered in the entry control table ECT, the value of the reserve counter RC of the destination port of the packet data is counted up. When the reception of the packet data is completed, the reserve counter R of the destination port of the packet data
The value of C is counted down. That is, if the initial value of the reserve counter RC is 0, it becomes 0 only when no packet data to be received is registered in the entry control table ECT.

By storing the number of entries registered in the entry control table ECT for each of the receiving ports P1, P2,..., Pn by the reserve counter RC, a new packet data transmission request Is performed, it is possible to instantaneously check whether or not a transmission request to be transmitted prior to the transmission request of the new packet data is already registered in the entry control table ECT. The transmission efficiency can be maximized while maintaining the time series of transmission between the packet data transmission request and the existing packet data transmission request.

Next, FIG. 2 shows a conceptual diagram of one embodiment of the transfer reference table group. The transfer reference table group TRT is:
Various data necessary for packet data transfer are registered in advance, or newly registered in response to a transfer request, and have various tables referred to when transferring packet data. Are the address translation table ATT and the port monitor table PMT
, An entry control table ECT, first and second
Entry number reference tables ERT1 and ERT2,
And an empty entry number management table EMT.

The address translation table ATT is mutually connected to the packet transfer information interpreting unit PRP, and the port monitor table PMT and the entry control table ECT are mutually connected to the packet controller PQC. Note that the connection between each table conceptually indicates the direction in which each table acts, and does not necessarily indicate a physical connection between the tables.

In the transfer reference table group TRT, ports P1, P2,..., Pn corresponding to the network addresses of the computers PC1, PC2,.
Information is registered. Packet transfer information interpreter PR
P, each port controller PTC1, PTC
, PTCn, the header information of the packet data is interpreted, and the network addresses of the computers PC1, PC2,..., PCn1 and PCn2 to which the packet data are received correspond to this using the address translation table ATT. Are converted to ports P1, P2,..., Pn.

The port monitor table PMT stores each of the ports P1, P2,.
For managing the current cell data reception state of Pn, as shown in FIG. 3, n entries corresponding to the respective destination ports P1, P2,..., Pn of the cell data are prepared. Have been. In the entry, the source port number of the cell data is registered corresponding to each entry. Therefore, for example, when the packetized packet data is transferred from the port P1 to the port P2, the port P1 is registered in the entry of the port P2, and the port P2 is already used as the cell data receiving port, and the further transfer request is made. Will be unacceptable if it comes from another port.

Subsequently, the entry control table ECT
Are the packet data temporarily stored in the packet memory PM and the port controllers PTC1, PTC
This is a table for controlling all packet data transfer requests from C2,..., PTCn as transfer entries. For example, the entry control table E shown in FIG.
In the CT, k entries indicated by entry numbers E1, E2,..., Ek are registered. Each entry is a destination port of the packet data, a source port of the packet data, and a packet storing the port. It is composed of a storage address of the memory PM and the like.

The configuration of the entry control table ECT is not limited to this embodiment. For example, as shown in FIG. 5, in order to improve the operation speed, a relatively high-speed and small-capacity entry control cache table ECCT is used.
And a relatively low-speed and large-capacity entry control main table ECMT. At this time,
Some transferable entries are appropriately transferred to the entry control cache table ECCT from the entry control main table ECMT.

Here, when the source ports are direct port controllers PTC1, PTC2,..., PTCn,
The storage address described above is the port controller PTC
1, PTC2,..., PTCn itself. Therefore, as shown in FIG. 4, for example, the first bit of the storage address data is set as a storage address valid bit, and when the storage address valid bit is '0', for example, the flag indicating this directly indicates the port controller. Conversely, when it is '1', the data below it may indicate the address of the packet memory PM.

The information on each packet data is obtained from the address translation table ATT. Here, the port monitor table PMT is
Here's how it works. As described above, the port monitor table PMT indicates the current reception status of the cell data of each port as the name implies, and here the header information of the new packet data is transmitted to the packet transfer information interpreter PRP. Is input, and the packet data is transferred from port P3 to port P1.

At this time, as shown in the entry of the entry number E1 in FIG.
2 and the other packet data cannot be received at that time. Therefore, the packet data from the port P3 is temporarily registered in the entry control table ECT so as to be transferred to the packet memory PM. For example, in the case of the present embodiment, as shown in the entry control table ECT of FIG. 4, this entry is registered as the entry of the entry number E2.

That is, in this entry, the destination port is P1 and the source port is P3. For example, the storage address valid bit is set to “1” and the storage destination address of the data is registered. That is, when the storage address valid bit is set to "1", the packet data is not directly transferred from the source port to the destination port, but is transferred from the source port to the packet memory PM. Packet memory PM
The transfer of the packet data is performed in two stages, for example, the packet data is transferred to the destination port.

New entries registered in the entry control table ECT are sequentially registered with reference to an empty entry number management table EMT described later. This empty entry number is generated randomly. The reason is that each packet data is divided into cells, and basically, is transferred in a time-division manner for each cell of each entry in the order registered in the entry control table ECT. This is because, since the length of the data is different, the time until the transfer of each entry is completed varies, and an empty entry number for registering a new entry is randomly generated.

Therefore, a new entry is also registered at random, and transfer is performed sequentially in units of cells. In the packet data transfer control device 10 of the present invention, the transfer of the randomly registered entry is controlled in order. Are provided with first and second entry number reference tables ERT1 and ERT2. The first and second entry number reference tables ERT1, ERT2
Have entry numbers E1 and E corresponding to all entries registered in the entry control table ECT.
2,..., Ek are stored to hold the order of transfer.

The first and second entry number reference tables ERT1 and ERT2 are described below.
At the same time, only one of them is alternately referred to. When a new entry is registered in the entry control table ECT, one of the currently referred first or second entry number reference tables ERT1 and ERT2 contains, for example, all existing entry numbers currently held. Finally, the new entry number is added and registered.

An example of this control will be briefly described below with reference to FIGS. 6 (a) and 6 (b). First, in the entry number reference table ERT1 of FIG.
, Ek are registered. For example, according to the order of this entry number,
By referring to the contents held in each entry of the entry control table ECT, one cell is transferred from the source port to the destination port in a time-division manner independently for all registered entries. Here, each time one cell is transferred, the entry number corresponding to each entry is re-registered in the other entry number reference table ERT2 as a transfer candidate entry for the next cell. At this time, a packet whose transfer of the packet data corresponding to the entry has been completed is not re-registered.

For example, as shown in FIG. 7A, if the transfer of the packet data corresponding to the entry number E2 is completed, the entry number E2 is not re-registered in the entry number reference table ERT2, and When the new packet data is registered in the entry number management table EMT and new packet data comes and the transfer request entry is registered in the entry control table ECT, it is registered as the new entry at the lowest position of the entry number reference table being referred to. . If the transfer of the packet data of the entry number E3 is completed by the transfer of the cell data, as shown in FIG.
Are additionally registered in the empty entry number management table EMT, and E is stored in the entry number reference table ERT1.
Only the entry numbers of 1, E4,..., Ek are re-registered.

As described above, by referring to the entry numbers held in one of the first and second entry number reference tables ERT1 and ERT2, the cell of the packet data corresponding to each entry is sequentially set to 1 Each time one transfer is completed, the number of the entry whose transfer has not been completed is sequentially re-registered in the other second or first entry number reference tables ERT2 and ERT1, and the entry number corresponding to the entry whose transfer has been completed is Are sequentially registered in the empty entry number management table EMT.

The first and second entry number reference tables ERT1 and ERT2 are provided, and the transfer order is constantly updated every time one cell of each entry is transferred in a time-division manner. Time series of transfer can be maintained. As shown in FIGS. 7A and 7B, the last entry number registered in the first and second entry number reference tables ERT1 and ERT2 is the last entry number. It includes an end flag END meaning that there is, and recognizes this END flag,
The cell is exchanged with the other entry number reference table, and the cell transfer of the entry registered therein is controlled.

Each entry registered in the first and second entry number reference tables ERT1 and ERT2 is used to delete packet data that cannot be transferred even after a certain period of time has passed as a timeout. For example, to provide a timer field,
It goes without saying that various attributes may be provided. At this time, the value of the timer field is decremented when the first or second entry number reference table ERT1 or ERT2 is referred to, for example, decremented by one, the value becomes 0, and the entry becomes If the transfer has not been started yet, it is also possible to control such that the entry corresponding to this is deleted.

The packet data transfer control device 10 of the present invention
Has basically the above configuration.
Next, the operation of the packet data transfer control device 10 of the present invention will be described with reference to the computer P connected to the port P1.
Computer P connected to port P2 from C1
The case where packet data is transferred to C2 will be described as an example.

The packet data output from the computer PC1 is input to the port controller PTC1.
The header information is input to the packet transfer information interpreter PRP via the header bus HB. In the packet transfer information interpreter PRP, the address conversion table A
Referring to TT, ports P1 and P2 to which computers PC1 and PC2 are connected are detected. This detection result is output as packet transfer information and input to the packet controller PQC.

Here, each entry of the port monitor table PMT has, based on the packet transfer information,
The source ports of the packet data transferred to the corresponding ports P1, P2,..., Pn are registered.
Further, as described above, if the initial value of the reserve counter RC is 0, there is no preceding transmission request when the value of the reserve counter RC is 0, and if the value is 1 or more, the preceding transmission request does not exist. Is the entry control table E
It is already registered in CT.

The packet controller PQC refers to the port monitor table PMT to confirm whether or not the receiving port P2 is communicating, read the value of the reserve counter RC corresponding to the receiving port P2, and Check if there is a transmission request to be transmitted prior to the request. Here, if the destination port P2 is not communicating and there is no transmission request to be transmitted prior to this transmission request, the packet controller PQC sets the destination port P2 in the port monitor table PMT at
The source port P1 is registered, and it is specified that packet data is directly transferred during this time.

Subsequently, the packet controller PQC:
The transfer request is registered as a new entry in the empty entry of the entry control table ECT with reference to the empty entry number management table EMT.
For example, if the receiving port P2 is not communicating and there is no transmission request to be transmitted prior to this transmission request,
The entry is registered with the storage address valid bit set to '0', otherwise, the storage address valid bit is set to '1'. In addition, the packet controller PQC stores the entry number corresponding to this entry in one of the first or second entry number reference tables ERT1 and ERT2 currently being referred to by all existing entry numbers currently held. Register at the end of.

The transfer of the packet data corresponding to each entry registered in the entry control table ECT is performed by the first or second entry number reference table ER.
With reference to T1 and ERT2, the registration is basically performed in the registered order.

Here, if the storage address valid bit held in the entry corresponding to this transfer in the entry control table ECT is “0”, that is, the destination port P2 is not in communication and this transmission When there is no transmission request to be transmitted prior to the request, the packet controller PQC divides the packet data output from the port controller PTC1 into a plurality of small unit cells, and And transfers it directly to the port controller PTC2. Then, the packet data transferred to the port controller PTC2 is output from the port P2, and the computer PC2 determines whether or not the packet data to be received is based on the header information of the packet data output from the port P2. To receive this.

On the other hand, if the storage address valid bit is “1”, that is, if the destination port P2 is not communicating, but there is a transmission request transmitted prior to this transmission request, or When the destination port P2 is communicating, the packet controller PQC temporarily transfers the packet data output from the port controller PTC1 to the packet memory PM via the switch bus SB. The transfer request from the packet memory PM to which the packet data has been transferred to the port P2 is set as a new entry, and the above-described entry control table ECT
And the value of the reserve counter RC corresponding to the destination port P2 of the transmission request is counted up. This entry is processed when the port P2 stops communicating.

As described above, each packet data is divided into a plurality of small unit cells, and each packet data cell is sequentially transferred in a time-division manner. That is, the transfer of the packet data is multiplexed. Have been. Therefore, in the transfer of the packet data corresponding to each entry, first, the first cell of the packet data corresponding to each transferable entry is transferred, and so on.
, A third cell,..., In that order. These cells are sequentially transmitted to the switch bus SB in a time division manner and transferred independently for each packet data.

Here, one cell of packet data corresponding to each transferable entry is transferred in a time-division manner, for example, by referring to the entry number registered in one first entry number reference table ERT1. Every,
An entry whose transfer has not been completed has its entry number set to the other second entry number reference table ERT.
2, the entry whose transfer number has been completed has the entry number of the empty entry number management table EMT.
Will be registered additionally.

As described above, the transmission of the cell of the packet data corresponding to each entry is performed in a time-division manner, and every time the transmission of one packet data is completed, the reserve counter RC of the receiving port of the transmission request is checked. The value is counted down. Further, the first and second entry number reference tables ERT1 and ERT2 are alternately referred to, and the time series of transmission between entries in the entry control table ECT is constantly updated.

In the packet data transfer control device of the present invention, the time series between entries registered in the entry control table ECT can be determined by alternately referencing the first and second entry number reference tables ERT1 and ERT2. In addition to the retention, the reservation counter provided for each destination port also retains the time series of transmission between a new packet data transmission request and an entry already registered in the entry control table ECT. Therefore, the efficiency of multiplexed communication can be maximized.

Although the present invention has been described with reference to an embodiment, the packet data transfer control device of the present invention is not limited to this embodiment, and various types of packet data transfer control devices may be used without departing from the spirit of the present invention. Needless to say, it is possible to make changes.

[0061]

As described in detail above, the packet data transfer control device according to the present invention comprises:
This is provided with a reserve counter for counting the number of entries registered in the entry control table.
Thereby, according to the packet data transfer control device of the present invention, it is possible to instantly confirm whether there is a transmission request preceding the new packet data transmission request. The transmission efficiency can be maximized while the time series of transmission with the existing transmission request to be transmitted prior to this is completely maintained. Further, according to the packet data transfer control device of the present invention, since the packet memory is shared by one as compared with the conventional device, the cost of the entire device can be reduced.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of one embodiment showing an internal configuration of a packet data transfer control device of the present invention.

FIG. 2 is a conceptual diagram of one embodiment of a transfer reference table group.

FIG. 3 is a conceptual diagram of one embodiment of a port monitor table.

FIG. 4 is a conceptual diagram of one embodiment of an entry control table.

FIG. 5 is a conceptual diagram of another embodiment of the entry control table.

FIGS. 6A and 6B are conceptual diagrams of an embodiment of an entry number reference table and an empty entry number management table.

FIG. 7 is a conceptual diagram of an example of a packet data transfer control device.

[Explanation of symbols]

10, 20, 30 Packet data transfer control device PRP packet transfer information interpreter PQC packet controller PM packet memory PTC1, PTC2,..., PTCn port controller SB switch bus HB header bus CB control bus P1, P2,. PC2,..., PCn1 and PCn2 Computer TRT transfer reference table group ATT address conversion table PMT port monitor table ECT entry control table ERT1, ERT2 entry number reference table EMT free entry number management table MCCT memory control cache table MCMT memory control main table E1, E2, ..., Ek Entry number END End flag

Claims (1)

[Claims] 1. A packet data transfer control device for dividing packet data into a plurality of small unit cells and transferring each packet data cell from a source port to a destination port in a time-division manner. A packet memory for temporarily storing the packet data when the packet cannot be directly transferred from the source port to the destination port, an entry control table for registering a packet data transfer request as an entry, A packet data transfer control device, comprising: a reserve counter provided for each entry and holding a number of entries registered in the entry control table.