JPH10256307A - Wiring board with semiconductor device, wiring board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the durability of connections by separating a substrate solder material from element pads contg. Ca; this material contg. specified amt. of Sn and having a lower m.p. than that of element solder bumps contg. specified content of Sn. SOLUTION: A semiconductor element 1 has element solder bumps 3 contg. Sn by 0-20wt.% element pads 4 contg. Cu. Substrate solder bumps 8 having a lower m.p. than that of the element bump 3 and contg. Sn by 20wt.% or more and element 1 are set to heights enough to separate the substrate bumps 8 from the pads 4 when the bumps 8 are welded to the element bumps 3. This effectively prevents bonded parts from being broken for a long time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board with a semiconductor element in which a semiconductor element and a wiring board are joined using solder bumps, a wiring board, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, when a semiconductor element (hereinafter, referred to as a flip chip) is mounted on a flip chip mounting substrate (hereinafter, also simply referred to as a substrate) by a so-called flip chip method, the following procedure is adopted. I have.

For example, as shown in FIG. 16A, a bump P3 made of a high-temperature solder is formed on a pad P2 of a flip chip P1, while a bump P3 of a flip-chip mounting board P4 is formed on a pad P5 of a flip-chip mounting substrate P4. A bump P6 made of a eutectic solder having a low melting point is formed, the bumps P3 and P6 are brought into contact with each other, heated to about 210 ° C., and only the eutectic solder is melted for joining.

The pad (chip-side pad) P2 of the flip chip P1 has a Cu layer mainly formed by Cu sputtering, while the pad (substrate-side pad) of the flip-chip mounting substrate P4. P5
Is obtained by subjecting a Cu layer formed by Cu plating to Ni plating and Au plating.

The flip chip mounting substrate P4
As a method for forming the bump P6 of
Are known. Solder paste printing method Solder paste is placed by printing on the underlying conductive pad formed on the substrate, and then heated to melt the solder paste, forming a hemispherical or spherical solder bump on the pad how to.

Solder preform mounting method A method in which a solder preform is mounted on a pad of a substrate and then heated to melt the solder preform to form solder bumps. Solder bonding method A method of forming solder bumps by applying solder to a substrate pad by bonding and then heating and melting the solder.

Ball mounting method A small amount of eutectic solder paste is applied on a pad of a substrate, and after mounting the ball thereon, the ball is fixed to the pad by heating to melt the eutectic solder paste and solder. A method of forming a bump.

[0008] Solder dipping method A method of immersing a product in molten solder or contacting the product with a jet of molten solder to form a solder bump on a pad. Electroless solder plating method A method in which solder is supplied to pads by electroless plating to form solder bumps.

[0009]

SUMMARY OF THE INVENTION
When the solder bumps are formed by the method described above, there are the following problems, and further improvement is required. That is, as shown in FIG. 16 (b), when the flip chip P1 and the flip chip mounting substrate P4 are joined, the eutectic solder of the bump P6 on the flip chip mounting substrate 4 is melted to melt the chip side pad P2. Although the eutectic solder crawls up to the portion, about 60% of the eutectic solder is Sn, so Sn reacts with Cu in the chip-side pad P2 to form a large amount of hard and brittle intermetallic compound P7.

The intermetallic compound P7 is used as a pad P on the chip side.
When the chip P2 and the bump P3 are used for a long time, cracks occur in the portion due to stress due to a difference in thermal expansion between the flip chip P1 and the flip chip mounting substrate P4. There was a problem that the joint was broken.

SUMMARY OF THE INVENTION An object of the present invention is to provide a wiring board with a semiconductor element, a wiring board, and a method of manufacturing the same, which have high durability at a joint portion and are excellent in productivity, quality and cost.

[0012]

According to the first aspect of the present invention, there is provided a wiring board with a semiconductor element.
A semiconductor element having an element-side solder bump made of an element-side solder material that does not contain Sn or contains at most 20 wt% or less on an element-side pad containing, and a melting point lower than that of the element-side solder bump and 20 wt% or more. A wiring board with a semiconductor element formed by joining a semiconductor element and a wiring board by fusing a board-side solder bump made of a board-side solder material containing Sn and a board-side solder bump to the element-side solder bump. Thus, the substrate-side solder material is separated from the element-side pads.

That is, conventionally, when the board-side solder bumps are fused and bonded to the element-side solder bumps, the board-side solder material containing 20 wt% or more Sn creeps up and reaches the element-side pads containing Cu. Then, Cu and Sn react with each other to form a large amount of a brittle intermetallic compound, which may cause cracks or the like in that portion.

On the other hand, in the present invention, the brittle intermetallic compound is not formed due to the reaction between Cu and Sn, because the substrate-side solder material is not separated from and in contact with the element-side pad. Therefore, even if stress is applied to the joint due to a difference in thermal expansion between the semiconductor element and the wiring board, cracks are less likely to occur, and breakage of the joint can be effectively prevented for a long period of time.

As a solder material not containing Sn or containing at most 20 wt% or less, for example, Pb
Simple substance, Pb-based solder (97.5Pb-2.5Ag, 95P
b-5Ag, 90Pb-5Ag-5Sb, 90Pb-5
Ag-5Sn, etc.) and Pb-Sn solder with Sn being 20
wt% or less (97Pb-3Sn, 95Pb-5
Sn, 90Pb-10Sn), and other components (Ag, S
b, Cu, In, etc.).

As a solder material containing 20 wt% or more of Sn, for example, Pb-Sn based solder includes Pb
-Sn eutectic solder (37Pb-63Sn) and its composition (33Pb-67Sn, 35Pb-65Sn, 40P)
About 20 to 4 such as Pb-60Sn and 45Pb-55Sn
5 wt%, Sn 80-55 wt%). These have a melting point of about 200 ° C. or less, and the difference in melting point from the element-side solder material becomes large, so that handling becomes easy. In addition, other components (Ag, Sb, Cu, I
n, Bi, Cd, etc.) (for example, 36Pb-
60Sn-4Ag, 40Pb-57Sn-3Bi, etc.).

Further, in the fused solder material on the substrate side,
Au formed on the surface to prevent oxidation of the substrate-side solder bumps and the element-side solder bumps may be included by erosion. In the second aspect of the invention, the element-side solder material is made of high-temperature solder containing Pb as a main component, and the substrate-side solder material is made of Pb-Sn eutectic solder.

That is, in the present invention, since the melting temperature of the element-side solder material is set higher than the melting temperature of the substrate-side solder material, the temperature between the two melting temperatures (that is, the element-side solder material does not melt). (At a temperature at which the board-side solder material melts) to melt only the board-side solder material, and then cool to fuse the board-side solder material to the device-side solder bumps, thereby wiring the semiconductor element. Can be bonded to a substrate.

The high-temperature solder containing Pb as a main component is, for example, 97% of Pb-based solder or Pb-Sn solder.
Pb-3Sn, 95Pb-5Sn, 90Pb-10Sn
And the like. On the other hand, Pb of the board-side solder material
The -Sn eutectic solder is preferable because it is easily available and has a low melting point and easily wets with high-temperature solder. However, the composition may be determined in consideration of the melting point of the element-side solder material. For example, a material to which In, Bi, Ag, or the like is added to further lower the melting point may be used.

The element-side pad can be configured to have a layer mainly composed of Cu at the interface with the element-side solder bump. In this case, since the element-side solder material is sufficiently wetted on the layer containing Cu, a stable-shaped element-side solder bump can be formed. Moreover, according to the present invention, the formation of an intermetallic compound in the layer can be prevented, and thus, similarly to the above-described first aspect, it is possible to effectively prevent the joint portion from being broken for a long time.

According to the third aspect of the present invention, the height of the substrate-side solder bump is such that the substrate-side solder material is separated from the element-side pad when the substrate-side solder bump is fused to the element-side solder bump. Is set to The height of the solder bump means the height of the solder bump itself, that is, the height from the bottom surface (upper surface of the pad) of each solder bump to the top of the solder bump.

That is, in the present invention, the height of the board-side solder bump is set to a height at which the board-side solder material does not reach the element-side pad during the above-mentioned fusion, specifically, to a height lower than the conventional height. ing. Therefore, when a semiconductor element is joined to a wiring board having board-side solder bumps set at such a height, the board-side solder material does not reach the element-side pad during fusion, so that, naturally, Cu and A brittle intermetallic compound is not formed due to the reaction with Sn. This is because the board-side solder material spreads over the element-side solder bumps, and the degree of the spread is affected by the height of the board-side solder bumps. Therefore, even if stress is applied to the joint due to a difference in thermal expansion between the semiconductor element and the wiring board, cracks are unlikely to occur, and breakage of the joint can be effectively prevented for a long period of time.

According to the fourth aspect of the present invention, there is provided a wiring board of 20 wt.
% By soldering a semiconductor element having a board-side solder bump made of a board-side solder material containing at least Sn, and having an element-side solder bump on an element-side pad, and a board-side solder bump on the element-side solder bump. In a wiring board for bonding, the height of the board-side solder bump is set to a height at which the board-side solder material is separated from the element-side pad when the above-described fusion is performed.

Sn has a property of easily forming an intermetallic compound, and Cu, Ni, Au, A
Form intermetallic compounds with g, Pt, etc. However, in the present invention, since the substrate-side solder material containing Sn is separated from the element-side pads, no intermetallic compound is formed.

Therefore, as in the third aspect, even if stress is applied to the junction due to the difference in thermal expansion between the semiconductor element and the wiring board, cracks are unlikely to occur, and breakage of the junction is effectively prevented for a long period of time. it can. According to the fifth aspect of the present invention, the height of the board-side solder bump is 60% or less of the height of the element-side solder bump.

In other words, if the height is set to such a value, the brittle intermetallic compound is not formed because the substrate-side solder material does not reach the element-side pads during fusion.
Cracks are less likely to occur, and breakage of the joint can be effectively prevented. The 60% rule is set for geometric reasons as described below.

First, a state in which the semiconductor element and the wiring board are joined will be considered. In this state, when the semiconductor element and the wiring board are closest to each other, as shown in FIG.
The top of the device-side solder bump contacts the board-side pad. In this case, FIG. 1A shows a state in which the board-side solder material does not crawl on the element-side pads and the board-side solder material has the largest volume. This is a state immediately before the element-side pad reaches the lower periphery in the drawing.

Here, since the pad diameters of the element-side pads and the substrate-side pads are generally almost the same, the solder volume (the total volume of the element-side solder bumps and the substrate-side solder bumps) of the joint is shown in FIG. As shown in (b), the volume is approximated as the volume of a cylinder having the element-side pad as the bottom surface and the height of the element-side solder bump as the height. Further, for example, an element-side solder bump made of normal high-temperature solder can be regarded as a substantially hemispherical shape having substantially the same pad diameter and bump height. Therefore, the radius of the element-side solder bump (= element-side solder bump height = board-side solder bump) Radius)
Is r, the volume a of the element-side solder bump and the volume b of the joint are obtained from the following equations (1) and (2).

Volume of element-side solder bump a = (2/3) · πr ³ (1) Volume of joint (cylinder) b = πr ³ (2) Therefore, volume of substrate-side solder material (= substrate side) Since the volume (V) of the solder bump can be regarded as the value obtained by removing the volume (a) of the element-side solder bump from the volume (b) of the joint (column), it can be obtained from the following equation (3).

The volume V of the substrate-side solder bumps V = ba = πr ³ − (2/3) · πr ³ = (1/3) πr ³ = 0.33πr ³ (3) 1/2 of the volume a of the side solder bump
In the following, the substrate-side solder material does not reach the element-side pads.

Here, since the substrate-side solder bump has a substantially spherical shape cut by surface tension during melting, its volume V is determined by the pad diameter r of the substrate-side pad and the bump height T.
Thus, the following calculation can be performed. still,
In the following calculations, the radius of the cut sphere forming the bump shape is L, and the difference between the radius L of the sphere and the bump height T is t.

As shown in FIG. 2A, when the bump is smaller than a hemisphere, L ² = r ² + t ² , T = Lt, and L = (r ² / T + T) / 2 (4) t = (R ² / T−T) / 2 (5)

[0033]

(Equation 1)

As shown in FIG. 2B, when the bump is larger than a hemisphere, L ² = r ² + t ² , and T = L + t, so that L = (r ² / T + T) / 2 t = (T−r ² / T) / 2

[0035]

(Equation 2)

Here, as shown in FIG. 1C, for example, the volume V of the substrate-side solder bump made of eutectic solder is equal to the volume b (= (2 /
3) Since it is less than half of πr ³ (V = (１ ／) πr ³ ), the bump is smaller than a hemisphere as shown in FIG. 2A.

Therefore, the volume V of the substrate-side solder bump can be calculated from the above equation (6). For example, the volume V of the board-side solder bump in the allowable limit state shown in FIG.
Since V = 0.33πr ³ from the above equation (3), if L and t satisfying the following equation (7) are obtained, the bump height T can be obtained.

[0038] ^{0.33πr 3 = π (L 3 ×} 2/3-L 2 t + t 3/3) ... (7) Conversely, given a bump height T, L, a t determined, as a result, V = If 0.33πr ³ is satisfied, the bump height T
Is the desired value. Therefore, here, T =
0.6 × r, that is, as in the present invention, the bump height T of the board-side solder bump is equal to the pad diameter r of the board-side pad.
Assuming that 60% of (= the height of the element-side pad having the same pad diameter and hemispherical shape), from the above equation (4), L = (r ² /0.6r+0.6r)
/2=1.13×r From the above equation (5), t = (r ² /0.6r−0.6r)
/2=0.53×r. Therefore, from the above equation (6), V = π [(1.13 × r) ³ × 2 / 3− (1.13 ×
^{r) 2 × 0.53r + (0.53r} ) 3 /3]=0.33
πr ³ , and this volume V matches the solder volume in the limit state where the board-side solder material does not reach the element-side pad at the time of bonding, as shown in FIG. 1A and the equation (3).

From the above, if the bump height of the substrate-side solder bump is 60% or less of the bump height of the element-side solder bump, the substrate-side solder material does not reach the element-side pad at the time of bonding. It can be seen that the component of the substrate-side solder material does not react with the component of the element-side pad to form an intermetallic compound.

In the wiring board according to the present invention, the height of the board-side solder bump is 10 to 40 μm. In other words, the height of the device-side solder bumps actually provided on the semiconductor device is usually about 70 μm. Therefore, when the board-side solder material is fused to the device-side solder bumps, the board-side solder material is In order not to reach the pad and to perform sufficient bonding, the height of the board-side solder bump should be 10 to 40 μm.
It is good to set to the height of.

That is, the height of the solder bump on the substrate side is 10
When the thickness is at least μm, the volume of the substrate-side solder material is sufficient and the bonding strength can be secured. When the height is at most 40 μm, the substrate-side solder material does not reach the element-side pads during melting, which is preferable. Therefore, when the substrate-side solder material is fused to the element-side solder bumps, the substrate-side solder material does not reach the element-side pads, so that a brittle intermetallic compound is not formed, as in the above-described claim 5, Cracks are less likely to occur, and breakage of the joint can be effectively prevented.

According to a seventh aspect of the invention, there is provided a method of manufacturing a wiring board, wherein a metal mask having a thickness of 20 to 30 μm and a through hole having a through hole diameter of 100 μm or less is mainly used to form a solder particle having a diameter of 10 μm.
A step of applying a solder paste composed of solder particles and flux of about 20 μm on a board-side pad, a step of melting the applied solder paste by heating, and then cooling to form a board-side solder bump on the board-side pad And

That is, as described above, the height of the board-side solder bumps, that is, the volume of the board-side solder bumps, must be small to prevent the board-side solder material from reaching the element-side pads during fusion. However, in practice, it is not easy to efficiently form such a small substrate-side solder bump.

Therefore, in the present invention, the plate thickness is 20 to 30 μm
By using a metal mask having a through hole having a through hole diameter of 100 μm or less, a small solder bump is applied by applying a solder paste mainly composed of solder particles having a solder particle size of 10 to 20 μm and a flux onto the board side pad. Can be formed efficiently.

That is, if the diameter of the through hole of the metal mask is reduced, a small solder bump on the substrate side can be formed. However, the diameter of the solder particles (15 to 38 μm) conventionally used for forming the solder bump can be obtained. It is too large to print with a metal mask. Therefore, the solder particle size is set to 1
0 to 20 μm, and the thickness of the metal mask is 20 to 20 μm.
By making the thickness as small as 30 μm, it is possible to suitably print even a small through-hole, whereby a small board-side solder bump can be easily formed.

That is, if the solder particle size is 10 μm or more,
The oxide film on the surface of the solder particles is small and the melting property can be ensured. The solder particle size is 20 μm or less, and the thickness of the metal mask is 20 to 3
When the thickness is set to 0 μm, even if the diameter of the through hole of the metal mask is small, it is excellent in plate releasability (printability in which the solder paste passes without clogging the through hole of the metal mask), and a stable amount of solder paste can be filled. is there.

In particular, in the present invention, since the solder paste is filled by the printing method, the work of filling the solder paste for forming a large number of board-side solder bumps can be easily performed at once, and the working efficiency is high. There is an advantage of low cost. Here, a method of calculating a printing volume (volume of solder paste to be filled in an opening such as an opening in a metal mask or an opening in a solder resist) by a solder paste printing method will be described. Incidentally, since a solder resist (for insulation) is usually formed on the surface of the substrate around the pad for the substrate, the case of having the solder resist will be described as an example.

As shown in FIG. 3, when printing the solder paste, a solder resist is formed beforehand around the substrate pads on the wiring board, and a metal mask is arranged on the solder resist. At this time, the metal mask is arranged so that the opening of the solder resist and the through hole of the metal mask communicate in the vertical direction in the figure.

That is, since the solder paste is filled in the opening formed by the opening and the through hole, the volume of the opening is formed by the volume of the solder paste to be filled, and by extension, the solder particles in the solder paste. Determine the volume of the board-side solder bump. That is, since the ratio of the solder in the solder paste is determined, by determining the volume of the opening,
It is possible to set the volume of the board-side solder bumps, and thus the height of the board-side solder bumps determined by the volume.

For example, when the dimensions of each part are set as shown in FIG. 3 and described below, the volume VS of the solder paste to be filled is VS.
Is calculated by the following equation (8). Metal mask through hole diameter; DMMO metal mask thickness; TMM solder resist opening diameter; DSRO solder resist thickness; TSR pad diameter; DP pad thickness; TP VS = π (DSRO / 2) ² × TSR + π (DMMO / 2 ² × TMM−π (DP / 2) ² × TP (8) In the method of manufacturing a wiring board according to the eighth aspect, the peripheral portion of the substrate-side pad is covered with a solder resist, and substantially the center of the substrate-side pad is exposed. Forming an opening to be formed, applying a solder paste to at least the opening using a metal mask, melting the applied solder paste by heating, and then cooling to form a board-side solder bump on the board-side pad. Forming.

The present invention is a method of filling a solder paste by printing using a metal mask in the same manner as in the seventh aspect, except that the periphery of the pad is covered with a solder resist. In other words, in the present invention, the peripheral portion is covered with the solder resist except for the opening at the substantially center of the substrate-side pad.
The board-side solder bump is formed in this opening.

According to the present invention as well, a large number of substrate-side solder bumps can be formed at once with high efficiency and low cost. In the method of manufacturing a wiring board according to the ninth aspect, a step of covering a peripheral portion of the substrate-side pad with a solder resist and forming an opening exposing a substantially central portion of the substrate-side pad, and performing a squeezing process directly on the solder resist. And filling the solder paste into the openings of the solder resist, and heating the filled solder paste to melt the solder, and then cooling to form the board-side solder bumps.

According to the present invention, a metal mask having a through hole corresponding to each substrate-side pad as in the inventions of the seventh and eighth aspects is not required, and the squeezing is performed directly on the solder resist. Therefore, it is not necessary to consider the through-hole diameter and thickness of the metal mask as the one that defines the volume of the solder paste to be filled.

Therefore, in the present invention, it is not necessary to use a metal mask having a precise through-hole diameter, and precise (corresponding to each pad) alignment of the metal mask is not required, so that manufacturing is easy and cost is reduced. can do. In the method for manufacturing a wiring board according to claim 10, the step of filling the solder paste is such that the wiring board having the board-side pads and the solder resist is a recess corresponding to the external dimensions of the wiring board, and the wiring board is fitted therein. Sometimes, the step of fitting into the intaglio having a concave portion with a depth that the height of the surface of the solder resist and the peripheral surface of the concave portion is equal to each other, and performing squeezing while soldering the opening in a state where the wiring board is fitted in the intaglio plate The method includes a step of filling the paste and moving the excess solder paste to the surface around the concave portion of the intaglio, and a step of removing the wiring board from the intaglio.

That is, according to the present invention, the wiring board is fitted into the concave portion of the intaglio, and the height of the surface of the solder resist and the peripheral surface of the concave portion are made uniform. Can be respectively filled into a plurality of openings of the solder resist, that is, the positions where the substrate-side solder bumps are formed.

Therefore, in the present invention, it is not necessary to use a metal mask, so that it is not necessary to manufacture a precise metal mask, and the cost can be reduced. In addition, in order to perform squeezing, it is only necessary to fit the wiring board into the concave portion, and there is an advantage that precise positioning such as positioning of a metal mask is not required.

In the method for manufacturing a wiring board according to the eleventh aspect, the step of filling the solder paste is performed on the solder resist of the wiring board having the board side pads and the solder resist.
A step of placing a metal mask having a plurality of openings in the through-hole in one through-hole, and performing a squeezing process with the metal mask being placed, and soldering the solder paste to the opening of the solder resist. And moving the excess solder paste to the surface around the through-hole of the metal mask, and removing the metal mask.

In other words, according to the present invention, a metal mask having a large through-hole that allows the openings of a plurality of solder resists to be placed on the solder resist, and squeezing is performed, so that the solder paste is applied to the plurality of solder resists. Can be filled in each of the openings.

Therefore, according to the present invention, as in the case of the ninth aspect, it is not necessary to manufacture a metal mask having a through-hole having a precise through-hole diameter, so that the number of manufacturing steps and costs can be reduced. Further, there is an advantage that precise alignment of the metal mask is not required. 13. The method for manufacturing a wiring board according to claim 12, wherein the solder material is detachably fixed to a position corresponding to the substrate-side pad on the surface of the base material made of a material having low wettability to solder. A step of arranging the solder material so as to be close to or in contact with the board-side pad, and in a state where the solder bump forming sheet is arranged, heating the solder material to melt the solder and transfer the solder to the board-side pad And thereafter cooling to form a board-side solder bump on the board-side pad.

The solder bump forming sheet according to the present invention,
Regarding a method of forming a board-side solder bump using a solder-bump-forming sheet, see Japanese Patent Application No. Hei.
No. 25473. That is, in the present invention, the base material used for the solder bump forming sheet is made of a material having low wettability to the solder (that is, a material which is difficult to adhere to the solder by reacting with the solder). After the solder bumps are formed on the board-side pads by melting, the base material can be easily separated from the solder bumps (without the solder bumps adhering to the base material and falling off the board).

Therefore, the solder material on the solder bump forming sheet is arranged in accordance with the position of the board-side pad (for example, by bringing the solder material into contact with or close to the board-side pad),
By heating and melting, a small-volume substrate-side solder bump can be easily formed on the substrate-side pad.

In particular, when a large number of board-side solder bumps are formed in a predetermined pattern on a wiring board, the solder material is arranged on the sheet for forming the solder bumps in accordance with the pattern, so that a single heating and melting process is performed. Accordingly, it is possible to form a large number of substrate-side solder bumps in a pattern.

When a small-volume substrate-side solder bump is to be formed, a small-volume solder material needs to be arranged on the solder-bump-forming sheet. it can. A method in which a solder thin plate is pressure-bonded to the surface of a substrate, and then unnecessary portions are removed by etching or the like.

On the surface of the base material, a pore diameter (for example, 100 μm)
m or less and a solder particle size (for example, 1
A method in which a solder paste containing small solder particles (0 to 30 μm) is used, and a solder material is arranged by a solder paste printing method.

[0065]

Next, an example (embodiment) of an embodiment of the present invention will be described. Here, an integrated circuit chip (hereinafter, referred to as a flip chip), which is a semiconductor element,
An example is a resin laminated board (flip chip mounting wiring board, hereinafter simply referred to as a wiring board) mounted face down. (Embodiment 1) In this embodiment, a wiring board in which a board-side solder bump is formed by a solder paste printing method using a metal mask having a large number of through holes corresponding to individual solder bumps, and a flip chip is mounted on the wiring board The mounted wiring board with flip chip and the method of manufacturing the same will be described.

A) First, the flip chip and the wiring board in this embodiment will be described. As shown in FIG. 4A, the flip chip 1 is a Si LSI element having an outer diameter of 12.5 × 18 mm and a plate thickness of 0.4 mm. On one side, element-side solder bumps 3
Are provided in a predetermined arrangement pattern.

That is, as shown in an enlarged manner in FIG.
A pad diameter (= 2r) 14 is provided on the substrate 2 (downward in the figure).
A large number of pads (element side pads) 4 having a thickness of 0 μm × 1 μm (element side pads) are provided in a predetermined arrangement pattern, and 95 Pb-5Sn of 70 μm height (melting point 314
C) high-temperature solder of approximately hemispherical element-side solder bump 4
Are formed. From the equation (1), the solder volume a of the element-side solder bump 3 is a = (2/3) · πr ³ = 7.2.
× 10 ⁻⁴ mm ³ . The element-side pad 4 is formed by forming a Cu vapor deposition film 4b on a Cr vapor deposition film 4a.

On the other hand, as shown in FIG. 5 (a), the wiring board 6 on which the flip chip 1 is mounted is formed by a method disclosed in Japanese Patent Application No. 8-76960.
No. 2 is the same as that shown in Example 1 of
A large number of substrate-side solder bumps 8 are provided in a predetermined arrangement pattern on one surface (on the joining side) of a plate-shaped base material 5 having a size of 5 × 25 mm and a thickness of about 1 mm.

That is, as shown in an enlarged manner in FIG.
On the base material 7 (upper in the figure), the pad diameter DP = 100 μ
Pad (substrate side pad) 9 with mx thickness TP = 15 µm
Are provided in a predetermined arrangement pattern, and 37Pb-63Sn having a height T = 40 μm is provided on the substrate-side pad 9 thereof.
The substrate-side solder bump 8 is formed by cutting a sphere made of eutectic solder having a melting point of 183 ° C.

The substrate side pad 9 is made of Ni on the surface of Cu.
A solder resist 11 having a thickness TSR = 25 μm is formed around the substrate side pad 9. The solder resist 11 is provided as an insulating layer for preventing the eutectic solder from adhering to other places when the eutectic solder is melted, and surrounds the periphery of the substrate side pad 9 at a predetermined interval. , Diameter DSRO = 200 μm
Opening 12 is provided.

B) Next, a description will be given of a method of forming the board-side solder bumps 8, which is a main part of this embodiment. Note that the chip-side bumps 3 can be formed by the same solder sputtering method or solder plating method as in the related art, and thus will not be described here. The method of forming the board-side solder bumps 8 in this embodiment uses a solder paste using solder particles having a smaller particle size than before, and reduces the through-hole diameter of the metal mask 13 so that the board-side solder bump 8 having a smaller solder volume can be used. The feature is that the solder bumps 8 are formed.

First, as shown in FIG. 6A, the wiring board 6 before the formation of the board-side solder bumps 8 is formed on the surface of a base material 7 which is a resin laminated board having a conductive portion (not shown) inside. , A substrate side pad 9 and a solder resist 11 are provided. The solder resist 11 is formed by a general photolithography technique at a location excluding the substrate-side pad 9 and its periphery. Specifically, a negative-type ultraviolet-curable epoxy dry film is attached to the surface of the base material 7, and the area where the solder resist 11 is to be formed is irradiated with ultraviolet light to cure the dry film. A portion of the dry film is dissolved and removed to form a solder resist 11.

Next, as shown in FIG. 6B, a metal mask 13 is placed on the solder resist 11. At this time, the metal mask 13 is placed on each of the openings 12 of the solder resist 11 such that the through holes 14 of the metal mask 13 are located. The thickness TMM of the metal mask 13 is as thin as 0.03 mm, and the through hole diameter DMMO is set to 0.074 mm, which is considerably smaller than the conventional one, in order to form the board-side solder bump 8 having a low height. . As the metal mask 13, any of an electroformed (additive) mask, a laser drilling mask, and an etching mask can be used.

Here, the dimensions of the substrate-side pad 9, the dimensions of the opening 12 of the solder resist 11, and the dimensions of the metal mask 1
The filling amount of the solder paste defined by the size of the through hole 3 will be described. As already explained in FIG. 3,
Opening 12 of solder resist 11 and metal mask 13
Since the volume VS of the solder paste filled in the opening portion 16 formed by the through hole 14 and the like can be calculated by the above equation (8), the equation (8) is used to calculate the volume of the solder paste. The volume VS of the solder paste is calculated.

VS = π (DSRO / 2) ² × TSR + π (DMMO / 2) ² × TMM-π (DP / 2) ² × TP = π (0.20 / 2) ² × 0.025 + π (0.074 / 2) ² × 0.03 -π (0.14 / 2) ² × 0.015 = 2.18 × 10 ^-4 π = 6.84 × 10 ^-4 [mm ³ ] In other words, this volume VS is obtained. In this manner, the dimensions (plate thickness, diameter) of the through holes 14 of the metal mask 13 are set according to the given dimensions of the openings 12 of the solder resist 11.
If the solder paste having the volume VS is filled, a board-side solder bump 8 having a desired volume and height is obtained as described later.

Next, as shown in FIG. 6C, a solder paste 17 comprising eutectic solder particles 17a having a solder particle diameter of 10 to 20 μm and a flux 17b is used as the solder paste 17, and the metal mask 13 is removed. And squeegee printing is performed. As a result, a predetermined volume V
The solder paste 17 corresponding to S is filled.

Here, the reason why the eutectic solder particles 7a having a considerably smaller particle size than the conventional one is used is to secure the print-out property when the opening diameter of the metal mask 13 is set small.
In the case of the present embodiment, since the solder particle size is small, the surface area per volume is large, and the oxide film on the solder surface is large, so that the melting property (reflow property) is poor. It is better to use a type.

Next, as shown in FIG. 6D, the metal mask 13 is removed. Next, as shown in FIG.
Is filled in a far-infrared ray reflow furnace at a maximum temperature of 210 ° C. to melt the eutectic solder particles 17 a and then cool to form the board-side solder bumps 8.

Next, as shown in FIG. 6F, the flux 17b is removed to complete the wiring board 6 having the board-side solder bumps 8 on the surface. The volume V of the substrate-side solder bump 8 is about 3.4 × 10 ⁻⁴ mm ³ . This is because the ratio of the eutectic solder particles 17a in the solder paste 17 is usually half that of the solder paste 17, so that the volume V of the board-side solder bump 8 is also equal to the volume VS (=
This is because it is half of 6.84 × 10 ⁻⁴ ).

On the other hand, the height T of the board-side solder bump 8 is 4
It was 0 μm. 2 (a) and equations (4) to
(6) As described in the lead-out section of (repeated below), the height T of the solder bump is determined by the volume V of the board-side solder bump 8 and the radius r of the pad (= １ ／ DP). It is.

[0081] ^{L = (r 2 / T +} T) / 2 ... (4) t = (r 2 / T-T) / 2 ... (5) V = π (L 3 × 2/3-L 2 t + t 3/3 (6) Specifically, in the case of the present embodiment, r = 0.07 mm, and T = 0.04 mm, and these are expressed by the above formulas (4) to (4).
Substituting into (6), L = 0.081 t = 0.041 V = 3.414 × 10 ⁻⁴ [mm ³ ], which is the volume V (=
It can be confirmed from the fact that the value substantially matches 3.4 × 10 ⁻⁴ mm ³ ).

That is, according to the above-described method, the board-side solder bump 8 having a smaller solder volume than the conventional one, that is, a board-side solder bump (height) that is 60% or less of the height (70 μm) of the element-side solder bump 3. 8) can be formed. c) Next, a method of bonding the flip chip 1 to the wiring board 6 (having the board-side solder bumps 8) will be described.

First, as shown in FIG. 7A, a flux 18 is applied on the board-side solder bumps 8 of the wiring board 6. Next, as shown in FIG. 7B, the board-side solder bumps 8 and the element-side solder bumps 3 are aligned so as to face each other,
The flip chip 1 is placed on the wiring board 6.

Next, in this state, the wiring board 6 and the flip chip 1 are placed in a far-infrared ray reflow furnace at a maximum temperature of 210 ° C., and only the eutectic solder of the board-side solder bumps 8 is melted. The eutectic solder 8a is fused to the element-side solder bumps 3 as shown in FIG. At this time, the eutectic solder 8a is completely melted, but the element-side solder bumps 3 made of high-temperature solder are not melted. Therefore, the flip chip 1 is kept until the element-side solder bumps 3 come into contact with the upper surfaces of the board-side pads 9. It descends by its own weight. The eutectic solder 8a has a height of 70 μm.
Of the device-side solder bump 3, the volume V
That is, the volume V is not more than half of the volume a = 7.2 × 10 ⁻⁴ mm ³ of the element-side solder bumps, specifically, V = 3.4 × 10 ⁻⁴ mm ^3. Therefore, it does not reach the element side pad 4.

As described above, in the present embodiment, the squeegee printing is performed using the eutectic solder particles 7a having a small particle diameter and the metal mask 13 having a small opening diameter, so that the substrate-side solder bumps 8 having a smaller solder volume than the conventional ones. Can be formed.
The height of the board-side solder bumps 8 is
40% or less of the height of the device-side solder bumps 3 which is the allowable limit for the eutectic solder 8a to reach the device-side pads 4 when the solder is melted.
Since it is μm, the eutectic solder 8 a does not climb up to the element side pad 4 at the time of melting. Therefore, the eutectic solder 8a
Sn in the element and Cu in the element side pad 4 do not react to form a brittle intermetallic compound. Therefore, even if a stress due to a difference in thermal expansion between the flip chip 1 and the wiring board 6 is applied to a joint portion by solder, a crack is hardly generated at the joint portion, the portion is hardly broken, and there is a remarkable effect of high durability.

In this embodiment, since a large number of openings 16 can be filled with the solder paste 17 at a time by squeegee printing, the productivity is excellent, and the quality and cost are also advantageous. <Experimental Example> Next, an experimental example performed to confirm the effect of the present embodiment will be described.

This experimental example is a temperature cycle test for examining the durability at the joint portion of the solder bump. As a sample to be used for the experiment, a flip-chip-attached wiring board manufactured by the same method as in the above-described embodiment was manufactured, and as a comparative example, by a solder paste printing method similar to the related art,
A wiring board with flip chips was manufactured.

The experimental conditions are as follows. The results are shown in Table 1 below. <Experimental Conditions> (1) A flip chip having a device-side solder bump height of 70 μm was used. (2) A total of six wiring boards were manufactured, one each having a board-side solder bump height of 38, 40, and 39 μm, and one wiring board each having a height of 55, 52, and 54 μm.

(3) The flip chip is bonded to the wiring board to form a wiring board with the flip chip, and the bonding state of the solder bumps on the outer peripheral portion is observed, and the height at which the eutectic solder (the board side solder material) rises is enlarged. Measured with a mirror. Here, if it is less than 70 μm, it is not in contact with the element side pad. On the other hand, when the eutectic solder is crawling up to the element side pad, the thickness is 70 μm.

(4) The bonded flip-chip-attached wiring board is put into the MIL STD heat cycle tester Cord B (−55 to 120 ° C.), and the presence or absence of cracks at the solder bump bonding portion on the outer peripheral portion is measured with a magnifying glass. Checked. In (3) and (4), only the solder bumps located on the outer periphery were observed because the bumps located inside cannot be observed, and cracks are most likely to occur on the bumps located on the outer periphery. It is considered that.

Further, so-called underfill (resin injection) is not performed between the flip chip and the wiring board.

[0092]

[Table 1]

As is evident from Table 1, the example of the present invention is excellent in durability, while the example of comparative example has cracks in a small number of cycles and has low durability. This is because the creeping of the eutectic solder generated a brittle intermetallic compound. (Embodiment 2) Next, Embodiment 2 will be described, but the description of the same parts as in Embodiment 1 will be omitted or simplified.

Particularly, the present embodiment is characterized in that the opening diameter of the solder resist is smaller than (or equal to) the pad diameter of the pad on the substrate side. In the wiring board before the formation of the board-side solder bumps in this embodiment, as shown in FIG.
On the substrate 31, a pad diameter of 200 μm × a thickness of 15 μm
m of the substrate side pad 32 and the pad 3 having an opening diameter of 140 μm.
25 having a thickness of 25 μm having an opening 33 exposing the central portion.
(The portion covering the pad 32 has a thickness of 10 μm).

At this time, since the opening diameter of the solder resist 34 is smaller than the pad diameter of the substrate-side pad 32, the inner peripheral edge of the opening 33 of the solder resist 34 is It is arranged to cover the upper part of. Then, at the time of squeegee printing with the solder paste 42, a 30 μm thick metal mask 38 having a through hole 37 with a through hole diameter of 140 μm is placed on the solder resist 34. As a result, on the substrate-side pad 32, a downwardly convex opening portion 39 including the opening portion 33 of the solder resist 34 and the through hole 37 of the metal mask 38 is formed.

Next, squeegee printing was performed in the same manner as in the first embodiment using a solder paste 42 having eutectic solder particles 41 having a solder particle size of 15 to 38 μm, thereby forming the opening 39.
Is filled with solder paste. As the flux 43 in the solder paste 42, R, RA
Any of M and RA types and water-soluble flux can be used. The flux 4 in the solder paste 42
The content of No. 3 is about half.

In the present embodiment, the volume of the opening portion 39 is about 6.2 × 10 ⁻⁴ mm by setting the dimensions described above.
³ since, by subsequent similar heating as in Example 1, a eutectic solder volume of about 3.1 × 10 ^-4 mm ^3, the height 3
A 7 μm board-side solder bump 40 (see FIG. 8B) is formed. This height is 53% of the height of the element-side solder bump (see FIG. 4) described in the first embodiment.

[0098] Actually, a positional deviation between the position of the substrate side pad 32 and the position of the opening 33 of the solder resist 34 can occur (for example, ± 30 µm). The diameter is preferably larger than the diameter of the opening 33 (for example, +60 μm as in this embodiment).

According to the present embodiment, the same operation and effect as those of the first embodiment can be obtained. In the case of the present embodiment, the solder paste is filled only above the pad 32. Since the opening diameter of the metal mask 38 can be increased as compared with the first embodiment to form the solder bumps 40 having a large size, the plate removal property is good.
Therefore, there is an advantage that the particle size of the eutectic solder particles 41 of the solder paste 42 used can be increased. That is, if the particle size of the eutectic solder particles 41 can be increased, the influence of the oxide film on the surface of the eutectic solder particles 41 is reduced, so that the melting property is improved and the cost is also reduced. (Embodiment 3) Next, Embodiment 3 will be described, but the description of the same parts as in Embodiment 2 will be omitted or simplified.

In particular, in this embodiment, the solder paste is printed directly on the solder resist,
It is characterized in that the base material of the wiring board is fitted into the lower jig. As shown in FIG. 9A, in the wiring board before the formation of the board-side solder bumps in this embodiment, a pad diameter 140 μm × thickness 1 was placed on a base material 51 having an outer diameter of 25 × 25 mm and a thickness of 1 mm.
A 5 μm board side pad 52 and a 25 μm thick solder resist 54 having an opening 53 with an opening diameter of 200 μm are provided.

In this embodiment, the solder resist 54 is directly squeezed as described below. First, as shown in FIG. 10A, a substrate 51 having a substrate side pad 52 and a solder resist 54 on its surface is fitted into a concave portion 57 of a lower jig 56. The size of the concave portion 57 is substantially the same as the outer size of the base material 51, and the depth thereof is set at the depth of the solder resist 54 when the base material 51 is fitted.
And the surface of the lower jig 56 are approximately the same height,
It is set to 1 mm.

Next, as shown in FIG.
1 is fitted in the lower jig 56, and the solder particle size is 15 to 3 mm.
Squeezing is performed directly on the surface of the solder resist 54 using a solder paste 58 having eutectic solder particles of 8 μm. As a result, as shown in FIG. 10C, the solder paste 58 is filled in the openings 53 of the solder resist 54.

The squeezing is performed from the upper left surface of the lower jig 56 in the drawing to the upper right surface of the lower jig 56 via the surface of the solder resist 54. This is because the surplus solder paste 58 not filled in the opening 53 is retracted onto the lower jig 56 and is not left on the solder resist 54 or the like.

Thereafter, as shown in FIG. 10D, the base material 51 having the filled solder paste 58 is taken out from the lower jig 56. In the present embodiment, the volume of the opening 39 is about 5.5 × 10 ⁻⁴ mm ³ by setting the dimensions described above.
Thereafter, the substrate-side solder bumps 50 (see FIG. 9B) having the volume of the eutectic solder of about 2.8 × 10 ⁻⁴ mm ³ and the height of 34 μm are formed by the same heating as in the second embodiment.

If there is a pad (alignment mark or the like) on which no solder bump is formed on the surface of the base material 51, a heat-resistant material such as polyimide is placed on the pad on which the solder bump is not formed before squeezing. It is advisable to apply a masking tape and then perform squeezing.

According to this embodiment, the same operation and effect as those of the third embodiment can be obtained. Especially, in the case of this embodiment, squeezing is performed directly without using a metal mask. This has the advantage that the solder volume can be further reduced. (Embodiment 4) Next, Embodiment 4 will be described, but the description of the same parts as in Embodiment 3 will be omitted or simplified.

In particular, in this embodiment, solder paste printing is performed directly on the solder resist, and at this time,
The feature is that a frame-shaped metal mask is used. As shown in FIG. 11A, the wiring board before the formation of the board-side solder bumps in this embodiment has an outer diameter of 25 × 25 mm and a thickness of 1 m.
On a substrate 61 of m, a pad diameter of 140 μm × a thickness of 15 μm
m substrate-side pad 62 and an opening 6 having an opening diameter of 200 μm.
And a solder resist 64 having a thickness of 3 and a thickness of 20 μm.

In this embodiment, squeezing is performed directly on the solder resist 64 as described below. First, as shown in FIG.
4, a frame-shaped metal mask 66 having a thickness of 30 μm is arranged.

The metal mask 66 is a substantially square frame-shaped metal mask 66 having a substantially square through hole 67 as shown in FIG. In other words, the through holes 67 of the metal mask 66 are used for the substrate side solder bumps 60 (FIG. 11C).
) Is formed so that all of the substrate-side pads 62 formed thereon can be seen in the through holes 67. In this embodiment, pads (non-bump forming pads) 68 on which no bumps are formed are arranged at the four corners of the base material 61, so that the pads 68 are covered with the mask 66.
A through hole 67 is formed.

As shown in FIG. 11B, when squeezing is performed using, for example, a rubber spatula, the spatula does not reach the inner edge of the opening 67 of the metal mask 66 and the solder paste remains. It is desirable that the inner edge of the opening 67 of the metal mask 66 be separated from the outer edge of the substrate-side pad 62 by a predetermined distance (about 2 mm in this embodiment). Incidentally, the solder paste remaining in the portion where the spatula does not reach can be easily removed because it becomes a ball shape when melted by heating.

Next, as shown in FIG. 12B, with the metal mask 66 placed on the solder resist 64, a solder paste 69 having eutectic solder particles having a solder particle size of 15 to 35 μm is used. Squeezing is performed directly on the surface of the solder resist 64.

As a result, as shown in FIG.
Solder paste 6 is applied to opening 63 of solder resist 64.
9 are filled. In the through hole 67 of the metal mask 66, the squeegee is deformed and comes into direct contact with the solder resist 64, so that the solder paste does not remain on the solder resist 64 other than the inner edge of the through hole 67.

Thereafter, the metal mask 66 is removed from the solder resist 64 as shown in FIG. In the present embodiment, the volume of the opening 63 of the solder resist 64 (excluding the substrate-side pad 62) is about 5.5 × 10 ⁻⁴ mm ³ by setting the above dimensions. By the same heating as in the fourth embodiment, the substrate-side solder bump 60 having a volume of the eutectic solder of about 2.8 × 10 ⁻⁴ mm ³ and a height of 34 μm is formed. This height is the same as in the first embodiment.
Of the height of the element-side solder bumps (see FIG. 4)
%.

According to the present embodiment, the same operation and effect as those of the fourth embodiment can be obtained. In the present embodiment, in particular, a metal frame having a large number of through holes is not used as in the prior art, but a simple frame shape is used. Since the squeezing is performed directly using the metal mask 66, the operation is extremely easy.

Further, when the metal mask 66 is mounted, there is no need to perform precise alignment such as aligning the positions of the individual substrate-side pads 62 and the individual through holes of the metal mask as in the related art. This also simplifies the work.
Further, when the metal mask 66 is used, since the solder paste 69 is not applied on the non-bump forming pads 68 such as the alignment marks, the masking using the tape described in the third embodiment is not required. is there. (Embodiment 5) Next, Embodiment 5 will be described, but the description of the same parts as in Embodiment 4 will be omitted or simplified.

Particularly, the present embodiment is characterized in that the board-side solder bumps are formed using the solder bump forming sheet. a) First, the solder bump forming sheet will be described.
The solder bump forming sheet used in this embodiment is the same as that described in Japanese Patent Application No. 8-325473 filed previously.

More specifically, as shown in FIG. 14A, the solder bump forming sheet 72 used for forming the substrate-side solder bumps 71 (see FIG. 14B) is made of polytetrafluoroethylene (polytetrafluoroethylene). A eutectic solder (37Pb) is applied to one surface of a heat-resistant sheet substrate 73 made of Teflon (trademark).
-63Sn) to which a large number of disk-shaped solder preforms 74 are fixed.

The dimensions of the sheet base 73 are as follows.
A wiring board 76 having a size of 5 × 18 mm and a thickness of 100 μm and having board-side solder bumps 71 as shown in FIG.
Is the same as the outer diameter of the flip chip 77 to be mounted. On the other hand, each solder preform 74 has a diameter of 100
It is made of a solder foil having a thickness of 30 μm and a thickness of 30 μm, and is arranged at a position corresponding to the position of the board-side solder bump 71 to be formed. That is, the solder bump forming sheet 72 is connected to the wiring board 7.
6 so that the board-side solder bumps 71
Is formed, the arrangement pattern of the solder preform 74 is a pattern symmetrical to the arrangement pattern of the board-side solder bumps 71.

The solder preforms 74 of the above dimensions
Is set to about 2.4 × 10 ⁻⁴ mm ³ in order to secure a volume necessary for forming the substrate-side solder bumps 71. b) To manufacture the above-mentioned solder bump forming sheet 72, a method similar to that described in Japanese Patent Application No. 8-325473 can be adopted. For example, a solder foil having a thickness of 30 μm is pressed on the sheet base 73.

On the solder foil, by applying a photosensitive etching resist and exposing and developing, an etching agent is formed at a portion where the solder preform 74 is to be formed. An unnecessary portion is removed by etching the solder foil to form a solder preform 74.

The etching resist is removed. By the above steps, on the Teflon sheet base 73,
The solder bump forming sheet 72 in which the solder preform 74 of eutectic solder is crimped in a predetermined arrangement pattern is manufactured.

As for the solder bump forming sheet 72 and the method of manufacturing the same, various members described in the above-mentioned Japanese Patent Application No. 8-325473 and the method of manufacturing the same can be employed in addition to the contents described above. c) Next, a method of forming the board-side solder bumps 71 using the solder bump forming sheet 72 will be described.

First, as shown in FIG. 15A, the solder bump forming sheet 72 is connected to the solder preform 74 on the sheet base 73 by the wiring board 76 side (that is, the board side pad 78).
Side). At this time, the substrate side pad 7
A flux (not shown) is applied so as to cover 8.

Then, as shown in FIG. 15B, the positions of the solder preforms 74 and the positions of the board pads 78 are aligned so that the solder bump forming sheet 72 and the wiring board are aligned. 76 and overlap. In particular, in this embodiment, since the planar size of the sheet base 73 is the same as that of the flip chip 77, the position of the solder bump forming sheet 72 is determined using a well-known chip mounter used for mounting the flip chip 77. Matching can be performed.

Next, in a state where the solder bump forming sheet 72 and the wiring board 76 are overlapped, the sheet is passed through a far-infrared solder reflow furnace (not shown) to remove the solder preform 74 for about 21 minutes.
Melt by heating at 0 ° C. As a result, as shown in FIG. 15C, the molten solder falls from the sheet base 73 having low solder wettability and is transferred onto the board-side pad 78 having high solder wettability.

Thereafter, as shown in FIG. 15D, after cooling to complete the board-side solder bumps 71, the sheet base 73 is peeled off, and finally the flux is removed with a solvent. Since the board-side solder bumps 71 formed in this manner are solidified after the solder preform 74 is melted,
Its volume remains unchanged at about 2.4 × 10 ⁻⁴ mm ³ , but its height is about 30 μm. This height is the same as in the first embodiment.
43 of the height of the element-side solder bump (see FIG. 4) described in
%.

According to this embodiment, the same operation and effect as those of the fourth embodiment can be obtained, and the board-side solder bumps 71 are formed by using the solder preform 74 formed by etching instead of using the solder paste. In addition, the board-side solder bump 71 having a small solder volume can be easily formed.

Further, since the etching resist used in the etching is formed by exposure and development, there is an advantage that the diameter and the solder volume of the solder preform 74 can be set precisely. It should be noted that the present invention is not limited to the above-described embodiment at all, and it goes without saying that the present invention can be implemented in various modes without departing from the gist of the present invention.

(1) For example, by combining the first embodiment and the second embodiment, that is, a method of reducing the solder particle diameter of the solder paste and the opening diameter of the metal mask, and a method of opening the solder resist By combining a method of making the diameter equal to or smaller than the pad diameter, a board-side solder bump having a smaller solder volume can be formed.

(2) Further, by combining the second embodiment with the third embodiment (or the fourth embodiment), that is, a technique for making the opening diameter of the solder resist equal to or smaller than the pad diameter, By combining with a method of squeezing the solder paste directly on the solder resist instead of the above (or using a frame-shaped metal mask), it is possible to form a board-side solder bump having a smaller solder volume.

[0131]

As described in detail above, according to the first aspect of the present invention, since the board-side solder material is separated from the element-side pads, Cu and Sn contained in the element-side pads are separated. Does not form brittle intermetallic compounds. Therefore, even if stress is applied to the joint due to a difference in thermal expansion between the semiconductor element and the wiring board, cracks are less likely to occur, and breakage of the joint can be effectively prevented for a long period of time.

In the second aspect of the present invention, since the melting temperature of the element-side solder material is set higher than the melting temperature of the substrate-side solder material, only the substrate-side solder material is melted. The semiconductor element can be joined to the wiring board by fusing the substrate-side solder material to the element-side solder bumps.

According to the third aspect of the present invention, the height of the board-side solder bumps is set to a height at which the board-side solder material is separated from the element-side pads during the fusion. Therefore, the substrate-side solder material does not reach the element-side pad during fusion, so that a brittle intermetallic compound is not formed due to the reaction between Cu and Sn. Therefore, even if stress is applied to the joint, cracks are unlikely to occur, and breakage of the joint can be effectively prevented for a long period of time.

According to the fourth aspect of the present invention, the height of the board-side solder bump is set to a height at which the board-side solder material constituting the board-side solder bump is separated from the element-side pad during the fusion. Have been. Therefore, even if Sn, which easily forms an intermetallic compound, is used for the solder material on the substrate side, a brittle intermetallic compound is not generated between the component of the element side pad and cracks are generated even if stress is applied to the joint. And it is possible to effectively prevent the joint from being broken for a long period of time.

In the wiring board according to the fifth aspect of the present invention, the height of the board-side solder bump is 60% or less of the height of the element-side solder bump. Therefore, at the time of fusion, the substrate-side solder material does not reach the element-side pad, so that a brittle intermetallic compound is not formed, and therefore, cracks are unlikely to occur, and the joint can be effectively prevented from being broken.

According to the wiring board of the present invention, the height of the board-side solder bump is 10 to 40 μm. for that reason,
Generally, the substrate-side solder material does not reach the element-side pad during fusion with an element-side solder bump having a height of 70 μm or more, so that a brittle intermetallic compound is not formed, , Cracks are less likely to occur, and breakage of the joint can be effectively prevented.

According to a seventh aspect of the present invention, there is provided a method for manufacturing a wiring board, wherein a metal mask having a thickness of 20 to 30 μm and a through hole having a through hole diameter of 100 μm or less is used, and a solder particle size of 10 μm or less is mainly used.
A small board-side solder bump can be efficiently formed by applying a solder paste made of solder particles and flux of about 20 μm on a board-side pad.

In particular, in the present invention, since the solder paste printing method can be adopted, the work of filling the solder paste for forming a large number of solder bumps on the substrate side can be easily performed at a time, and the work efficiency is high and low. There is an advantage that it is cost. In the method of manufacturing a wiring board according to the eighth aspect, since the peripheral portion of the substrate-side pad is covered with the solder resist and the opening is formed so that the substantially central portion of the substrate-side pad is exposed, the diameter and thickness of the opening are set. Thus, many substrate-side solder bumps can be formed at once with high efficiency and low cost, similarly to the seventh aspect.

According to the ninth aspect of the present invention, since the squeezing is performed directly, the solder paste can be easily filled. That is, since an expensive metal mask having a precise through-hole diameter is not used, manufacturing is easy and the cost can be reduced.

In the method of manufacturing a wiring board according to claim 10, the wiring board is fitted into the concave portion of the intaglio, the height of the surface of the solder resist and the peripheral surface of the concave portion are aligned, and squeezing is performed in this state. Eliminates the need for metal masks. Therefore, it is not necessary to manufacture a precise metal mask, and the cost can be reduced. In addition, in order to perform squeezing, it is only necessary to fit the wiring board into the concave portion, and there is an advantage that precise positioning such as positioning of a metal mask is not required.

In the method for manufacturing a wiring board according to the eleventh aspect, a metal mask having a large through-hole that allows a plurality of openings in the solder resist is placed on the solder resist.
Perform squeezing. Therefore, as in the case of the ninth aspect, it is not necessary to use an expensive metal mask having a through hole having a precise through hole diameter, so that it is easy to manufacture and the cost can be reduced. Further, there is an advantage that precise alignment of the metal mask is not required.

In the method of manufacturing a wiring board according to the twelfth aspect, since the board-side solder bumps are formed using the solder-bump-forming sheet, a small-volume board-side solder bump can be easily formed on the board-side pads. it can. In particular, when a large number of board-side solder bumps are formed in a predetermined pattern on a wiring board, the solder material is arranged in accordance with the pattern on the solder bump forming sheet, so that the pattern is heated and melted once. A large number of substrate-side solder bumps can be formed in a shape.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing a method of setting the height of a board-side solder bump.

FIG. 2 is an explanatory diagram showing a relationship between dimensions of each part of a board-side solder bump.

FIG. 3 is an explanatory diagram showing a method for setting a volume of a solder paste to be filled.

FIG. 4 shows a flip chip according to the first embodiment;
(A) is a plan view thereof, and (b) is an enlarged sectional view showing the vicinity of an element-side solder bump.

5A and 5B show a wiring board according to the first embodiment, in which FIG. 5A is a plan view of the wiring board, and FIG. 5B is an enlarged sectional view showing the vicinity of a substrate-side solder bump;

FIG. 6 is an explanatory diagram illustrating a method of forming a board-side solder bump according to the first embodiment; FIG.

FIG. 7 is an explanatory diagram illustrating a method of bonding the flip chip and the wiring board according to the first embodiment;

8A is an explanatory view showing a method of forming a board-side solder bump, and FIG. 8B is an enlarged cross-sectional view showing the vicinity of the board-side solder bump according to the second embodiment.

FIGS. 9A and 9B are explanatory diagrams illustrating a method of forming a substrate-side solder bump, and FIG. 9B is an enlarged cross-sectional view illustrating the vicinity of the substrate-side solder bump;

FIG. 10 is an explanatory diagram showing a procedure for forming a board-side solder bump according to the third embodiment together with a lower jig.

11A and 11B are cross-sectional views illustrating a wiring board before formation of a board-side solder bump, FIG. 11B is an explanatory view illustrating a main part at the time of squeezing, and FIG. It is sectional drawing which expands and shows the solder bump vicinity.

FIG. 12 is an explanatory diagram showing a procedure for forming a board-side solder bump according to the fourth embodiment together with a metal mask.

FIG. 13 is an explanatory diagram illustrating a metal mask and the like used for forming a board-side solder bump according to the fourth embodiment.

14A is a perspective view illustrating a solder bump forming sheet used for forming a board-side solder bump according to Example 5, and FIG. 14B is an explanatory view illustrating a wiring board and a flip chip.

FIG. 15 is an explanatory diagram illustrating a method of forming a board-side solder bump according to a fifth embodiment;

FIG. 16 is an explanatory diagram showing a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Flip chip (integrated circuit chip, semiconductor element) 2, 7, 31, 51, 61 ... Base material 3 ... Element side solder bump 4 ... Element side pad 6, 76 ... Wiring board (flip chip mounting wiring board) 8 , 40, 50, 60, 71 ... board-side solder bumps 9, 32, 52, 62, 78 ... board-side pads 11, 34, 54, 64 ... solder resist 12, 33, 53, 63 ... openings 13, 38, 66 ... metal masks 14, 37, 67 ... through holes 17, 39, 42, 58, 69 ... solder paste 17a, 41 ... eutectic solder particles 17b ... flux 72 ... solder bump forming sheet 74 ... solder preform 56 ... bottom jig

Claims (12)

[Claims] 1. A semiconductor element having an element-side solder bump made of an element-side solder material not containing Sn or containing at most 20 wt% or less on an element-side pad containing Cu, and having a melting point higher than that of the element-side solder bump. Low and 20wt%
By bonding the board-side solder bumps made of the board-side solder material containing Sn and the board-side solder bumps to the element-side solder bumps, a semiconductor is formed by joining the semiconductor element and the wiring board. A wiring board with a semiconductor element, wherein the board-side solder material is separated from the element-side pad. 2. The device-side solder material is composed of high-temperature solder containing Pb as a main component, and the substrate-side solder material is composed of Pb-
The wiring board with a semiconductor element according to claim 1, wherein the wiring board is made of Sn eutectic solder. 3. The wiring board used for the wiring board with a semiconductor element according to claim 1 or 2, wherein the height of the board-side solder bump is such that the board-side solder bump is fused to the element-side solder bump. A wiring board, wherein the board-side solder material is set at a height separated from the element-side pad when the wiring board is attached. 4. A semiconductor device having a board-side solder bump made of a board-side solder material containing 20 wt% or more of Sn, and a semiconductor element having an element-side solder bump on an element-side pad; A wiring board for bonding by fusing solder bumps, wherein the height of the board-side solder bumps is such that the board-side solder material is separated from the element-side pads when the board is soldered. A wiring board, wherein the wiring board is set to: 5. The wiring board according to claim 3, wherein a height of the board-side solder bump is 60% or less of a height of the element-side solder bump. 6. The solder bump according to claim 3, wherein the height of the substrate-side solder bump is 10 to 40 μm.
6. The wiring board according to any one of 5. 7. The method for manufacturing a wiring board according to claim 3, wherein the solder is mainly formed by using a metal mask having a plate thickness of 20 to 30 μm and a through hole having a through hole diameter of 100 μm or less. Particle size 10
A step of applying a solder paste composed of 20 μm solder particles and a flux onto the board-side pad, melting the applied solder paste by heating, and then cooling to form the board-side solder bump on the board-side pad A method for manufacturing a wiring board, comprising: 8. The method for manufacturing a wiring board according to claim 3, wherein a peripheral portion of the substrate-side pad is covered with a solder resist, and a substantially central portion of the substrate-side pad is exposed. Forming a portion, applying a solder paste to at least the opening using a metal mask, melting the applied solder paste by heating, and then cooling the solder paste to cool the substrate-side solder on the substrate-side pad. A method for manufacturing a wiring board, comprising: forming a bump. 9. The method for manufacturing a wiring board according to claim 3, wherein a peripheral portion of the substrate-side pad is covered with a solder resist, and a substantially central portion of the substrate-side pad is exposed. Forming a portion, and directly squeezing on the solder resist, filling the opening of the solder resist with a solder paste, heating the filled solder paste to melt the solder,
And thereafter cooling to form the board-side solder bumps. 10. A step of filling the solder paste, wherein the step of filling the wiring board having the board-side pads and the solder resist into a recess corresponding to the external dimensions of the wiring board is performed. A step of fitting the solder resist into the intaglio having a recess having a depth equal to the height of the surface of the solder resist and the peripheral surface of the recess, and performing the squeezing while the wiring board is fitted in the intaglio. 10. The wiring according to claim 9, further comprising: a step of filling the opening with a solder paste and moving excess solder paste to a surface around the concave portion of the intaglio; and a step of removing a wiring board from the intaglio. Substrate manufacturing method. 11. The step of filling the solder paste includes: viewing a plurality of openings of the solder resist in one through hole on the solder resist of the wiring board having the board-side pads and the solder resist. A step of mounting a metal mask having a through hole, and, in a state where the metal mask is arranged, performing the squeezing to fill an opening of the solder resist with a solder paste, and passing an excess solder paste through the through hole of the metal mask. The method according to claim 9, further comprising: moving the metal mask to a peripheral surface; and removing the metal mask. 12. The method of manufacturing a wiring board according to claim 3, wherein the substrate surface is formed of a material having low wettability with respect to solder at a position corresponding to the pad on the substrate side. A step of arranging a solder bump forming sheet having a solder material separably fixed thereto, such that the solder material approaches or comes into contact with the substrate-side pad, and in a state where the solder bump forming sheet is arranged, Heating the solder material to melt the solder, transferring the solder to the board-side pads, and then cooling to form the board-side solder bumps on the board-side pads. Manufacturing method of wiring board.