JPH10198625A - Address translating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control the apparent address of circuit block having the same address on a single bus line by performing the setting of address translating circuit. SOLUTION: An address translating circuit 3 is inserted on the line of bus line 2 for control while dividing slave circuit blocks 1 to 3 and 4 to 5. The address translating circuit 3 sets the number of bits to be increased/decreased for translating the address of slave circuit block connected through this address translating circuit 3 by the external circuit of address setting input detection circuit 6. Corresponding to this setting, an address translating block 5 translates the address bits of all control data transmitted from a data transmission circuit 1 for control to the bus line 2. Thus, the address values of slave circuits 4 to 5 seem to be apparently translated to PA=4 and 5 when they are watched from the data transmission circuit 1 for control.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an address conversion device in an electronic device having a control data communication bus line.

[0002]

2. Description of the Related Art Conventionally, in a control data communication bus line system, a plurality of circuit blocks serving as a certain slave circuit are used or a system different from a circuit configuration originally assumed by the circuit block is used. In some cases, addresses used on the same bus line may overlap.

In such a case, duplication of addresses has been avoided by making settings for changing addresses in the slave circuit.

[0004]

If the slave circuit is not provided with a setting change function for avoiding duplication of addresses,
The bus line itself needs to be double-tracked, which complicates the system and increases the space on the printed circuit board.

[0005] In order to solve the above conventional problems, the present invention provides:
To control multiple slave circuit blocks that have only the same address on the same bus line, it is possible to control all addresses except one or one of the overlapping circuit blocks as apparently different addresses It is an object of the present invention to configure a control data communication bus line system.

[0006]

SUMMARY OF THE INVENTION In order to solve this problem, the present invention provides an address conversion circuit on a control data communication bus line so that the control data communication bus line can be viewed from the control data transmission circuit. Since the addresses of the slave circuits in the above do not seem to overlap, it is possible to control all the slave circuit blocks with a single bus line system.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The first aspect of the present invention is to replace address data of control data for a specific circuit block connected to a control data communication bus line with an arbitrary address value. It is a feature of the address translation device, and is controlled on the same bus line even in the case of a system having circuit blocks with the same slave address or a system configuration with the same circuit configuration and multiple configurations themselves. It becomes possible to do.

According to the second aspect of the present invention, since the address conversion circuit according to the present invention automatically retransmits data by incorporating a storage device, the processing in the control data transmission circuit is simplified. It has the effect that it becomes possible to make

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An address translation device according to an embodiment of the present invention will be described below with reference to the drawings.

(Embodiment) FIG. 1 is a block diagram of an address translator according to one embodiment of the present invention, and FIG. 2 is a block diagram of an address translator according to another embodiment of the present invention. 1 and 2, the same components are denoted by the same reference numerals, and detailed description is omitted.

As shown in FIG. 1, a control data transmission circuit 1, a slave circuit block 1 (RA = 1), a slave circuit block 2 (RA = 2), and a slave circuit block 3
A slave circuit block having different address values such as (RA = 3) and a slave circuit block 4 (RA = 3) having an address value overlapping with these address values
1) In a control system in which a slave circuit block 5 (RA = 2) is connected via a control bus line 2, the address conversion circuit 3 of the present invention includes the slave circuit block 5 on the control bus line 2. Circuit block 1
3 and 4 to 5 are inserted in a divided manner.

In the address conversion circuit 3, how many bits should be increased or decreased with respect to the address of the slave circuit block connected via this address conversion circuit by an external circuit of the address setting input detection circuit 6 to perform the address conversion. Is set.

In accordance with this setting, the address conversion block 5 converts the address bits of all the control data transmitted from the control data transmission circuit 1 to the bus line 2.

Thus, the address values of the slave circuit blocks 4 to 5 are apparently PA = 4, 5 when viewed from the control data transmitting circuit 1 on the bus line 2.
Thus, each slave circuit block can be independently controlled on the same bus line.

Further, since address conversion is performed on all control data, slaves having overlapping address values can be obtained by changing only the address values without changing the format of the control data transmitted from the control data transmission circuit 1. The circuit block can be controlled by a single bus line.

FIG. 2 shows a data storage circuit 7 incorporated in the address conversion circuit 3 of FIG. 1 to temporarily store data once transmitted from the control data transmission circuit 1 and automatically resend the data for control. The data transmission circuit 1 can reduce the retransmission work processing of the same data and increase the transmission efficiency of the bus line.

[0017]

As described above, according to the present invention, the apparent address of the circuit block having the same address is
The setting of the address conversion circuit of the present invention has an effect that control can be performed on a single bus line.

[Brief description of the drawings]

FIG. 1 is a block diagram of an address conversion circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram of an address conversion circuit according to another embodiment of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Control data transmission circuit 2 Control bus line 3 Address conversion circuit 4 Data transmission / reception circuit 5 Address conversion block 6 Address setting input detection circuit 7 Data storage circuit

Claims (3)

[Claims] 1. An address translation device, wherein control address data of a specific circuit block connected to a control bus line is replaced with an arbitrary address value. 2. An address conversion device, wherein control address data of several circuit blocks connected to a control bus line are replaced with arbitrary address values. 3. A built-in storage device for storing transmission data from a control data transmission circuit, and automatically retransmitting data at regular intervals even if no data is transmitted from the transmission circuit. 3. The address translation device according to claim 2, wherein: