JPH10164041A - Communication equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication equipment for reducing a using memory without the need of a memory controller. SOLUTION: The reproducing data of a CD reproducing circuit 3 are outputted to a data generation means 4 and transmission packet data are outputted to a superimposing circuit 5. The superimposing circuit 5 superimposes the transmission packet data and the fundamental frequency components of sampling clocks and outputs them to a communication channel 12. A filter a6 for reception reproduces the fundamental frequency components of the sampling clocks, outputs them to a PLL circuit 8, multiplies the fundamental frequency components of the sampling clocks and outputs them to a D/A converter 10 as D/A clocks. The filter b7 for the reception eliminates the fundamental frequency components of the sampling clocks, performs output to a packet reception means 9, reproduces the transmission packet data and outputs them to a data restoration means and a data restoration and output means 11 restores the transmission packet data to digital data and outputs them to the D/A converter 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication apparatus for reproducing digital data via a communication line.

[0002]

2. Description of the Related Art Conventionally, as a digital data reproducing method via a communication line, for example, a method described in Japanese Patent Application Laid-Open No. Hei 6-2612 is known. FIG. 3 shows the configuration of such a conventional CD clock transmission line circuit. Sender device
(A) is provided with a CD reproducing circuit 31, a communication controller 32, and a controller 33, while a receiving side device (B) is provided with a communication controller 34, a memory 35, a memory controller 36, and a D / A converter. 37, a controller 38 was provided, and the two devices (A) and (B) were connected by a communication line 39. Such a configuration is effective for its basic role. However, the CD reproducing circuit 3 of the transmitting device (A)
1 sampling clock and the D / A converter 37 of the receiving side device (B).
Since the D / A clock is asynchronous, a connection operation of digital audio data is required.

[0003]

As described above, in the conventional digital audio reproduction via a communication line, the sampling clock of the CD reproduction circuit of the transmitting apparatus and the D / A converter of the D / A converter of the receiving apparatus are used. Since the A clock is asynchronous and the connection operation of digital audio data must be performed, the receiving side device (B) requires a memory 35 of about 4 Mbits and a memory controller 36, which is expensive and complicated. Had a problem.

An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a communication device which uses less memory and does not require a memory controller.

[0005]

In order to achieve the above object, the present invention provides, as a first solution, a transmitting apparatus which superimposes a fundamental frequency of a sampling clock on a communication line, transmits the signal, and Since the side device passes the filter and outputs a D / A clock obtained by multiplying the sampling clock by the PLL circuit to the D / A converter, it is not necessary to transmit the D / A clock through the communication line. Reduces unnecessary radiation noise generated when transmitting the D / A clock, eliminates the need for a multi-stage filter for removing unnecessary radiation noise, and reduces the required memory to about the size of the transmission / reception buffer according to the transmission form of the communication line. can do.

In the second solution, the transmitting device transmits the sampling clock and the digital data through separate lines, and the transmitting device converts the D / A clock obtained by multiplying the sampling clock by a PLL circuit into a D / A clock. Since the D / A clock does not need to be transmitted from the transmission side device by the feature of outputting to the A converter, unnecessary radiation noise generated when transmitting the D / A clock is reduced and unnecessary radiation noise is removed. This eliminates the need for a multi-stage filter, and reduces the required memory to the extent of a transmission / reception buffer according to the transmission mode of the communication line.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention enables a transmission-side apparatus to transmit a fundamental frequency component of a sampling clock of digital data via a communication line.
The receiving device has a function of generating a D / A clock of the D / A converter by passing the signal through a filter that passes a fundamental frequency component of the sampling clock and multiplying the sampling clock.

[0008] In each of the embodiments of the present invention, C
This will be described with reference to FIGS. 1 and 2 by taking D digital audio data as an example.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a communication apparatus according to this embodiment of the present invention. In FIG. 1, the transmitting device (A) includes a sampling clock output unit 1, a transmitting filter 2, a CD reproducing circuit 3, a packet data generating unit 4, and a superimposing circuit 5, and the receiving device (B) receives a signal. Filter a6, receiving filter b7,
PLL circuit 8, packet receiving means 9, D / A converter 10,
It has digital data restoration means 11.

[0010] The operation of the communication apparatus configured as described above will be described. First, the sampling clock output means 1 of the transmitting side device (A) outputs a sampling clock (44.1 kHz in the case of standard speed) of CD digital audio data to the transmission filter 2 and the CD reproduction circuit 3, and the transmission filter 2 outputs the fundamental frequency component of the sampling clock to the superimposing circuit 5 and outputs the CD
The reproducing circuit 3 outputs the CD digital audio data to the packet data generating means 4 according to the sampling clock from the sampling clock output means 1, and the packet data generating means 4 divides the CD digital audio data into predetermined transmission packet data and transmits it. The packet data is output to the superimposing circuit 5, and the superimposing circuit 5 superimposes the transmission packet data and the fundamental frequency component of the sampling clock and outputs the superimposed signal to the communication line 12.

On the other hand, the receiving filter a of the receiving device (B)
6 reproduces the fundamental frequency component of the sampling clock,
The PLL circuit 8 multiplies the fundamental frequency component of the sampling clock by a D / A clock (16.
9244 MHz) to the D / A converter 10. The receiving filter b7 removes the fundamental frequency component of the sampling clock and outputs it to the packet receiving means 9, and
Reproduces the transmission packet data and outputs it to the digital data restoration means 11, and the digital data restoration output means 11 restores the transmission packet data to CD digital audio data and outputs it to the D / A converter 10. The D / A converter 10 has a D / A
The CD digital audio data is converted into an analog signal in synchronization with the A clock.

As described above, according to the present embodiment, the transmission-side device superimposes the fundamental frequency of the sampling clock on the communication line 12 and transmits it.
Since the D / A clock obtained by multiplying the sampling clock by the PLL circuit is output to the D / A converter, the D / A clock does not need to be transmitted through the communication line, and thus is generated when the D / A clock is transmitted. This reduces unnecessary radiation noise and eliminates the need for a multi-stage filter for removing unnecessary radiation noise, thereby reducing the required memory to about the size of a transmission and reception buffer according to the transmission form of the communication line.

(Embodiment 2) FIG. 2 shows Embodiment 2 of the present invention.
FIG. 2 is a block diagram showing a configuration of a communication device in FIG. FIG.
In the transmitting device (A), a sampling clock output means 21, a CD reproducing circuit 22, and a packet data generating means 23 are provided. On the receiving device (B), a clock receiving means 25, a packet receiving means 26, and a PLL are provided. It has a circuit 27, digital data restoring means 28, and a D / A converter 29, and is connected by a clock line 24 and a communication line 20 between both transmitting and receiving devices.

The operation of the communication device configured as described above will be described. First, the sampling clock means 21 of the transmitting device (A)
Is the sampling clock for CD digital audio data
(44.1 kHz for standard speed) is output to the clock line 24. The packet data generating means 23 divides the CD digital audio data into predetermined transmission packet data and transmits it.

On the other hand, the clock receiving means 2 of the receiving device (B)
5 receives the sampling clock from the clock line 24 and
The signal is output to the L circuit 27, and the PLL circuit 27 multiplies the sampling clock and outputs it to the D / A converter 29 as a D / A clock (16.9244 MHz in the case of a standard speed). The packet receiving means 26
Reproduces the transmission packet data from the communication line 20 and outputs it to the digital data restoration means 28. The digital data restoration means 28 restores the transmission packet data to CD digital audio data and outputs it to the D / A converter 29. D / A
The converter 29 converts the CD digital audio data into an analog signal in synchronization with the D / A clock.

As described above, according to the present embodiment, the sampling clock and the digital data are transmitted through the separate lines 24 and 20, and the D / A clock obtained by multiplying the sampling clock by the PLL circuit is converted into the D / A converter. , The transmission side device does not need to transmit the D / A clock, so that unnecessary radiation noise generated when transmitting the D / A clock is reduced,
A multi-stage filter for removing unnecessary radiation noise is not required, and the required memory can be reduced to the extent of a transmission / reception buffer according to the transmission form of the communication line.

[0017]

As described above, the present invention transmits a sampling clock of digital data from a transmitting device,
In the receiving side apparatus, a D / A clock obtained by multiplying a sampling clock of digital data by a PLL circuit is used as D / A clock.
By outputting the signal to the A converter, it is possible to obtain an effect that unnecessary radiation noise and memory can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a communication device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a communication device according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a conventional CD clock transmission circuit.

[Explanation of symbols]

1, 21: sampling clock output means, 2: transmission filter, 3, 22: CD reproduction circuit, 4, 23: packet data generation means, 5: superimposition circuit, 6: reception filter a, 7: reception filter b, 8,27 ... PLL circuit,
9: packet receiving means, 10, 29 ... D / A converter,
11, 28: Digital data recovery means, 12, 20, Communication line, 24: Clock line, 25: Clock receiving means,
26 ... Packet receiving means.

Claims (2)

[Claims] 1. A communication device for multiplexing transmission of digital data from a transmitting device to a receiving device via a communication line, the transmitting device comprising: sampling clock output means for generating a sampling clock for digital data; A transmission filter connected to the sampling clock output means for extracting a fundamental frequency component of the sampling clock; a packet data generation means for dividing the digital data into predetermined transmission packet data; and an output of the transmission filter. And a superimposing means for superimposing an output of the packet data generating means and outputting the superimposed output to the communication line. The receiving device is connected to the communication line and reproduces a fundamental frequency component of the sampling clock. Receiving filter a,
Packet receiving means for reproducing the transmission packet data from the output of the reception filter b for removing the fundamental frequency component of the sampling clock; digital data restoration means for restoring digital data from the transmission packet data; D / A connected to the means
A communication device comprising: a converter; and a PLL circuit that multiplies a sampling clock obtained from an output of the reception filter a and outputs a D / A clock to the D / A converter. 2. A communication apparatus for multiplexing transmission of digital data from a transmitting apparatus to a receiving apparatus via a communication line, wherein the transmitting apparatus includes a sampling clock output means for generating a sampling clock for digital data. A clock receiving unit connected to the sampling clock output unit and connected to a clock line for transmitting the sampling clock to reproduce the sampling clock; and A packet receiving unit connected to a line for reproducing the transmission packet data; a digital data restoration unit for restoring the digital data from the transmission packet data; a D / A converter connected to the digital data restoration unit; The sampling clock obtained from the output of the clock receiving means is multiplied by
A communication device comprising: a PLL circuit that outputs a D / A clock to an A converter.