JPH10145243A - Error propagation limiting method of viterbi decoder and device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To quickly obtain a correct decoded result after defect end by providing a defect detector and preliminarily checking the existence of a defect regarding a reproduction signal itself that is inputted to a Viterbi decoder. SOLUTION: When a reproduction RF signal, that is a digital modulation signal is added to a signal input terminal IN from an optical disk, etc., a defect- detecting part A of a defect detector DRD performs a level decision of an RF signal and generates a signal, when the level of the RF signal is a prescribed value or less. A defect length deciding part B generates a defect detecting signal DD, when a low-level period when a signal of the part A continues for more than a deciding signal td that has been arbitrarily set is measured. The signal DD is added to a reset circuit D of a Viterbi decoder BTD, a reset signal is generated, these signals are added to a branch metric arithmetic unit E, and an addition and comparison arithmetic unit F and their states are reset.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for limiting the propagation of errors in a Viterbi decoder for decoding a digitally modulated signal.

The present invention relates to a digital recording / reproducing apparatus using a Viterbi decoder as a decoder for decoding a digitally modulated signal of a reproduced signal from an optical disk or the like. In this case, if the difference period is longer than a certain length, the branch metric operation unit and the addition / comparison operation unit of the decoding circuit of the Viterbi decoder are reset, and the error due to the defect is transmitted to the decoding result. In this way, errors during reproduction are reduced by limiting the operation.

[0003]

2. Description of the Related Art A Viterbi decoder is used as a decoder for decoding a digital modulation signal which is a reproduction signal of a digital VTR, an optical disk or the like. The Viterbi decoder has a complicated arithmetic circuit inside to perform arithmetic processing based on the Viterbi algorithm on the reproduced signal.

Conventionally, various methods have been proposed for processing an error signal in a Viterbi decoder. However, since these methods are designed to perform the processing in an arithmetic circuit of the Viterbi decoder, the signal processing is performed. The error signal processing was not completed until a certain processing was completed for. For this reason, the conventional Viterbi decoder normally performs an arithmetic process by treating this error signal as correct reproduction data even when a burst error occurs due to a disk defect or the like. , The erroneous reproduced signal is decoded as it is even when the signal has dropped for a long time. For this reason, even if the defect section is completed, an error for the propagation is propagated, and a correct decoding result cannot be obtained until a while.

[0005]

According to the present invention, there is provided a digital recording / reproducing apparatus for decoding a reproduced signal using a Viterbi decoder, comprising a defect detector for detecting a defect of the reproduced signal input to the Viterbi decoder. An error signal can be promptly processed by checking in advance the presence or absence of a defect in the reproduction signal itself input to the Viterbi decoder.

According to the present invention, when the period of the defect detected by the defect detector is equal to or longer than a certain length, the branch metric operation unit and the addition / comparison operation unit of the Viterbi decoder are reset to generate a defect. The above problem is solved by realizing an error propagation limiting method of a Viterbi decoder which limits propagation of an error at the time and a device which implements the method.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a block diagram showing a configuration of an apparatus for implementing an error propagation limiting method of a Viterbi decoder according to the present invention. In FIG. 1, IN is a signal input terminal to which a digital modulation signal of a reproduced RF signal from an optical disk or the like is input. DFD is a defect detector.

The defect detector DFD comprises a defect detecting section A and a defect length judging section B which measures the length of the defect and generates a signal when the length of the defect becomes a predetermined value or more. DD is a defect detection signal. BTD is a Viterbi decoder, and C is an input interface of the Viterbi decoder. Viterbi decoder BT
D includes a reset circuit D, a branch metric calculator E, an addition / comparison calculator F, and a path memory G. OUT is an output terminal of the decoded signal.

The signal input terminal IN is a defect detector D
It is connected to the FD and the input interface C. The output terminal of the defect detector DFD is a Viterbi decoder BT
D is connected to the reset circuit D. Viterbi decoder B
The output of the reset circuit D of the TD is connected to a branch metric calculator E and an addition / comparison calculator F.

Note that the branch metric calculator E, the adder / comparator F, and the path memory G, except for the reset circuit D from the Viterbi decoder BTD, have the same configuration and the same structure as the conventional Viterbi decoder. Perform the operation. The operation of the apparatus configured to implement the error propagation limiting method of the Viterbi decoder according to the present invention will now be described with reference to the signal waveform diagram of FIG.

When a reproduced RF signal which is a digital modulation signal from an optical disk or the like as shown in FIG. 2A is applied to the signal input terminal IN, this RF signal is transmitted to the defect detector DFD and the input interface C. Added. Defect detector A of defect detector DFD
Then, the level of the RF signal is determined, and when the level of the RF signal is equal to or less than a predetermined value, a signal is generated, and this signal is added to the defect length determination unit B.

When the signal from the defect detection unit A measures a low-level period that is longer than or equal to an arbitrarily set determination time td, the defect length determination unit B determines that the portion is defective. A defect detection signal DD as shown in FIG. 2B is generated. On the other hand, the reproduction RF signal input to the Viterbi decoder BTD through the input interface C is decoded via the branch metric operation unit E, the addition / comparison operation unit F, and the path memory G when this signal is normal, and output. The signal is output from the terminal OUT as a decoded signal.

Here, if the input reproduced RF signal is abnormal and the bottom level state exists for a certain period or more, the defect detector DFD detects the abnormalities of the reproduced RF signal and A defect detection signal DD as shown in FIG. The defect detection signal DD is applied to a reset circuit D of the Viterbi decoder BTD, and the defect detection signal DD shown in FIG.
(C) and (d) are generated, and these signals are applied to the branch metric calculator E and the addition / comparison calculator F to reset their states.

At this time, the reproduced RF in the defect state is supplied to the branch metric calculator E and the addition / comparison calculator F.
Since the data obtained by arithmetically processing the signal is held, by resetting the data, it is possible to prevent the data obtained by reproducing the error signal from being transmitted to the subsequent stage.

As a result, the Viterbi decoder BTD outputs the reproduced RF signal.
When the signal returns to normal, normal decoding operation can be immediately started as shown in FIGS. 2 (e) and 2 (f). In the case of a conventional Viterbi decoder that does not detect an abnormality in the input reproduced RF signal, the abnormal reproduced RF signal is also processed as a normal signal. Therefore, as shown in FIG. Until the end, the error that the output decoded signal becomes abnormal continues, so it takes time until a normal signal is decoded.

Also, a period during which an abnormality occurs in the input reproduced RF signal, that is, a period during which the defect detector DFD generates a defect detection signal DD as shown in FIG. If pseudo data for generating a specific pattern such as a 2T repetition pattern is added to the branch metric calculator E and the addition / comparison calculator F from the time of detection to the end of the decoding signal, the decoded signal becomes defective. , An error location can be easily detected.

As described above, the apparatus which implements the error propagation limiting method of the Viterbi decoder according to the present invention can reduce the error propagation at the time of decoding and can obtain a normal decoding result soon after the end of the defect.

[0018]

As is apparent from the above description, the error propagation limiting method of the Viterbi decoder of the present invention and the apparatus implementing the method are input to the Viterbi decoder in a digital recording / reproducing apparatus using Viterbi decoding. A defect detector for detecting defects in the reproduced signal is provided, and if the period of the defect detected by the defect detector is longer than a certain length, the branch metric operation unit and the addition / comparison operation unit of the Viterbi decoder are reset. Since the propagation of the error at the time of the occurrence of the difference is restricted by applying it, the following excellent effects which are not provided by the conventional device can be realized.

(1) By resetting the Viterbi decoder at the end of defect detection, the influence of error propagation in the decoding process is reduced, and a correct decoding result after the end of defect is obtained quickly. (2) By outputting a fixed pattern in a decoding result at the time of detecting a defect, it is possible to easily detect an error portion due to a defect of the decoded signal. This is conceivable as a possibility of being used for measures against defect processing at the time of error correction or the like.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an apparatus that implements an error propagation restriction method of a Viterbi decoder according to the present invention.

FIG. 2 is a waveform diagram for explaining the operation of a device that implements the error propagation restriction method of the Viterbi decoder according to the present invention.

[Explanation of symbols]

IN: Signal input terminal, DFD: Defect detector, A: Defect detector, B
..Defect length determination unit, DD: defect detection signal, C: input interface of Viterbi decoder, BTD: Viterbi decoder,
D: reset circuit, E: branch metric calculator, F: addition and comparison calculator, G: path memory, OUT: output terminal of decoded signal

Claims (9)

[Claims] 1. A Viterbi decoder for detecting a defect of a reproduced signal input to a Viterbi decoder, thereby resetting the operation of a decoding circuit of the Viterbi decoder, thereby limiting propagation of an error due to the defect. Error propagation restriction method. 2. The method according to claim 1, wherein a defect of the reproduced signal inputted to the Viterbi decoder is detected, and if the period of the defect is longer than a certain length, the operation of the decoding circuit of the Viterbi decoder is reset. An error propagation limiting method for a Viterbi decoder that limits propagation of an error caused by the error. 3. A branch metric operation unit of a Viterbi decoder of a decoding circuit of a Viterbi decoder, wherein a defect of a reproduced signal input to the Viterbi decoder is detected, and if a period of the correction is longer than a certain length. And a method of restricting the propagation of an error due to a defect by resetting the operation of the addition / comparison operation unit. 4. A branch metric calculation unit of a Viterbi decoder of a decoding circuit of a Viterbi decoder when a defect of a reproduced signal input to the Viterbi decoder is detected and the period of the correction is longer than a certain length. And a method of restricting the error propagation of the Viterbi decoder, which resets the operation of the addition / comparison operation unit and outputs a specific pattern such as 2T repetition as a decoding result during the defect period. 5. A defect detector for detecting a defect of a reproduction signal input to a Viterbi decoder, and a length determiner for determining whether a period of the defect detected by the defect detector is equal to or longer than a certain length. Having a Viterbi decoder. 6. A defect detector for detecting a defect of a reproduced signal input to a Viterbi decoder, and a length determiner for determining that a period of the defect detected by the defect detector is longer than a certain length. A Viterbi decoder having a branch metric operation unit of a Viterbi decoder and a reset circuit for resetting an addition / comparison operation unit when a difference equal to or more than a length, which is a length determiner, is detected. 7. A defect detector for detecting a defect of a reproduction signal input to a Viterbi decoder, and a length determiner for determining that a period of the defect detected by the defect detector is equal to or longer than a certain length. The length determinator has a reset circuit that resets the branch metric operation unit and the addition / comparison operation unit of the Viterbi decoder when a defect longer than the length is detected when the defect detection is completed. Viterbi decoder designed to limit propagation. 8. A defect detector for detecting a defect of a reproduction signal input to a Viterbi decoder, and a length determiner for determining whether a period of the defect detected by the defect detector is equal to or longer than a certain length. And a circuit for outputting a specific pattern such as 2T repetition as a decoding result from the start to the end of the defect determination when a defect having a length equal to or more than the length is detected. 9. A defect detector for detecting a defect of a reproduction signal input to a Viterbi decoder, and a length determiner for determining that a period of the defect detected by the defect detector is equal to or longer than a certain length. A reset circuit that resets the branch metric operation unit and the addition / comparison operation unit of the Viterbi decoder when a length longer than the length judging unit is detected, and a length longer than the length judging unit is detected. And a circuit for outputting a specific pattern such as 2T repetition as a decoding result from the start to the end of the defect determination when the determination is made.