JPH10116055A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a display device that is capable of automatically selecting/ switching a frame modulation pattern per pixel so that the average luminance is constant depending on the contents of the gradation data, and that is capable of suppressing a flicker even in the case of the gradation data of a specific pattern like a mesh grid pattern. SOLUTION: A thinning pattern generating means is constituted of a frame counter 101 and a pattern generating ROM 102; a thinning pattern selecting means, of a selector 103; a data comparing means, of AND gate 105, 106 and OR gate 107; and a selective signal generating means, of a sequencer 104 respectively; with such a modulation pattern selected from the thinning pattern generating means as capable of making the average luminance per frame constant depending on the contents of gradation data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display panel,
More specifically, the present invention relates to a display device such as an EL display panel and a plasma display panel, in which a plurality of frames are defined as one cycle, and a gray scale display is performed by a frame thinning method in which pixels are turned on in several frames corresponding to display data in the cycle. Related to the device.

[0002]

2. Description of the Related Art In a display device of this type, a frame thinning method is well known as a driving method for displaying a gradation on a screen thereof. Hereinafter, the frame thinning method will be described by taking a liquid crystal display panel (liquid crystal display device) as an example.

In this frame thinning method, a plurality of frames are defined as one cycle, and pixels are turned on to emit light only in a number of frames corresponding to the luminance to be displayed among the frames in the cycle, and visually, in a cycle unit. It is intended to obtain the brightness of the medium level.

[0004] Table 1 below shows the relationship between each gray scale and a frame to be turned on when gray scale display is performed with four frames as one cycle by the frame thinning method.

[0005]

[Table 1]

[0006] In Table 1, two cycles are displayed, and the frame for performing the ON drive is indicated by "1" and the OFF frame is indicated by "0".

By the way, in the grayscale driving by the frame thinning method, the flicker becomes a problem since the ON period of the pixel becomes several times the frame frequency at the intermediate grayscale, particularly at a low grayscale level.

Now, the reason will be specifically described. First, one frame is the frame period of the liquid crystal display panel itself (1/70 = 1 when the frame frequency is 70 Hz).
4.3 ms). For example, in the case of 2/4 gradation, on / off is repeated for each frame, so the on cycle is twice the frame cycle, that is, 14.3 ms × 2 = 28.
6 ms = 35 Hz, and a flicker of 35 Hz occurs.

In the case of 1/4 gradation, the ON period is 4
Since it is performed once per frame, the ON period is four times the frame period. Therefore, flicker of 17.5 Hz occurs.

[0010] Here, the flicker becomes more conspicuous as the frequency is lower, that is, as the cycle is longer. Therefore, flicker is a particular problem when displaying low gradations.

As a method of reducing the flicker, there are a display device disclosed in Japanese Patent Application Laid-Open No. Hei 3-20780 and a display device disclosed in Japanese Patent Application Laid-Open No. Hei 6-301013.

FIG. 16 shows a circuit configuration of a display device disclosed in Japanese Patent Laid-Open Publication No. Hei 3-20780. This display device
A thinning pattern generating circuit 1 ', a thinning pattern selecting circuit 2', a gradation selecting circuit 3 ', and a selection signal generating circuit 4' including a dot counter are provided. The thinning pattern generating circuit 1 'is synchronized with a frame signal. A plurality of types of frame thinning patterns corresponding to each gradation are generated.

Table 2 shows this thinning pattern.
It has a plurality of modulation patterns (thinning patterns) A to L.

[0014]

[Table 2]

In the above configuration, the selection signal generating circuit 4 'to which the dot clock is applied outputs a thinning pattern selection signal every time a dot clock is input to the thinning pattern selection circuit 2'. 2 ′ adopts a method of suppressing flicker by simply switching the order of the modulation pattern for each pixel (pixel).

More specifically, as shown in Table 3 below,
When a plurality of pixels are viewed with the phase of the thinning pattern shifted for each adjacent pixel, flicker is made inconspicuous.

[0017]

[Table 3]

Referring to FIG. 17, this method will be described in comparison with a basic frame thinning method (frame modulation method). In the basic frame modulation method, as shown in FIG. When the tones are all ／ gray scales, all the pixels are turned on and all the pixels are turned off alternately, so that the flicker is very noticeable.

On the other hand, in the above method, as shown in FIG. 2B, the on / off phase is shifted for each pixel, so that the number of on pixels is equalized for each frame. The luminance for each is averaged, thereby reducing apparent flicker.

FIG. 18 shows a circuit configuration of a display device disclosed in Japanese Patent Application Laid-Open No. 6-301013. This display device employs a method of switching a thinning pattern for each horizontal synchronization signal. That is, in this display device, the selection signal generation circuit 4 ″ composed of a line counter outputs a thinning pattern selection signal to the thinning pattern selection circuit 2 ′ every time a horizontal synchronization signal is supplied. When a plurality of pixels are viewed by shifting the phase of the pattern, a method of making flicker inconspicuous is adopted.

The other components are the same as those shown in FIG. 16, and therefore, corresponding portions are denoted by the same reference characters and will not be described in detail.

[0022]

However, the conventional driving method described above is effective for suppressing flicker when display data has a uniform gradation within a certain area or more, but the following table is effective. As shown in FIG. 4, when the display data is a specific pattern such as a hatched pattern, the luminance of the second frame and the fourth frame becomes 0, and the luminance periodically changes, so that flicker cannot be suppressed. There was a problem.

[0023]

[Table 4]

FIG. 19 shows the shading pattern, which is a specific pattern in the case of monochrome display, in pixel units. FIG. 20 shows a corresponding specific pattern in the case of color display, which is a display pattern in which certain halftone color colors are arranged in a staggered pattern. Such a pattern
This frequently occurs when a process of increasing the apparent number of gradations (the number of colors) is performed by combining frame modulation and dither processing.

Therefore, in the display device, it is necessary to suppress flicker even in the case of such a specific pattern.

The present invention has been made in view of such a situation, and automatically selects and switches a frame modulation pattern for each pixel so that the average luminance is constant according to the contents of gradation data. It is an object of the present invention to provide a display device capable of suppressing flicker and improving display quality even when display data is a gradation pattern of a specific pattern such as a hatched pattern.

Another object of the present invention is to provide a color display device which can suppress flicker for a specific pattern and improve display quality even in the case of color display.

Another object of the present invention is to suppress flickering even for image data having different characteristics with respect to a thinning-out pattern with respect to normal image data such as an illustration image or animation for a natural image, thereby improving display quality. It is to provide a display device which can be improved.

It is another object of the present invention to provide a display device which can respond to a plurality of types of display devices having different thinning patterns with a single device.

It is another object of the present invention to provide a display device capable of suppressing flicker and improving display quality even when image data having different characteristics are mixed in one screen.

Another object of the present invention is to provide a display device capable of comparing and judging display data of a plurality of pixels and consequently enjoying more accurate display quality.

[0032]

According to the display device of the present invention, a plurality of frames are defined as one cycle, and display is performed by a frame thinning method in which pixels are turned on in several frames corresponding to display data within the cycle. An apparatus, comprising: a thinning pattern generating means for generating a plurality of types of frame thinning patterns corresponding to each gray scale in synchronization with a frame signal; and a data comparing means for comparing a gray scale data sequence corresponding to a display with a specific pattern. And selection signal generating means for generating a selection signal for selecting one frame thinning pattern from the plurality of types of frame thinning patterns based on the comparison result of the data comparing means; and generating the thinning pattern based on the selection signal. Thinning pattern selecting means for selecting one frame thinning pattern from the means, and Grayscale selection means for selecting luminance data for each frame based on the selected thinning pattern and the value of the grayscale data of the grayscale data string, and outputting the luminance data as grayscale display data, Thereby, the above object is achieved.

Preferably, the selection signal generating means is a sequencer, the sequencer has a number of states corresponding to the number of the plurality of types of thinning patterns, and the state of the sequencer is changed according to an output of the data comparing means. A state transition is made, whereby the plurality of types of thinning patterns are sequentially selected.

Preferably, the data comparison means and the selection signal generation means are integrated in a circuit.

Preferably, the selection signal generation means is constituted by three selection signal generation means for generating selection signals for each of R, G, and B primary colors, and a pixel in which the R, G, and B primary colors are defined as one unit. An operation timing generation means for generating an operation timing signal for sequentially operating the three selection signal generation means in accordance with each of the three primary colors, and one of the three selection signals from the three selection signal generation means. Are sequentially selected in accordance with the operation timing signal, and the selection signal selecting means for providing the selected selection signal to the thinning pattern selecting means is further provided.

Preferably, the plurality of types of frame thinning patterns are set in the thinning pattern generating means in response to an external command.

Preferably, the thinning pattern generating means includes a frame counter, an address selector and an RA.
M.

Preferably, the thinning pattern selecting means selects the frame thinning pattern according to attribute data added to the display data.

Preferably, the data comparing means compares a gradation data string of a plurality of pixels with a specific pattern.

Preferably, the data comparing means includes a shift register which holds a grayscale data string in synchronization with a dot clock.

The operation of the present invention will be described below.

According to the above configuration, as a result of selecting desired luminance data for each frame, it is possible to select gradation display data that can average the luminance for each frame. That is, for example, even in the case of the data as shown in Table 4 above, as shown in Table 5, two types of modulation patterns A and B are prepared, and the modulation patterns A and By selecting the modulation pattern B for No. 4, the brightness becomes uniform over each frame as shown in Table 6, and flicker can be reduced. Therefore, display quality can be improved.

[0043]

[Table 5]

[0044]

[Table 6]

Further, in the above configuration, according to the configuration in which the data comparison means and the selection signal generation means are integrated in a circuit, data is directly input, and the selection signal generation Since the constituent sequencers can be controlled, the condition setting of the state transition can be controlled by finer data arrangement, so that there is an advantage that it is possible to more easily cope with many specific patterns.

When the selection signal generation means is constituted by three selection signal generation means for generating selection signals for each of the three primary colors R, G, and B, a display apparatus for performing color display is excellent in display quality with less flicker and with less flicker. A display device can be realized.

According to the configuration in which a plurality of types of frame thinning patterns are set in the thinning pattern generating means in response to an external command, the thinning is performed even when the characteristics of the image data change or the display device is changed. Since the thinning pattern of the pattern generating means can be easily changed from the outside, there is an advantage that a single device can cope with such a case.

Further, according to the structure in which the thinning pattern selecting means selects the frame thinning pattern in accordance with the attribute data added to the display data, even if the feature of the data in a part of the screen is different, the thinning pattern selecting means can be used. By changing the selection pattern of the selection signal generation means in accordance with the attribute data added to the display data, even when image data having different characteristics are mixed in one screen, it is optimal to reduce flicker for each. Can be selected.

Further, according to the configuration in which the data comparing means compares the gradation data string of a plurality of pixels with a specific pattern, the optimum thinning pattern for reducing flicker is automatically selected for more image data. It will be possible
Accordingly, flicker can be reduced more effectively.

[0050]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the drawings.

(Embodiment 1) FIGS. 1 to 6 show Embodiment 1 of the display device of the present invention. First, the basic configuration of this display device (liquid crystal display device) will be described with reference to FIG.

This display device includes a thinning pattern generating means 1 for generating a plurality of types of frame thinning patterns corresponding to each gradation in synchronization with a frame signal, and comparing a gradation data sequence corresponding to a display with a specific pattern. Data comparing means 7, a selection signal generating means 6 for generating a selection signal for selecting one frame thinning pattern from a plurality of types of frame thinning patterns based on the comparison result of the data comparing means, and A thinning pattern selecting means 2 for selecting one frame thinning pattern from the thinning pattern generating means 1, and a luminance for each frame based on the thinning pattern selected by the thinning pattern selecting means 2 and the value of the gradation data in the gradation data sequence. Gradation selecting means 3 for selecting data and outputting luminance data as gradation display data. .

Here, in the display device of the first embodiment, four frames are defined as one cycle, and 0 to 4 frames are turned on, so that 5 gradations, that is, 0/4 gradation, 1/4 floor. Tone, 2/4 gray scale, 3/4 gray scale, and 4/4 gray scale are used.

In the first embodiment as well, the thinning pattern generating means 1 generates a thinning pattern (modulation pattern) for each gradation, as in the above-described conventional example. For this purpose, four gradation patterns (A to D) are generated, and the patterns (pattern groups) A, B, C, and D are respectively set.

However, as for 0/4 gradation and 4/4 gradation, there is only one combination, and all four patterns are the same pattern. Similarly, in the case of 2/4 gradation, two patterns are the same pattern. The table of generated patterns is shown in Table 7 below.

[0056]

[Table 7]

Next, the details of each of the above means will be described with reference to FIG. First, the thinning pattern generating means 1 includes a frame counter 101 and a pattern generating ROM 102. The frame counter 101 is a quaternary counter that counts up by using the frame start signal S as a clock, and counts the count value in four cycles of one frame.
It is output in two bits T (1) and CNT (0).

The pattern generation ROM 102 is a circuit for selecting output data according to the output value of the frame counter 101 and outputting (generating) four types of modulation patterns of A, B, C and D for each frame. Pattern generation ROM 10
2 stores the modulation patterns A to D in Table 7 above.

In the illustrated embodiment, a ROM is used, but a random circuit may be used instead.

The thinning-out pattern selecting means 2 includes a selector 10
3. The selector 103 selects the selection signals SEL (1) and SEL (0) from the selection signal generation means 6.
One of the modulation patterns A to D stored in the pattern generation ROM 102 is output to the output terminal P
(4-0) is a circuit for selectively outputting.

As shown in FIG. 2, the data comparing means 7
A comparison circuit composed of ND gates 105 and 106 and an OR gate 107 determines whether or not the input gradation data DT is specific data, and outputs a result of the determination. In the first embodiment, the gradation data is set to five gradations from 0/4 to 4/4 gradation,
4 gradations, 1/4 gradation, 2/4 gradation, 3/4 gradation and 4 /
DT (2-0) = “000”, “001”,
It is represented by three bits “010”, “011”, and “100”.

In the first embodiment, 0/4 gradation and 4/4 gradation are detected. Therefore, the gradation data DT
(2-0) means that the input values to the AND gates 105 and 106 are DT (2-0) = "000", DT (2-0) =
When the output is "100", the output becomes "1" and the signal is ORed.
The result is input to the gate 107 and becomes the comparison result EQU.

Table 8 below shows a truth table of the data comparison means 7.

[0064]

[Table 8]

As shown in FIG. 2, the selection signal generating means 6 is composed of a sequencer 104. Sequencer 104
Outputs the optimum selection signal SEL to the selector 103 in accordance with the comparison result EQU given from the data comparison means 7, the horizontal synchronizing signal LP, and the dot clock CK inputted to the clock input terminal.

The sequencer 104 operates in the state transition shown in FIG. Here, the number of states of the sequencer 104 is defined by the number of patterns. In the first embodiment, the states of S0, S1, and S2 correspond to the modulation patterns A, B, C, and D.
And S3 are defined. The state transition is controlled in accordance with the output EQU of the data comparison means 7.

First, when the horizontal synchronizing signal LP indicating the start timing of the display data in the horizontal direction becomes "1", the initial state S0 is set. In this state, the modulation pattern A is in a selected state, and the selection signal SEL is SEL (1,0) =
“00” is output. From this state, when EQU = 0, the state shifts to the state S1 of the next pattern, and when EQU = 1, the state shifts to the state S0 again. Here, the state is shifted in synchronization with the dot clock CK.

Similarly, when EQU = 0, the state is shifted to the next pattern. When EQU = 1, the state is shifted to the current state again. After shifting to the selected state S3 of pattern D, the state is switched to the state S0 again. return.

The gradation selecting means 3 converts the output P (4 to 0) of the thinning pattern selecting means 2 into gradation data (gradation data string).
DT (4 to 0) is configured by a selector for selectively outputting 1-bit display data. More specifically,
The selector is configured to select luminance data for each frame based on the modulation pattern selected by the thinning pattern selection unit 2 and the gradation data value of the gradation data string, and output the luminance data as gradation display data. .

Here, an output example of actual display data is shown in FIG.
6 to FIG. 4 to 6 show output examples of the display data of the first embodiment (FIGS. 4A, 5A, and 6A).
(A)) and an output example of the conventional method (FIG. 4 (b), FIG. 5)
(B) and FIG. 6 (b) are shown in comparison, and here, an example is shown in which continuous data of 8 pixels is input as display data.

FIGS. 4A and 4B show a case where all the pixels (No. 1 to No. 8) have a 1/4 gradation. In this case, the sequencer 104 of FIG.
Therefore, the state transitions from S0 → S1 → S2 → S3 → S0, and as apparent from comparison between FIG. 4 (a) and FIG. 4 (b), the same frame modulation pattern as the conventional method is used. Display data is output.

As shown in the graph in this figure, the average luminance of each frame in this case is constant at 0.25, there is no luminance fluctuation, and there is not much flicker. No problem.

FIGS. 5A and 5B show that the display data is 2/4.
This is a case of a repetition pattern of gradation → 0/4 gradation → 2/4 gradation → 0/4 gradation. In this case, according to the conventional method, as shown in FIG.
The display periodically changes from 50 → 0.00 → 0.50 → 0.00, and the display becomes noticeable with flicker.

On the other hand, according to the method of Embodiment 1, FIG.
Of the pixel No. In two, EQU =
1, pixel no. 3, EQU = 0, pixel no.
In Eq. 4, since EQU = 1 changes, S0 → S0 → S1 →
The state changes from S1 to S2 to S2 to S3 to S3, and the frame modulation pattern is A to A to B to B to C to C.
→ D → D is selected. As a result, as shown in the graph in FIG.
It is constant at 0.25 and flicker does not occur much.
Therefore, according to the frame modulation pattern of the first embodiment, it can be seen that flicker can be significantly reduced as compared with the frame modulation pattern of the conventional method.

Similarly, FIGS. 6A and 6B show a case where the display data is a repeating pattern of 3/4 gradation → 4/4 gradation → 3/4 gradation → 4/4 gradation. According to the frame modulation pattern of the first embodiment, the average luminance of each frame is constant at 0.75, as is clear from the graph in FIG. On the other hand, in the conventional method, the average luminance of each frame is 0.75 → 1.00 → 0.75 → 1.00
, And flickers are noticeable. Therefore, also in this case, it can be seen that the frame modulation pattern of the first embodiment can significantly reduce flicker as compared with the frame modulation pattern of the conventional system.

Although the data comparing means 7 and the selection signal generating means 6 are separated from each other in the first embodiment, they can be integrated.

In this case, the circuit configuration includes only the sequencer, and the gradation data DT (2 to 2) is input to the input terminal of the sequencer.
0) is directly input. In the state transition diagram of the sequencer, EQU = 1 in FIG.
QU = 0 may be changed to DT ≠ 0 and DT ≠ 4.

According to the configuration in which the data comparing means 7 and the selection signal generating means 6 are integrated as described above, the sequencer can be controlled by directly inputting data, as compared with the case where they are separately configured. Is controlled by the arrangement of data more finely (for example, S0 →
It is possible to change the condition for transitioning to S1 and the condition for transitioning from S1 to S2), so that there is an advantage that many specific patterns can be handled more easily.

(Embodiment 2) FIGS. 7 to 9 show Embodiment 2 of the display device of the present invention. In the second embodiment, the present invention is applied to a color display device. Therefore, the display device of the first embodiment is provided with selection signal generation means 6R, 6G, 6R for generating selection signals for each of the three primary colors R, G, and B as selection signal generation means, and one unit of three primary colors. Selection signal generating means 6 for each of the three primary colors with the pixel cycle
3-bit ring counter 10 for outputting clock and data timing signals of three primary colors for R, 6G, 6R
3 → 1 selector which selects one of the selection signals from the selection signal generating means 6R, 6G, 6R for each of the 8 primary colors and 3 primary colors by the data timing signal of each of the 3 primary colors, and outputs the selection signal to the thinning pattern selecting means 2 The only difference is that a thinning pattern generating means 1, a thinning pattern selecting means 2, a gradation selecting means 3 and a data selecting means 7 are provided in the same manner.

The operation will be described below by taking, as an example, a case where frame modulation for enabling five-gradation display is performed with four frames as one cycle, as in the first embodiment.

As shown in FIG. 8A, three primary colors of red (R), green (G), and blue (B) are sequentially input to the color gradation data. In synchronization with each of the data strings of these three primary colors,
The 3-bit ring counter 108 generates a clock for the selection signal generating means 6R, 6G, 6R for each color. As shown in FIG. 8, the 3-bit ring counter 108 is reset by the horizontal synchronizing signal (LP) (see FIG. 8B) and uses the dot clock (CK) as a clock (see FIG. 8C). Clocks for primary colors (RCK, GCK, BCK)
Is generated (see (d) to (f) in the same figure). A 3 → 1 selector 10 for selecting a signal corresponding to the current data color from the selection signals from the selection signal generating means 6R, 6G, 6R.
9 is generated (see (g) in FIG. 9).

Here, the selection signal generating means 6R for each color,
6G and 6R are composed of three sets of sequencers that operate in the state transition described in the first embodiment. Note that the arrangement of states in the sequencer does not need to be the same for each color, and can be set for each color.

FIGS. 9A and 9B show output examples of actual color display data. In this example, the display data of red (R) is 0/4 gradation → 4/4 gradation → 0/4 gradation → 4/4 gradation, and the display data of green (G) is 2/4 gradation → 0/4 gradation → 2/4
Gray scale → 0/4 gray scale, display data of blue (B) periodically changes for each primary color such as 3/4 gray scale → 4/4 gray scale → 3/4 gray scale → 4/4 gray scale Here is an example of the case where

FIG. 11A shows an output example of color display data when the circuit configuration of the second embodiment is used.
FIG. 3B shows an output example of color display data when the circuit configuration of the first embodiment is used.

As shown in the graph in FIG. 11A, according to the method of the second embodiment, the average luminance for each frame is:
It is constant at 0.54. On the other hand, as shown in the graph of FIG. 4B, when the circuit configuration of the first embodiment is applied to color display as it is, the average luminance for each frame becomes
The display periodically changes in the order of 0.42 → 0.67 → 0.42 → 0.67, and flicker is noticeable. Therefore, it can be understood that, in the case of performing color display, by employing the method of the second embodiment, it is possible to realize a display device with less flicker and excellent display quality.

In the second embodiment, the case where the three primary colors are input in series to one data line has been described as an example. However, a configuration in which the three primary colors are input in parallel can be adopted. In this case, the 3-bit ring counter 108
And the 3 → 1 selector 109 can be omitted.

(Embodiment 3) FIGS. 10 and 11 show Embodiment 3 of the display device of the present invention. The display device according to the third embodiment has a feature in the thinning pattern generation unit 11. The configuration other than the thinning pattern generation unit 11 has the same circuit configuration as the display device according to the first embodiment illustrated in FIG. 1. I have. Therefore, corresponding parts are denoted by the same reference numerals, and redundant description will be omitted.

As shown in FIG. 11, the thinning pattern generation means 11 comprises a frame counter 101, an address selector 110 and a thinning pattern generation RAM.

Here, the frame counter 101 is the same as the frame counter 101 of the first embodiment. That is, it is a quaternary counter that counts up using the frame start signal S as a clock, and outputs a count value in two bits of CNT (1, 0) with four frames as one cycle.

The address selector 110 switches the output CNT (1, 0) of the frame counter 101 and the set address (A) at the timing of the write signal (WR).
A 2 → 1 selector for outputting to the pattern generation RAM 111.

The thinning pattern generation RAM 111 is a memory that can write the data of the setting data (DB) as pattern data at the timing of the write signal (WR) at the address specified by the setting address (A). The thinning pattern generation RAM 111 also has a plurality of thinning patterns similar to the above, that is, modulation patterns A to
D is written.

The pattern is read out from the frame counter 10.
Pattern data A (4 to 0), B (4 to 0), C (4 to 0), D with the output CNT (1, 0) of 1 as an address
This is performed by outputting (4 to 0) to DO (output terminal).

According to the display device of the third embodiment, the following effects can be obtained in addition to the effects of the display device of the first embodiment. That is, in the third embodiment, since the rewritable thinning pattern generation RAM 111 is used as the thinning pattern generating means 11, even if the feature of the image data is changed or the display device is changed, the thinning pattern is generated. Since the thinning pattern of the generation RAM 111 can be easily changed from the outside, there is an advantage that such a case can be dealt with by a single device.

The case where the characteristics of the image data change means, for example, an illustration image, animation, etc. with respect to a natural image.

(Embodiment 4) FIGS. 12 and 13 show Embodiment 4 of the display device of the present invention. The display device according to the fourth embodiment can change the combination of the thinning patterns selected for a certain area in one screen based on the attribute data added to the display data. The present invention relates to a display device that can suppress flicker even when it is mixed in a screen.

The display device according to the fourth embodiment is characterized by the selection signal generating means 12. The circuit configuration other than the selection signal generating means 12 is the same as that of the display device according to the first embodiment shown in FIG. It has become. Therefore, corresponding parts are denoted by the same reference numerals, and redundant description will be omitted.

The selection signal generating means 12 is constituted by a sequencer. The sequencer generates a selection signal for the thinning pattern selecting means 2 based on the comparison result of the data comparing means 7 and the attribute data added to the display data. Occur.

In the following, four frames are defined as one cycle, and
A case in which frame modulation for enabling gradation display is performed will be described. The attribute data (DA) is data indicating the type of display data to which one data is added for each pixel of the display data.

FIG. 13 shows an example of the state transition of the sequencer constituting the selection signal generating means 12. In the initial state S0, when the signal EQU = 0 from the data comparing means 7, the state S of the next pattern is the same as in the first embodiment.
In the case where the attribute data (DA) is 1, even if EQU = 1, unlike in the first embodiment, the state is shifted not to the state S0 again but to the state S1. That is, only when EQU = 1 and DA = 0, the state is shifted to the state S0 again, and when EQU = 0 or DA = 1, S1 is set.
Is to be shifted to.

Thus, for example, if the attribute data (DA) is set to “0” for the illustration image area and “1” for the natural image area, the thinning pattern selected for a certain area within one screen Can be changed.

Therefore, according to the display device of the fourth embodiment, even when two or more types of image data having different characteristics are mixed in one screen, it is possible to select an optimum thinning pattern for each image data. . Therefore, there is an advantage that flicker can be suppressed even in the case of such a screen display.

(Embodiment 5) FIGS. 14 and 15 show Embodiment 5 of the display device of the present invention. The display device according to the fifth embodiment is characterized by the data comparison means 13 and has a configuration in which display data of a plurality of pixels are compared in order to more accurately correspond to a characteristic pattern. The configuration other than the data comparing unit 13 has the same circuit configuration as the display device of the first embodiment shown in FIG. Therefore,
Corresponding parts have the same reference characters allotted, and redundant description will not be repeated.

Hereinafter, a case where data comparison is performed using a grayscale data string of three pixels will be described as an example. As shown in FIG. 15, the data comparison means 13 of the fifth embodiment includes registers 112 to 114, comparators 116 and 118, and a comparison data string storage unit (memory) 115 for storing a preset comparison data string. , 117 and an OR gate 119.

Here, the registers 112 to 114 are registers for holding the value of the gradation data (DT) in synchronization with the dot clock (CK), and the registers 112 to 114 constitute a shift register. Therefore, the gradation data is stored in the register 112 → register 113 → register 113
And in synchronization with the dot clock (CK).

The comparator 116 is connected to each of the registers 112-1.
A circuit that compares the data string held by 14 with a preset data string stored in the comparison data string storage unit 115, and outputs “1” as an output (Y) if they are the same. Similarly, the comparator 117 also operates in each of the registers 112 to 11.
4 is stored in the comparison data string storage 1
Compared with the data string stored in No.17, if they are the same, "1" is output as the output (Y).

The OR gate 119 OR-outputs the output signals of the comparators 116 and 117 to obtain a comparison result EQU.

According to the fifth embodiment, the data comparing means 1
3, the display data of a plurality of pixels is compared, so that it is possible to automatically select an optimal thinning pattern that can reduce flicker for more image data. Therefore, there is an advantage that flicker can be more accurately suppressed.

In the fifth embodiment, an example has been described in which data comparison is performed using a gradation data string of three pixels. However, comparison with an arbitrary gradation data string can be made by increasing or decreasing the number of registers. Becomes possible. Further, it is possible to cope with an arbitrary data pattern by adding a comparator. Furthermore, by outputting several types of comparison results,
It is also possible to finely control the operation of the selection signal generating means 6 at the subsequent stage to further improve the accuracy.

[0109]

According to the present invention, the frame modulation pattern for each pixel can be automatically selected according to the contents of the gradation data so that the average luminance for each frame is constant. In the conventional method, flicker can be suppressed even for gradation data of a specific pattern in which flicker is likely to occur. As a result, it is possible to realize a display device that is excellent in display quality with little eye fatigue even when used for a long time.

According to the third aspect of the present invention, since the data comparing means and the selection signal generating means are integrated in a circuit, data can be directly input as compared with the case where they are separately formed. Then, since the sequencer constituting the selection signal generating means can be controlled, the condition setting of the state transition can be controlled by the data arrangement more finely, so that there is an advantage that it is possible to more easily cope with many specific patterns. is there.

Further, according to the display device of the fourth aspect, the selection signal generation means is constituted by three selection signal generation means for generating selection signals for each of the three primary colors of R, G and B. A color display device with less display quality and excellent display quality can be realized.

According to the display device of the present invention, a plurality of types of frame thinning patterns are set in the thinning pattern generating means in response to an external command. Even when the display device is changed, the thinning pattern of the thinning pattern generating means can be easily changed from the outside. Therefore, there is an advantage that such a case can be dealt with by a single device.

According to the display device of the present invention, since the thinning pattern selecting means selects the frame thinning pattern in accordance with the attribute data added to the display data, the data of a part of the screen is displayed. Even when the features are different, by changing the selection pattern of the selection signal generating means for the thinning pattern selecting means in accordance with the attribute data added to the display data, image data having different features are mixed in one screen. Even in this case, it is possible to select an optimal thinning pattern that reduces flicker for each case. Therefore, even when image data having different characteristics are mixed in one screen, flicker can be reduced.

According to the display device of the present invention, since the data comparing means is configured to compare a gradation data string of a plurality of pixels with a specific pattern, flicker is reduced for more image data. Since it is possible to automatically select the optimal thinning pattern to be performed, flicker can be reduced more effectively.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a basic configuration of a display device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing details of a thinning pattern generation unit, a thinning pattern selection unit, a data comparison unit, and a selection signal generation unit according to the first embodiment of the present invention.

FIG. 3 is a state transition diagram of a sequencer according to the first embodiment of the present invention.

4A is a diagram showing an example of display data output, and FIG. 4B is a diagram showing an example of display data output, showing a conventional example.

5A is a diagram showing another example of display data output example, and FIG. 5B is a diagram showing another example of display data output, showing a first example of the present invention. FIG.

6A is a diagram showing another example of the display data output example, and FIG. 6B is a diagram showing a first example of the present invention, and FIG.

FIG. 7 is a block diagram of a display device according to a second embodiment of the present invention.

FIG. 8 is a diagram showing operation waveforms of a 3-bit ring counter according to the second embodiment of the present invention.

9A is a diagram illustrating a display data output example according to a second embodiment of the present invention, and FIG. 9B is a diagram illustrating an example of display data output according to the first embodiment.

FIG. 10 is a block diagram illustrating a basic configuration of a display device according to a third embodiment of the present invention.

FIG. 11 is a block diagram illustrating details of a thinning pattern generation unit according to the third embodiment of the present invention.

FIG. 12 is a block diagram illustrating a basic configuration of a display device according to a fourth embodiment of the present invention.

FIG. 13 is a state transition diagram of a sequencer according to the fourth embodiment of the present invention.

FIG. 14 is a block diagram illustrating a basic configuration of a display device according to a fifth embodiment of the present invention.

FIG. 15 is a block diagram showing details of a data comparing unit according to the fifth embodiment of the present invention.

FIG. 16 is a block diagram showing a conventional example of a display device.

FIG. 17A shows a basic frame thinning method,
FIG. 2B is a diagram showing a conventional frame thinning method in comparison.

FIG. 18 is a block diagram showing another conventional example of a display device.

FIG. 19 is a diagram showing a hatched pattern, which is a specific pattern in the case of monochrome display, in pixel units.

FIG. 20 is a diagram showing a hatched pattern, which is a specific pattern in the case of color display, in pixel units.

[Explanation of symbols]

 Reference Signs List 1 thinning pattern generating means 2 thinning pattern selecting means 3 gradation selecting means 6, 6R, 6G, 6B selecting signal generating means 7 data comparing means 101 frame counter 102 pattern ROM 103 selector 104 sequencer 105, 106 AND gate 107 OR gate 108 3 Bit ring counter 109 3 → 1 selector 110 Address selector 111 Pattern generation RAM 112-114 Registers 116, 118 Comparator 119 OR gate

Claims (9)

[Claims] 1. A display device for performing gradation display by a frame thinning method in which a plurality of frames are defined as one cycle and pixels are turned on in several frames corresponding to display data within the cycle, wherein the display is synchronized with a frame signal. Thinning pattern generating means for generating a plurality of types of frame thinning patterns corresponding to each gradation, data comparing means for comparing a gradation data sequence corresponding to display with a specific pattern, and a comparison result based on the data comparing means. Selection signal generating means for generating a selection signal for selecting one frame thinning pattern from the plurality of types of frame thinning patterns, and thinning for selecting one frame thinning pattern from the thinning pattern generating means based on the selection signal Pattern selecting means, a thinning pattern selected by the thinning pattern selecting means, and the gradation Select the brightness data for each frame based on the value of the grayscale data over data columns, the display device provided with a gradation selecting means for outputting the luminance data as the gradation display data. 2. The apparatus according to claim 1, wherein said selection signal generating means is a sequencer, and said sequencer has a number of states corresponding to the number of said plurality of types of thinning patterns, and the state of said sequencer is changed according to an output of said data comparing means. 2. A transition is made, whereby the plurality of types of thinning patterns are sequentially selected.
The display device according to the above. 3. The display device according to claim 1, wherein said data comparison means and said selection signal generation means are integrated in a circuit. 4. The selection signal generation means comprises three selection signal generation means for generating a selection signal for each of R, G, and B primary colors, and the selection signal generation means has a pixel cycle in which the R, G, and B primary colors are defined as one unit. An operation timing generating means for generating an operation timing signal for sequentially operating the three selection signal generating means in accordance with each of the three primary colors; and one of the three selection signals from the three selection signal generating means. 3. The display device according to claim 1, further comprising a selection signal selection unit that sequentially selects the selection signals in accordance with the operation timing signal, and supplies the selected selection signal to the thinning pattern selection unit. 4. 5. The display device according to claim 1, wherein the plurality of types of the frame thinning patterns are set in the thinning pattern generating means in response to an external command. 6. The display device according to claim 5, wherein said thinning pattern generating means comprises a frame counter, an address selector and a RAM. 7. The display device according to claim 1, wherein said thinning pattern selecting means selects said frame thinning pattern in accordance with attribute data added to display data. 8. The data comparing means for comparing a gradation data string of a plurality of pixels with a specific pattern.
The display device according to claim 7. 9. The display device according to claim 8, wherein said data comparing means includes a shift register which holds a gradation data string in synchronization with a dot clock.