JPH10108171A - Image coding and multiplexer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce deterioration in image quality of a decoded image even from coded image data of any program in the case of coding/multiplexing image data of a plurality of programs and outputting the result at a fixed transmission rate. SOLUTION: The multiplexer is provided with an image coding control circuit 20 that respectively controls a coding rate of a plurality of kinds of image coding circuits 10, 12, 14. In the case of coding and multiplexing a plurality of kinds of image data, a coding rate is set lower as to the image coding circuit to which, e.g. a small quantization scale is assigned and a coding rate is set higher as to the image coding circuit to which a high quantization scale is assigned through the control of the circuit 20, then the coding rate of the image data is properly controlled to adjust produced information amount thereby decreasing deterioration in image quality of the coded image data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image encoding and multiplexing apparatus, and more particularly to an image encoding and multiplexing apparatus for encoding image data of a plurality of programs and multiplexing them.

[0002]

2. Description of the Related Art As an image coding method for compressing image data, MPEG (Moving) has been receiving attention as a general-purpose coding method that can be commonly used in fields such as communication, broadcasting, storage media, and computers. Picture Ima
ge Coding Experts Group) method. MPEG is
Motion compensated interframe coding and DCT (Discrete CosineT)
ransform).

FIG. 10 is a block diagram for explaining the MPEG encoding method. 10, reference numeral 10 denotes an image encoding circuit, 30 denotes a system multiplexing circuit, 50 denotes various media, 60 denotes a system demultiplexing circuit, and 70 denotes an image decoding circuit.

The image encoding circuit 10 performs an encoding process on the input digital image data by using motion compensation (MC) prediction and discrete cosine transform (DCT) to reduce the data amount. The result is supplied to the system multiplexing circuit 30. The system multiplexing circuit 30 multiplexes audio encoded data encoded by an audio encoding circuit (not shown), other data, and image encoded data encoded by the image encoding circuit 10. Then, synchronization information and multiplexing information are added to the multiplexed data, and various media 5 are added.
0 (communication network, broadcast network, storage media, computer, etc.)
To supply.

On the other hand, data input from the various media 50 to the system demultiplexing circuit 60 is separated by the system demultiplexing circuit 60 into images, sounds, and other data. Then, of the separated various data, the image coded data is input to the image decoding circuit 70, and the image decoding circuit 70 performs decoding by the reverse process of the image coding circuit 10 to perform image decoding. Data is output.

Next, the above-described image encoding circuit 10 will be described in more detail. FIG. 11 is a block diagram showing a conventional example of the image encoding circuit 10. As shown in FIG. In FIG. 11, 10
4 is a switch, 106 is a prediction error calculation circuit, and 108 is D
CT circuit, 110 is a quantization circuit, 112 is an inverse quantization circuit, 114 is an IDCT (inverse DCT) circuit, 116 is an adder, 118 is a frame memory, 120 is an MC (motion compensation) circuit, and 122 is ME (motion detection). ) Circuit, 124 is V
LC (variable length coding) circuit, 126 is a transmission buffer, 1
28 is a rate control circuit, 130 is a prediction judgment circuit, and 132 is a switch.

The operation of the image encoding circuit 10 configured as described above will be described below. Here, it is assumed that the image data input to the image encoding circuit 10 is input in block units of 16 × 16 pixels. This input image data is supplied to the terminal a of the switch 104 and the prediction error calculation circuit 1.
06 and one input terminal of the ME circuit 122.

The other input terminal of the prediction error calculation circuit 106 is connected to the image coding circuit 1 which is the output of the MC circuit 120.
A prediction signal of the input image data to 0 is input, and a difference from the input image data is calculated here. The difference output of the prediction error calculation circuit 106 is input to the terminal b of the switch 104. When the switch 104 is controlled by the output of the prediction determination circuit 130, either the input image data or the difference data (prediction error data) is output from the switch 104 and input to the DCT circuit 108.

The above-mentioned prediction judgment circuit 130 compares the input image data with the prediction error data from the prediction error calculation circuit 106. For example, a comparison is made based on the magnitude of the energy component of the level fluctuation, and a control signal is output according to the comparison result to control the switches 104 and 132.

The DCT circuit 108 converts an image into, for example, 8 × 8
Divided into blocks of pixels, DCT (Discrete Cosine Transform)
Is performed to convert the image data into the frequency coefficient data F [v].
[u], and supplies it to the quantization circuit 110. In this example, v and u are both 0 to 7.

Using the frequency coefficient data F [v] [u], the quantization circuit 110 performs, for example, the quantization shown in the following equation (1), and generates the quantized coefficient data QF [v] [u]. Output. QF [v] [u] = 16 × F [v] [u] / (W [w] [v] [u] × quantization scale) (1) W [w] [v] [u]: quantization Matrix table Quantization scale: Scale value for performing quantization Quantization coefficient data QF [v] [u] output from the quantization circuit 110 is converted into an inverse quantization circuit 112 and a VLC (variable length coding) circuit. 124.

In the inverse quantization circuit 112, the quantization circuit 11
Inverse quantization is performed with a characteristic opposite to 0, and the operation result is input to an IDCT (inverse DCT) circuit 114 as decoded coefficient data. In the IDCT circuit 114, an inverse DCT process is performed, and the operation result is input to one input terminal of the adder 116. The output from the switch 132 is input to the other input terminal of the adder 116, and the inverse DCT
Is added to the input data. As a result, the decoded image data is output from the adder 116 and input to the frame memory 118.

A terminal "a" of the switch 132 receives "0" and a terminal "b" receives a prediction signal of input image data which is an output of the MC circuit 120. The switch 132 operates in conjunction with the switch 104 to
It is controlled by a control signal output from the control signal 30.

The frame memory 118 includes the adder 11
6, and stores the decoded image data in MC
It is supplied to the circuit 120 and the ME circuit 122. ME circuit 1
At 22, using the decoded image data from the frame memory 118 and the input image data to the image encoding circuit 10,
For example, motion detection is performed using the sum of the differences, and a motion vector having a small sum of the differences is output to the MC circuit 120. M
The C circuit 120 performs motion compensation using the motion vector supplied from the ME circuit 122, calculates a prediction signal of the input image data, and supplies it to the prediction error calculation circuit 106 and the terminal b of the switch 132.

The VLC circuit 124 reduces the data amount by using the Huffman coding method, and supplies the processing result to the transmission buffer 126. The transmission buffer 126 reads out data at a predetermined coding bit rate and supplies it to the system multiplexing circuit 30 of FIG. Also, the transmission buffer 126 supplies information indicating the buffer sufficiency to the rate control circuit 128.

The rate control circuit 128 appropriately updates the quantization scale for controlling the quantization circuit 110 in accordance with the sufficiency of the transmission buffer 126, and supplies the updated quantization scale to the quantization circuit 110. That is, when the sufficiency of the transmission buffer 126 is small, the quantization scale is set to a small value so that the quantization step of the quantization circuit 110 is reduced in order to increase the data generation amount. On the other hand, when the degree of sufficiency of the transmission buffer 126 is large, the quantization scale is set to a large value so as to increase the quantization step of the quantization circuit 110 in order to reduce the data generation amount.

[0017]

However, in such an image coding system, the rate control circuit 12
Since the amount of generated information is made constant by the control of step 8, the amount of generated information becomes almost the same for both complex and simple images, and the image quality sometimes changes depending on the content of the image data.

For this reason, when encoding image data of a plurality of programs, multiplexing the plurality of encoded image data into one stream and outputting the stream at a fixed transmission rate,
Depending on the contents of the image data of a certain program among the image data of a plurality of programs, the image quality of a decoded image of another program hardly deteriorates, but the decoded image of the above-mentioned program has a problem that the image quality greatly deteriorates. Was.

Further, when image data of a plurality of programs are encoded and a new program is added and encoded and multiplexed, there is also a problem that the image quality of a decoded image of the original program may be greatly deteriorated. there were.

The present invention has been made in order to solve the above-mentioned problems, and in the case where image data of a plurality of programs are encoded and multiplexed and output at a fixed transmission rate, the encoded image data of It is another object of the present invention to reduce the deterioration of the image quality of the decoded image. Also,
When encoding and multiplexing image data of a new program by adding image data of a new program to image data of a plurality of programs, it is another object of the present invention to prevent a large deterioration in image quality of a decoded image of the encoded image data of the original program. I do.

[0021]

In order to achieve the above object, an image coding and multiplexing apparatus according to the present invention comprises: a plurality of image coding means for coding image data of a plurality of programs; Image encoding control means for controlling the encoding rates of the means, and multiplexing means for multiplexing the outputs from the plurality of image encoding means.

According to another feature of the present invention, the image coding control means controls the coding rate using quantization information of the plurality of image coding means.

According to another feature of the present invention, the image encoding control means includes: a quantization information storage means for storing quantization information output from the plurality of image encoding means; Coding rate storage means for storing coding rate information output from the coding means, and codes of the plurality of image coding means based on outputs of the quantization information storage means and outputs of the coding rate storage means. And rate control means for controlling each of the conversion rates.

According to another feature of the present invention, the plurality of image encoding means and the multiplexing means include an MP
It is characterized by generating encoded data by the EG method.

According to another feature of the present invention, the plurality of image encoding means and the multiplexing means include an MP
The coded data is generated by the EG method, and the image coding control means controls the coding rate by using the quantization scales of the plurality of image coding means.

According to another feature of the present invention, the image coding control means sets the coding rate of the image coding means to which the minimum quantization scale is assigned among the plurality of image coding means. The encoding rate is controlled so as to increase the encoding rate of the image encoding means to which the maximum quantization scale is assigned.

Another feature of the present invention is that the image coding control means controls the coding rate of each image coding means while keeping the total coding rate of the plurality of image coding means constant. Is performed.

According to another feature of the present invention, the image encoding control means sets the encoding rate of the image encoding means to which a smaller quantization scale is assigned among the plurality of image encoding means. The present invention is characterized in that control is performed so as to be lowered by the coding rate of the newly added image coding means.

Since the present invention comprises the above technical means, when encoding and multiplexing a plurality of types of image data, the encoding rate of each image data is appropriately controlled, and the decoded image data is decoded for each encoded image data. The amount of generated information is adjusted so that the image quality degradation of the image is reduced.

For example, when multiplexing a plurality of coded image data and outputting the multiplexed data at a fixed rate, the coding rate is reduced for the image data to which the assigned quantization scale is small and the image quality is hardly degraded. For image data to which the assigned quantization scale is large and image quality is likely to deteriorate, the encoding rate is controlled to be high.

Further, when a new image encoding means is added, the encoding rate for the image data which has a small quantization scale assigned to the existing image encoding means and whose image quality hardly deteriorates is reduced. , Is controlled so as to be reduced by the coding rate of the added image coding means.

[0032]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a first embodiment of the image coding and multiplexing apparatus according to the present invention.
In this embodiment, the present invention is applied to MPEG2 video coding and system multiplexing.

In FIG. 1, reference numerals 10, 12, and 14 denote image encoding circuits, reference numeral 20 denotes an image encoding control circuit, and reference numerals 30, 32, and 3
4 is a system multiplexing circuit, and 40 is a program multiplexing circuit. The image encoding circuit 10 performs an encoding process on the input digital image data by using motion compensation (MC) prediction and discrete cosine transform (DCT) to reduce the amount of data. Multiplexing circuit 30
Supply to

The system multiplexing circuit 30 multiplexes the audio encoded data encoded by the audio encoding circuit (not shown) and other data with the image encoded data encoded by the image encoding circuit 10. . Then, synchronization information and multiplexing information are added to the multiplexed data, and the multiplexed data is supplied to the program multiplexing circuit 40 as one stream data. The other image encoding circuits 12, 14 and the system multiplexing circuit 32,
34 operates in the same manner as the image encoding circuit 10 and the system multiplexing circuit 30 described above.

In the image coding control circuit 20, based on the quantization information and the bit rate information obtained from each of the image coding circuits 10, 12, and 14, each image coding circuit 10, 12, The encoding bit rates of the image encoding circuits 10, 12, and 14 are respectively controlled so that the image quality of the decoded image of the image data encoded at 14 is reduced.

The program multiplexing circuit 40 multiplexes the three stream data input from each of the system multiplexing circuits 30, 32 and 34, adds each piece of program information and the like, and multiplexes them into one stream data. As the multiplexed stream, there is a transport stream in MPEG2. The stream data multiplexed by the program multiplexing circuit 40 is output to a transmission path.

Next, the image encoding circuit 10 shown in FIG. 1 will be described in more detail. FIG. 2 shows the image encoding circuit 10
FIG. 3 is a block diagram showing an example of the configuration of FIG. In the configuration of the image encoding circuit 10 shown in FIG. 2, the same portions as those of the conventional example shown in FIG. 11 are denoted by the same reference numerals, and redundant description will be omitted.

In FIG. 2, the rate control circuit 1
29 appropriately updates the quantization scale that controls the quantization circuit 110 in accordance with the sufficiency of the transmission buffer 126 and supplies the updated quantization scale to the quantization circuit 110.
That is, when the sufficiency of the transmission buffer 126 is small, the quantization scale is set to a small value so that the quantization step of the quantization circuit 110 is reduced in order to increase the data generation amount. On the other hand, when the degree of sufficiency of the transmission buffer 126 is large, the quantization scale is set to a large value so as to increase the quantization step of the quantization circuit 110 in order to reduce the data generation amount. The above operation is the same as in the case of FIG.

Further, in the present embodiment, the rate control circuit 129 calculates the average value of one frame of the above-mentioned quantization scale, and uses it as the quantization information s11 of FIG. 1 together with the bit rate signal s12. 20. Further, it receives bit rate control information s13 from the image coding control circuit 20, and controls the quantization circuit 110 based on the bit rate control information s13.

The other image coding circuit 1 shown in FIG.
2 and 14 have the same configuration as the image encoding circuit 10 and perform the same operation.

Next, the image encoding control circuit 20 will be described in detail. FIG. 3 is a block diagram showing a configuration example of the image encoding control circuit 20. In FIG. 3, 22 is a quantization scale memory, 24 is a bit rate memory, 2
6 is a bit rate controller.

The operation of the image coding control circuit 20 configured as described above will be described below. First, quantization information s11, s21, and s31 are input from the image encoding circuits 10, 12, and 14 of FIG. As described above, the quantization information is a quantization scale that determines a quantization step in MPEG, and the input here is the average value of one frame.

The quantization scale memory 22 stores quantization information for one sequence, which is a group of pictures,
The average value of the quantization scale per sequence of each of the image encoding circuits 10, 12, and 14 is calculated.

Also, the bit rate memory 24 has
, Bit rate information s12, s22, and s32 of the current sequence are input from the image coding circuits 10, 12, and 14,
They are stored.

The bit rate controller 26 stores the image encoding circuits 10, 1 from the quantization scale memory 22.
The average quantization scale per sequence of 2, 14 is read out, and based on the read out information, each of the image coding circuits 10, 1 stored in the bit rate memory 24 is read.
The bit rates of 2, 14 are controlled. Here, the bit rate control operation performed by the bit rate controller 26 will be described with reference to the flowchart of FIG.

First, in step S 1, the bit rate controller 26 determines the maximum value (Max) and the minimum value from the average quantization scale per sequence of each of the image encoding circuits 10, 12, and 14 read from the quantization scale memory 22. The value (Min) is selected, and the difference between them is obtained.

Then, the obtained difference value is equal to a predetermined value Mt.
If not less than h, the process proceeds to step S2. On the other hand, if the obtained difference value is smaller than the predetermined value Mth, the process of the bit rate controller 26 ends. Here, Mth is a threshold value of the difference between the maximum value and the minimum value of the Q scale (quantization scale) indicating whether or not the image coding control circuit 20 changes the bit rate.

In step S2, each average quantization scale per sequence stored in the quantization scale memory 22 is assigned to a corresponding one of a plurality of groups according to the size of the quantization scale. Classify. In step S3, a group to which the maximum value Max and the minimum value Min of the average quantization scale selected in step S1 belong is selected from the plurality of groups.

In step S4, the total number of average quantization scales classified into the group selected in step S3, that is, the group to which the maximum value Max and the minimum value Min of the average quantization scale belong, is obtained. In step S5, the maximum value Max of the quantization scale and the minimum value Mi are set such that the increase / decrease of the bit rate becomes “0” according to the total number obtained in step S4.
The bit rate is changed and assigned within the n groups.

Next, a specific example of the processing in steps S1 to S5 will be described with reference to FIG. In the first example,
As shown in FIG. 5A, the image encoding circuits 10, 12, 14
The image data has a bit rate of 2 Mbp
s, 4 Mbps, and 6 Mbps. The average quantization scale per sequence of each of the image encoding circuits 10, 12, 14 is 28,
Assume that they are 50 and 22. Further, the threshold value used for the comparison in step S1 is Mth = 20. Further, the grouping in step S2 is performed according to FIG.

First, in step S1, since 50 (maximum value Max of average quantization scale) −22 (minimum value Min of average quantization scale) ≧ 20 (threshold value Mth), the process proceeds to step S2. In step S2, using the grouping diagram of FIG.
The average quantization scale values 28, 50, and 22 per sequence of 0, 12, and 14 are classified into group 3, group 5, and group 2, respectively.

In step S3, group 5 (maximum value M
The group to which ax belongs and the group 2 (the group to which the minimum value Min belongs) are selected. In step S4,
No other average quantization scale is classified into the group 5 to which the maximum value Max belongs and the group 2 to which the minimum value Min belongs in this way (the average quantization scale other than the maximum value / minimum value). Is 28, which is classified into other group 3), and the total number of average quantization scales classified into group 2 and group 5 is determined to be one each.

In step S5, according to the result of step S4, for example, the bit rate of the image coding circuit 12 is increased by 0.1 Mbps to 4.1 Mbps, and the bit rate of the image coding circuit 14 is set to 0. .1M
bps to 5.9 Mbps. In addition, temporarily
The average quantization scale of the image encoding circuit 10 is also group 2
, The bit rate of the image encoding circuit 12 is increased by 0.2 Mbps and the bit rates of the image encoding circuits 10 and 14 are decreased by 0.1 Mbps.

The second specific example is that each image encoding circuit 1
When the bit rates and average quantization scales of 0, 12, and 14 are as shown in FIG. 5B, the threshold value Mth and the method of dividing groups are the same as those in the first specific example described above. I do. In this case, 40 (maximum value Max of average quantization scale) −31 (maximum value Min of average quantization scale) <20 (threshold value Mth), and step S
Since the conditional expression (1) is not satisfied, the processing is terminated here.
Does not change the bit rate.

As shown in FIG. 3, when the operation of FIG. 4 is completed, the bit rate controller 26 supplies the bit rate information s13, s23, and s33 of the next sequence to the image encoding circuits 10, 12, and 14. .

The image coding circuits 10, 12, and 14 change the coding bit rate in the following sequence based on the bit rate information s13, s23, and s33 supplied from the bit rate controller 26, and perform image coding. Do. In MPEG, the bit rate cannot be changed in the same sequence. Therefore, in the present embodiment, the change of the bit rate is performed by performing a sequence end process.
Next, it is performed after starting a new sequence process. The above operation is repeated for each sequence.

Incidentally, the image encoding circuits 10, 12, 1
For example, in a TV conference or the like, a similar image continues as an image source for a certain period of time as input image data to the input device 4. Therefore, in a source having a large quantization scale, large image quality degradation is likely to occur. However, in the present embodiment, when multiplexing image data of two or more programs and transmitting the multiplexed image data, the encoding bit rate of a source having a small quantization scale and almost no image quality deterioration is reduced, and image quality deterioration is likely to occur. Since the bit rate (that is, the amount of generated information) is allocated to the source, image quality degradation can be reduced.

In the above embodiment, the example in which the number of image coding circuits is three has been described. However, the present invention can be similarly applied if the number of image coding circuits is two or more. Also, in the above embodiment, MPEG was described as an example, but the encoding bit rate can be made variable and the quantization step can be performed in 8 × 8 pixel blocks, 16 × 16 pixel blocks, frames, fields,
The present invention can be applied to other image coding schemes that can be changed in units of a sequence in which frames (fields) are collected.

The bit rate controller 2 shown in FIG.
In 6, the threshold value Mth for determining whether or not to perform the bit rate change processing is set to 20, but may be a numerical value other than this. Further, the grouping of the average quantization scale values is performed as shown in FIG. 6, but other grouping methods may be used. Also, change the bit rate by 0.1Mbps
This was done by increasing or decreasing each time, but other than this may be used. The flowchart in FIG. 4 is an example,
This modification may be used as long as the same control is performed using the quantization information (quantization scale).

Next, a description will be given of a second embodiment of the image encoding / multiplexing apparatus according to the present invention. FIG. 7 is a block diagram illustrating a configuration example of an image coding and multiplexing device according to the second embodiment. In the second embodiment, an image encoding circuit 16 and a system multiplexing circuit 36 are added in order to add new stream data to the first embodiment.

That is, FIG. 7 shows that the image encoding circuits 10, 12, 14 and the system multiplexing circuits 30, 32, 34 perform the encoding / multiplexing operation as described in the first embodiment. In this case, the image coding circuit 16 and the system multiplexing circuit 36 are newly added. It is assumed that the output rate of the program multiplexing circuit 40 does not change even if such a new addition is made.

In FIG. 7, the image encoding circuit 16 includes the image encoding circuits 10, 12, and 14 described in the first embodiment.
And has the same operation. The system multiplexing circuit 36 is the same as the system multiplexing circuits 30, 32, and 34 described in the first embodiment.

Each of the image encoding circuits 1 before the image encoding circuit 16 and the system multiplexing circuit 36 are added.
The bit rates and quantization information (average quantization scale per sequence) of 0, 12, and 14 are 2 Mbps, 4 Mbps, and 6 Mbps as shown in FIG. 8, and a newly added image coding circuit 16 is used. Is set to be assigned to 1 Mbps.

Hereinafter, the operation of the image encoding control circuit 20 according to the present embodiment will be described. Image coding control circuit 20
Is the same as that shown in FIG.
2. The operation of the bit rate memory 24 is the same as in the first embodiment. On the other hand, bit rate controller 2
6 performs the operation shown in the flowchart of FIG. 9 as an example.

In FIG. 9, first, in step S21, the minimum value Min is selected from the average quantization scale per sequence of the existing image encoding circuits 10, 12, and 14. In the next step S22, the minimum value Min of the average quantization scale selected in step S21 (or the small quantization scale selected in step S25 described later)
The ratio of the bit rate of the image coding circuit 16 to be newly added (or the shortage thereof) to the bit rate of the image coding circuit corresponding to. If the obtained value is equal to or smaller than the predetermined value N, the process proceeds to step S26, where the predetermined value N
If it is larger, the process proceeds to step S23.

Here, N is a coefficient to be within the variable range of the bit rate of each image coding circuit, and the bit rate * N of the sum of the image coding circuits 10, 12, and 14 before being added is added. N and the additional bit rate are set so as to be within the minute bit rate.

In step S23, the bit rate of the minimum value Min of the average quantization scale selected in step 21 (or the small quantization scale selected in step S25) is multiplied by the coefficient N described above. In step S24, the bit rate obtained in step S23 is subtracted from the bit rate of the additional portion (insufficient portion), and this is set as the bit rate of the additional portion (insufficient portion).

In step S25, a quantization scale smaller than the minimum value Min (or smaller quantization scale) of the average quantization scale previously obtained is selected. And
Returning to step S22, the loop processing of steps S22 to S25 is repeated. In step S22, the minimum value Min selected in step S21 is used at first,
In the second and subsequent loops, the value selected in step S25 is used.

On the other hand, in step S26, step S2
If the processing in steps S3, S24, and S25 has been performed, the bit rate is changed to a value obtained by subtracting B * N from the bit rate of the corresponding image encoding circuit in step S23, and the flow proceeds to step S26. The bit rate is changed from the bit rate of the image coding circuit corresponding to step S22 to a value obtained by subtracting the "additional (deficient) bit rate" which is the numerator of step S22, and the bit rate of the additional image coding circuit is changed. To change.

The processing of each step shown in FIG. 9 will be applied to the case of FIG. Here, the value of N is, for example, 0.
33. In this case, the minimum value M of the average quantization scale
“in” is for the image encoding circuit 14, and the encoding bit rate of the image encoding circuit 14 is changed from 6 Mbps to 5 Mbps as shown in FIG. 8 by the processing of FIG. Then, image coding and multiplexing are performed according to the changed bit rate.

As described above, in the second embodiment, the coding bit rate (the amount of generated information) is reduced from an image program in which the average quantization scale per sequence is small and image quality hardly deteriorates. Is assigned to a new image program, so even when a new stream is added, it is possible to reduce the image quality deterioration of the image program before the addition.

In the embodiment of FIG. 7, one image coding circuit to be newly added and three image coding circuits before addition are added.
As described above, the number may be any other number as long as it is newly added to a plurality of image encoding circuits. Also,
The image coding circuit to be added can be similarly applied if it is one or more. The flowchart in FIG. 9 is an example, and any modification may be used as long as similar control is performed using quantization information (quantization scale).

Although the value of the coefficient N in FIG. 9 has been described as 0.33, other values may be used. The applicable image coding scheme is the same as in the first embodiment. Furthermore, in the second embodiment, the example in which the number of programs to be multiplexed is increased has been described. However, the number of coding programs is constant, and the present invention is also effective when the transmission rate is reduced in accordance with congestion on the transmission path.

[0074]

As described above, according to the present invention,
In an image coding and multiplexing apparatus for coding a plurality of types of image data and multiplexing the plurality of types of image data, image coding control means for controlling the coding rates of the plurality of types of image data is provided. When encoding data, the encoding rate of each image data can be appropriately controlled so that the image quality of each image data can be reduced.

Thus, for example, when image encoding is performed by a plurality of programs, and the image encoded data is multiplexed into one stream and transmitted at a fixed rate, the image encoding by a program that causes little image quality deterioration The amount of generated information of data can be reduced in part, and the reduced amount can be assigned to image encoded data by a program with large image quality degradation, and image quality degradation in programs with large image quality degradation can be reduced. it can. Therefore, a good decoded image can be obtained with the encoded image data of any program.

In a state where image encoding is performed by a plurality of programs and the image encoded data is multiplexed into one stream and transmitted, the image encoded data by the additional program is newly multiplexed or transmitted. When the rate is reduced, by reducing a part of the amount of generated information of the image coded data by the program such that the image quality is less deteriorated, even if the amount of information is allocated to the additional program or the transmission rate is reduced, Image quality deterioration in the original program can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a first embodiment of an image encoding / multiplexing apparatus according to the present invention.

FIG. 2 is a block diagram illustrating a configuration example of an image encoding circuit in FIG. 1;

FIG. 3 is a block diagram illustrating a configuration example of an image encoding control circuit in FIG. 1;

FIG. 4 is a flowchart for explaining an operation of the first embodiment by the bit rate controller of FIG. 3;

FIG. 5 is a diagram for explaining the flowchart of FIG. 4;

FIG. 6 is a diagram for explaining the flowchart in FIG. 4;

FIG. 7 is a block diagram showing a second embodiment of the image coding and multiplexing apparatus of the present invention.

FIG. 8 is a diagram for explaining the operation of the image coding and multiplexing device of FIG. 7;

FIG. 9 is a flowchart for explaining the operation of the second embodiment by the bit rate controller of FIG. 3;

FIG. 10 is a block diagram showing a conventional example of an image encoding / multiplexing apparatus.

11 is a block diagram illustrating a conventional example of the image encoding circuit in FIG.

[Explanation of symbols]

 10, 12, 14, 16 Image coding circuit 20 Image coding control circuit 22 Quantization scale memory 24 Bit rate memory 26 Bit rate controller 30, 32, 34, 36 System multiplexing circuit 40 Program multiplexing circuit 129 Rate control circuit

Claims (8)

[Claims] A plurality of image encoding means for encoding image data of a plurality of programs; an image encoding control means for controlling an encoding rate of each of the plurality of image encoding means; and a plurality of image encoding means. Multiplexing means for multiplexing the output from the means. 2. The image coding and multiplexing method according to claim 1, wherein said image coding control means controls said coding rate using quantization information of said plurality of image coding means. apparatus. 3. The image encoding control unit includes: a quantization information storage unit that stores quantization information output from the plurality of image encoding units; and an encoding rate output from the plurality of image encoding units. Coding rate storage means for storing information; rate control means for controlling coding rates of the plurality of image coding means based on an output of the quantization information storage means and an output of the coding rate storage means, respectively. 2. The image coding and multiplexing apparatus according to claim 1, comprising: 4. The image encoding and multiplexing method according to claim 1, wherein said plurality of image encoding means and said multiplexing means generate encoded data according to an MPEG system. Device. 5. The image encoding means and the multiplexing means generate encoded data according to the MPEG system, and the image encoding control means uses a quantization scale of the image encoding means. The image coding and multiplexing apparatus according to any one of claims 1 to 3, wherein the coding rate is controlled by controlling the coding rate. 6. The image encoding control means reduces the encoding rate of the image encoding means to which the minimum quantization scale is assigned among the plurality of image encoding means, and sets the maximum quantization scale to be smaller. 6. The image coding and multiplexing apparatus according to claim 5, wherein control is performed to increase the coding rate of the allocated image coding means. 7. The image coding control means for controlling the coding rate of each image coding means while keeping the total coding rate of the plurality of image coding means constant. 7. The image coding and multiplexing device according to 6. 8. The image encoding means, wherein the encoding rate of the image encoding means to which a smaller quantization scale is assigned among the plurality of image encoding means is newly added. 6. The image coding and multiplexing apparatus according to claim 5, wherein the control is performed such that the coding rate is reduced by the coding rate.