JPH09275563A - Compressed image data decoding device having osd function and osd data compression method used for the decoding device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain an OSD function via a general-purpose memory by reducing the capacity of a frame memory against a B picture, storing the compressed on-screen display data in a memory, and expanding the display data in response to their display. SOLUTION: The compressed bit map-shaped OSD data are directly written into a position of a memory 13 by an OSD writing circuit 6 and with the timing that is shown by a timing/operation setting circuit 1. Then the OSD data are read out by an OSD data reading circuit 12 with the timing shown by the circuit 1 and supplied to an OSD data expanding circuit 14. Thus the compressed OSD data are expanded by the circuit 14 and restored into the OSD data corresponding to the original bit map. Then the restored OSD data are supplied to a display circuit 5 synchronously with a display synchronizing signal and overlaid the decoded image data for display.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device for decoding compressed image data generated by a high-efficiency coding means using inter-frame correlation, and in particular, an on-screen display (OSD: On Screen) using a memory provided in the decoding device. The present invention relates to a compressed image data decoding device that realizes a (Display) function.

[0002]

2. Description of the Related Art Due to the large amount of image data, the compressed image data (hereinafter referred to as encoded data) is transmitted or recorded after being compressed by a high efficiency encoding means for removing redundancy. The transmission or recording cost can be reduced. As an example of this high efficiency coding means, IS
The MPEG system standardized by O / SC29 / WG11 is well known, and a high-efficiency encoding means of the MPEG system is introduced in Television Society Vol. 48, No. 1, pp. 44-49.

3 and 4 are views showing a part of the MPEG system. As shown in FIG. 3, one picture corresponds to an NTSC signal of a television signal, and vertical 480 lines x side
As a luminance signal of 720 pixels and two types of vertical 240 lines x horizontal 360 pixel color signals and PAL signals, 576 lines vertical x 720 horizontal pixels luminance signal and two types of vertical 288 lines x horizontal 3
It corresponds to one frame of a television signal composed of color signals of 60 pixels. Furthermore, in a picture, image data is handled in units called macroblocks in which a luminance signal is divided into vertical 16 pixels x horizontal 16 pixels, and two types of color signals are each divided into vertical 8 pixels x horizontal 8 pixels. Encoding is performed sequentially from left to right in the horizontal direction of the screen in units.

Further, as shown in FIG. 4, each frame of image data includes only an I picture (I1 in the figure) that is encoded without a reference picture to be referred to as a prediction value, and a picture in the forward direction in the display order. P-picture (reference picture)
P2, P5), B pictures with forward and backward pictures as reference pictures (B3, B4, B6 in the figure,
It is classified into B7). In actual encoding, two reference pictures, one in the forward direction and one in the backward direction, must exist when decoding a B picture, and the order of the pictures must be skillfully changed before encoding. , Different from the display order.

On the decoding side, the coded data sent in the order of coding is sequentially decoded. The decoded image data is temporarily stored in the memory and rearranged in the order of display. Also, the decoded data of I and P pictures must be used as reference pictures when decoding subsequent B pictures, and must be 2
It is necessary to store image data for the picture in the memory. Furthermore, since one frame is encoded as one picture, if one frame consists of two interlaced fields like a television signal,
Even a B picture cannot be displayed at the same time as decoding. The frame data needs to be converted to field data, which requires a delay of at least 0.5 frame period from decoding to display. This requires the decoded data to be stored once in the memory for the conversion of the frame data into the field data, and in general requires a memory area for one picture.

FIG. 5 is a diagram showing a memory required for decoding encoded data by the MPEG method. The memory has a 16-bit data width, 512 columns x 2048 rows, and has a capacity of 16 Mbit. 16Mbit capacity memory is used in various fields as a general-purpose memory chip.
It is important to configure the decoding device within the memory capacity range in terms of cost. The memory area division in FIG. 5 shows a case where compressed image data corresponding to the PAL method with a large image size is decoded. In the PAL system, a total of 608 rows of 405 rows for luminance signals and 203 (rounded up to the nearest whole number) for chrominance signals are required for one frame, and the rest of the equivalent of 3 frames is the encoded data for decoding. Is used as a coded data buffer for temporarily storing. The capacity of this encoded data buffer is 1,835,008 bits (2
(24 rows), and this capacity value is defined as the minimum capacity that must be observed to ensure proper encoding / decoding with any combination of encoders and decoders. There is.

[0007]

According to the conventional technique described above, it is possible to realize a decoding device for compressed image data which makes the most effective use of the capacity of a 16 Mbit memory which is easily available as a general-purpose memory.

On the other hand, an OSD (On Screen Display) for overlaying characters and graphics on a decoded image and displaying it as a user interface of a decoding device for compressed image data.
Is effective. However, in order to realize such an OSD, a new memory area is required, and in the case of the image corresponding to the PAL method with a large image size described above, 16 Mbit
It goes beyond the general-purpose memory of.

An object of the present invention is to solve the above-mentioned problems, that is, to secure a memory area for OSD data in a frame of 16 Mbit capacity, and to use it for a compressed image data decoding device having an OSD function, as well as for this device. It is to provide a method of compressing OSD data.

[0010]

In order to achieve the above object, according to the present invention, a means for decoding compressed image data, compressed image data, decoded image data obtained by decoding compressed image data, and compressed on-screen display data are provided. Using the memory means for storing / holding, the expanding means for the compressed on-screen display data, and the displaying means for displaying the decoded image data and the expanded on-screen display data in synchronization with each other, Is smaller than the frame memory area for storing the reference picture.

Further, as the on-screen display data compression method, the first method is to divide the on-screen display data into blocks which are a set of a plurality of pixels continuous in the display scanning direction, and code the number of consecutive pixels in each block. It is possible to select any one of the encoding means, the second encoding means for regularly thinning out consecutive pixels, and the non-compressed data. Furthermore, when the compression result for the first field data to be compressed earlier does not reach the predetermined standard, the on-screen display data in which the first field compressed data is discarded and the uncompressed second field data is compressed And

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a first example of a decoding apparatus for compressed image data according to the present invention, in which 1 is a timing / operation setting circuit,
2 is a parser / variable length decoding circuit, 3 is a dequantization / IDCT circuit,
4 is a motion compensation circuit, 5 is a display circuit, 6 is an OSD data writing circuit, 7 is an encoded data writing circuit, 8 is an encoded data reading circuit, 9 is a motion compensation data reading circuit, 10 is a decoded data writing circuit, 11 Is a display data read circuit, 12 is an OSD data read circuit, 13 is a memory, and 14 is an OSD
This is a data expansion circuit.

The compressed image data (encoded data) is a parser
It is input to the variable length decoding circuit 2 and further stored in the encoded data buffer area of the memory 13 via the encoded data writing circuit 7. The timing / operation setting control circuit 1 has the function of adjusting the data bus contention of the memory 13 in addition to setting the operation mode of each block. Further, the coded data read control circuit 8 reads the coded data stored in the coded data buffer area in synchronization with the sync signal of the display system at a rate of one picture (= frame) in one frame period according to the storage order. .

The encoded data read from the memory 13 is
It is input to the parser / variable length decoding circuit 2 again. The parser
The parser part of the variable length decoding circuit 2 extracts the coding mode information in the header part of the encoded data, and also uses it in the internal variable length decoding part, and also outputs it to the timing / operation setting control circuit 1, Inverse quantization / IDCT (Inverse Discrete Cosine Transform)
The operation mode of each circuit such as the circuit 3, the motion compensation circuit 4, and the display circuit 5 is set. The variable length decoding unit of the parser and variable length decoding circuit 2 mainly decodes variable length coded cosine transform coefficient data, etc., and performs inverse quantization and IDCT.
(Inverse Discrete Cosine Transform) Send to circuit 3.

Inverse quantization / IDCT (inverse discrete cosine transform) circuit
In 3, the inverse quantization unit restores the coefficient data to an appropriate scale, and the IDCT unit converts it into image data.

The motion compensation circuit 4 uses the motion vector information in the encoded header information obtained from the parser / variable length decoding circuit 2 and, via the motion compensation data read control circuit 9, stores the image data of the reference picture from the memory 13. Read out. Further, the image data of the reference picture is added to the image data generated by the IDCT section to obtain decoded data. The decoded data is stored in the memory via the decoded data writing circuit 10.
Write to 13. However, when the decoded data is the image data of the I or P picture, the older stored data in the reference picture area of the memory 13 is updated. Write in the frame area.

The decoded data decoded as described above and written in the memory 13 is read by the display data read control circuit 11 and sent to the display circuit 5. The display circuit 5 is
The decoded data read from the memory 13 is subjected to, for example, a pixel rate conversion process, and the OSD data reading circuit 12 overlays the OSD data read from the memory 13 as described later and outputs the OSD data as image data.

FIG. 6 is a diagram showing area division of the memory 13 in consideration of storing OSD data. The reference picture area and the encoded data buffer area of the two planes are the same as in the conventional example shown in FIG. 5, but the B picture area is allocated less than in the conventional example shown in FIG. As a method of reducing the B picture area, the horizontal pixel density of the color data in the B picture can be subsampled to 1/2 and stored in the memory 13 to be 5/6. Sub-sampling the color data to 1/2 the horizontal pixel density may cause a slight deterioration in image quality.
Since the B picture has the property that it is not reused as a reference picture, deterioration of image quality is more easily tolerated than that of I and P pictures, and deterioration of image quality does not pose a problem.

As a result, 101 rows worth of OSD data are stored,
827,392 bits can be allocated. This capacity is 576 vertical lines x OSD picture size equivalent to the PAL system.
In the case of 704 horizontal pixels, when the OSD data is stored in the memory 13 as bitmap data, each pixel has approximately 2 bits. With 2 bits per pixel, it is possible to express 4 colors of OSD, but to realize a better user interface, OS
It is necessary to increase the number of colors of D.

In the example shown in FIG. 1, OSD bitmap data is stored in the memory 13 in a compressed data format.
The compressed OSD data obtained by compressing the bitmap OSD data is directly input to the OSD writing circuit 6, and the OSD writing circuit 6
The compressed OSD data is written at the timing indicated by the timing / operation setting circuit 1 and at the position on the memory 13.

The compressed OSD data is read by the OSD data read circuit 12 at the timing indicated by the timing / operation setting circuit 1, and the OSD data expansion circuit 14 is read.
To supply. In the OSD data decompression circuit 14, the compressed OSD
The data is decompressed and restored to the OSD data corresponding to the original bitmap. The restored OSD data is supplied to the display circuit 5 in synchronism with the display synchronization signal, and is overlaid on the decoded image data.

FIG. 2 shows a second embodiment of the present invention,
In addition to the embodiment shown in FIG. 1, including the OSD data compression circuit 15 inside, receives the OSD data in the form of a bitmap from the outside, compresses it with the OSD data compression circuit 15, and through the OSD data writing circuit 6. , Is written in the memory 13.

7 to 11 show a method of compressing bitmap OSD data, and FIG. 7 shows an OSD picture composed of bitmap OSD data and an OSD block which is a compression unit. ing. The OSD picture has almost the same size as the picture shown in FIG.
Corresponding to AL type images, it has a size of 576 vertical pixels x 704 horizontal pixels. Although the number of horizontal pixels is slightly smaller than the size in Fig. 3, considering the overscan of the television receiver,
You can ignore the difference between the two. Further, this OSD picture is divided into OSD blocks of 1 pixel in the vertical direction and 88 pixels in the horizontal direction, and the OSD data is compressed in units of this OSD block.

FIG. 8 shows a codebook used for compressing OSD data. The OSD data per pixel is 4 bits in order to make the number of colors 16 colors, and this codebook is applied when performing run length compression. Each code consists of a prefix part consisting of 0, 2, 4, and 6 "0" s, a length length part, and an OSD pixel data part, and the OSD pixel data shown in the pixel data part is the continuous length shown by the length length part. Indicates that you are doing.

FIG. 9 shows a compressed OSD data stream. As described later, as the form of OSD data, uncompressed bitmap data, run-length compressed data to which the run-length codebook is applied, horizontal sub-sampled compressed data sub-sampled in the horizontal direction,
There are four types of vertical sub-sampled compressed data that are sub-sampled in the vertical direction.
A compression method identification header is added to the beginning of the block, and subsequently, OSD data in the form shown in the identification header is arranged. The vertical sub-sample compressed data is applied to all the OSD blocks of the OSD picture, and the identification header only needs to be provided once for each OSD picture.

FIG. 10 shows a compression method in the OSD block. The compression of the OSD data may be performed outside the decoding device as in the first embodiment, or may include a compression circuit inside the decoding device as in the second embodiment. A description will be given on the assumption that compression is performed by a compression circuit inside the decoding device, corresponding to the second embodiment.

Prior to the compression of the OSD block, the address in the memory 13 from which the OSD should be written is set, and the amount of data a generated in the block a is initialized. Subsequently, one block of bitmap OSD data is received and temporarily stored in a buffer inside the OSD data compression circuit 15. Thus, the OSD block size corresponds to this buffer size. When the OSD data compression circuit 15 is included in the decoding device as in the embodiment of FIG. 2, it is possible to reduce the buffer size by dividing the pixels in one horizontal scanning period and forming the OSD block small. Has been.
After that, while reading data from the buffer, run-length compression is performed by applying the codebook shown in FIG. At this time, the amount of generated data in the block is calculated and held in the register a. If the pixel size of one OSD block is 88 pixels, the original is 4 bits / pixel, so the identification header is 2 bits.
Considering the minute, when the generated data volume a exceeds 354bit,
Since compression is not achieved by applying the codebook, the run length compression result is discarded, uncompressed data in the buffer is selected, and the generated data amount a is set to 354 bits.

Subsequently, the generated data amount b in the picture is updated. OS of 4bit / pixel in the storage area equivalent to 2bit / pixel
In order to store the D data, it is necessary to set the compression rate to about 50%. Here, the cumulative value of the difference between the generated data amount a of one OSD block and the target value 176 bits is calculated in the register b1.
If the value of this register b1 is less than 0, the target compression has been achieved, but if it exceeds 0, the target has not been achieved. Therefore, when b1 exceeds 0, horizontal sub-sampling is performed by thinning out the OSD data at a ratio of 1 pixel to 2 pixels. When horizontal sub-sampling is performed, the generated data amount of one OSD block is 178 bits including the identification data of 2 bits, so the register of the generated data amount b in the picture is set to b so that the accumulated difference value b is updated by 2 bits. Update to + 2bit.
Also, in the OSD block with horizontal subsample selected,
Since reversible compression is not performed and distortion remains in the compression result,
This OSD block as a violation block,
Add 1 to the violation block count value c.

When b1 is smaller than 0, the desired compression has been achieved. Therefore, b1 is substituted for b and the values of the registers a and b are output as compression rate data to an external microcomputer or the like. , Inform the compression status. This ensures that if compression is significantly higher than the goal,
It is possible to improve the usability such that the number of OSD pictures stored in the OSD data area in the memory 13 can be plural.

FIG. 11 shows a case where vertical sub-sampling is applied in the compression of OSD data. The data of OSD picture is sequentially compressed from the OSD block of the first field.
b, as well as the register of the violation block count value c is initialized.

When the compression of the first field is completed,
Looking at the data generation amount b of the first field and the violation block count value c, b is greater than the target, or c
If is larger than a predetermined number Cth, the vertical sub-sample is applied. That is, while receiving the OSD data of the second field, by adding identification data only to the first OSD block, in the OSD data area of the memory 13 where the OSD data of the first field is stored, in the first OSD block The OSD data in the second field, including the identification data added to only the above, is overwritten without being compressed. The OSD expansion circuit 14 is
Looking at the identification header read first, if vertical sub-sampling is applied, the display period of the first field,
The same OSD data stored in the memory 13 is read during the display period of the second field.

Further, b is less than the target and c is a predetermined number Cth.
If the number is smaller, the OSD data of the second field is compressed by the same process as the OSD data of the first field.

As a result, the OSD data is compressed by 50% (actually
0% + identification data) achieved, OSD storage capable of developing 16 colors
The display function can be realized.

Further, in this compression method, the OS after compression is performed.
Since the D data amount can be within the target value or the target value + identification header, multiple small OSD pictures are stored in the OSD data area of the memory 13, and the OSD display can be selected from the multiple OSD pictures. Even when the OSD display is designed so that it is displayed and the display switching response is enhanced,
Since the storage start position of the OSD data corresponding to each OSD picture can be set to a fixed address of the memory 13, there is an advantage that it is easy to rewrite each piece of OSD data separately. .

[0036]

As described above, according to the present invention, the capacity of the 16Mbit memory, which is easily available as a general-purpose memory, is used to the maximum extent possible, and in addition to decoding compressed image data, characters and graphics are overlaid on the decoded image. OS to display
D becomes feasible.

[Brief description of drawings]

FIG. 1 is a first embodiment of the present invention for inputting compressed OSD data.

FIG. 2 is a second embodiment of the present invention for inputting bitmap OSD data.

FIG. 3 is a diagram showing a structure of image data in a victim.

FIG. 4 is a diagram showing a structure of image data between victims.

FIG. 5 is a conventional example showing memory area division.

FIG. 6 is an example showing a memory area division including an OSD data storage area.

FIG. 7 is a diagram showing the structure of OSD data and the encoding order.

FIG. 8: Run-length compression codebook applied to OSD data

FIG. 9 is a diagram showing a state of a compressed OSD data stream.

FIG. 10 is a diagram showing a compression method at the OSD block level.

FIG. 11 is a diagram showing a compression method at the OSD picture level.

[Explanation of symbols]

1 …… Timing / operation setting circuit, 2 …… Parser / variable length decoding circuit, 3 …… Inverse quantization / IDCT circuit, 4 …… Motion compensation circuit, 5 …… Display circuit, 6 …… OSD data writing circuit, 7 ...
… Encoded data write circuit, 8 …… Encoded data read circuit, 9 …… Motion compensation data read circuit, 10 ……
Decoded data writing circuit, 11 ... Display data reading circuit, 12 ... OSD data reading circuit, 13 ... Memory, 14
...... OSD data expansion circuit, 15 …… OSD data compression circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor, Jinichi Hori, 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo, Ltd., Semiconductor Business Division, Hitachi, Ltd. (72) Inventor, Takashi Nakamoto 5-20-1 Stock Company, Hitachi, Ltd. Semiconductor Division (72) Inventor Masa Hase 5-20-1 Kamisuihonmachi, Kodaira-shi, Tokyo Hitachi Ltd. Semiconductor Division

Claims (6)

[Claims] 1. An apparatus for decoding and displaying compressed image data, which stores decoding means for compressed image data, compressed image data, decoded image data obtained by decoding compressed image data, and compressed on-screen display data.・
A memory means for holding, a means for expanding compressed on-screen display data, and a display means for displaying the decoded image data and the expanded on-screen display data in synchronization are provided, and the compressed image data requires a reference image. Intra-frame pictures that are not specified, inter-frame pictures that use only the images that are in the forward direction in the display order as reference images, and bidirectional pictures that use images that are both forward and backward in the display order as reference images The data is coded in three types, the memory means includes first and second frame memory areas for storing inter-frame pictures or decoded image data of the inter-frame pictures, and a size smaller than these frame memory areas. And the bidirectional pic A third frame memory area for storing the decoded image data of the tea,
It has a storage area for compressed on-screen display data and a storage area for compressed image data, and the memory means is connected to a decoding means for compressed image data and a display means by a common data bus. Decompressor for compressed image data. 2. The compressed image data decoding device according to claim 1, wherein the image data has a maximum size of 576 vertical lines and 720 horizontal pixels, and the memory means is
Decoding device for compressed image data, which has a capacity of 6,777,216 bits. 3. The compressed image data decoding apparatus according to claim 1, further comprising: on-screen display data compression means for inputting and compressing bit-mapped on-screen display data. Decompressor for compressed image data. 4. The decoding device for compressed image data according to claim 3, wherein the compression means for the on-screen display data outputs compression result information. 5. The on-screen display data is divided into blocks, which are a set of a plurality of pixels continuous in the display scanning direction, and the number of consecutive pixels is coded for each block.
Compressed data is obtained by regularly thinning out consecutive pixels,
Compressing on-screen display data, characterized in that either compressed data or non-compressed data can be selected to generate compressed on-screen display data for use in the compressed image data decoding device according to claim 1. Method. 6. The on-screen data compression method according to claim 5, wherein the on-screen display data is divided into first field data and second field data in accordance with the display of the decoded image data. When the compression result for the first field data to be compressed in advance does not reach the predetermined standard, the compressed data of the first field is discarded and the uncompressed second field is compressed.
A method for compressing on-screen display data, which is characterized in that field data is compressed on-screen display data.