JPH09232760A - Multilayered printed-wiring board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lessen the areas occupied by via holes to in crease the density of a multilayered printed-wiring board by a method wherein the first and second via holes are formed by superposing in first and second photosensitive resin layers in the thickness direction. SOLUTION: A first via hole 58 is formed in a first photosensitive resin layer 56. A circuit pattern 60 is formed on the resin layer 56. At this time, a copper plating is applied also to the inner surface of the hole 58. As this result, a first via hole 62, through which a circuit pattern 54 and the pattern 60 are connected with each other, is completed. A second photosensitive resin layer 66 having a second via hole 64 is further formed on the resin layer 56. A circuit pattern 68 is formed on the resin layer 66. At this time, a copper plating is applied simultaneously also to the inner surface of the holes 62 and 64. As a result, a second via hole 70 is formed in the hole 62 and the patterns 54 and 68 can be connected with each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board for connecting different layers by a via hole and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a multilayer printed wiring board, a via hole (also referred to as a via hole) is provided for making electrical connection between different layers. It is conventionally known to use a photosensitive resin to form the via hole.

FIGS. 3 and 4 are views showing a structure example of a via hole using a conventional photosensitive resin. In FIG. 3, two adjacent layers are connected to each other. The circuit pattern 12 is formed on the insulating layer 10 by, for example, the subtractive method. Another insulating layer 14 is laminated thereon, and the circuit pattern 16 is formed thereon again by, for example, an additive method.

Here, the subtractive method is applied to the insulating layer 10.
A dry film is attached to a copper foil previously attached to the surface of the substrate, an etching resist film is formed by exposure and development, and the circuit pattern is formed by etching. In addition, the additive method forms a negative pattern with plating resist after applying electroless copper plating, removes the plating resist after applying electrolytic copper plating, and further removes unnecessary electroless copper plating layer by quick etching. It is a thing.

A photosensitive resin 18 is applied on the insulating layer 14. If the photosensitive resin 18 is sheet-shaped, it is laminated. A mask film (not shown) is overlaid on the photosensitive resin 18 and exposed with light having a predetermined wavelength (for example, ultraviolet rays). In the case of a photo-curable resin, the mask film has a pattern in which the position corresponding to the via hole is black and the other parts are transparent.

The via hole 20 is formed by exposing the photosensitive resin 18 to light and then developing it. Then, the circuit pattern 22 is formed on the upper surface of the cured photosensitive resin 18 by the additive method. At this time, a plating layer is also formed on the inner surface of the via hole hole 20, and the circuit pattern 16 and the 2
A via hole 24 connecting between the two is completed.

By sequentially forming the via holes 24 formed by using the photosensitive resin 18 between the circuit patterns of three or more layers adjacent to each other as described above, it is possible to connect the layers of three or more layers. FIG. 4 shows an example thereof. In this example, the circuit pattern 12 is formed on the insulating layer 10 by, for example, the destructive method, and the photosensitive resin 18 is applied or laminated thereon to form the via hole 24 described in FIG.

That is, the mask films are overlapped and exposed,
The first via hole hole 20 is formed by developing,
The first via hole 24 is formed by forming the circuit pattern 22 thereon by the additive method. Another photosensitive resin 26 is further applied or laminated on the photosensitive resin 18. At this time, the inside of the via hole 24 is filled with the resin 26 flowing therein.

A mask film (not shown) is superposed on the photosensitive resin 26, exposed, and developed to
The second via hole hole 28 is formed. When the circuit pattern 30 is formed on the photosensitive resin 26 by the additive method, a conductor layer is also formed on the inner surface of the via hole hole 28, and the second via hole 32 is formed. As a result, the circuit pattern 12 of the lowermost layer and the circuit pattern 22 of the upper layer are connected by the first via hole 24, and the circuit pattern 22
And the uppermost circuit pattern 30 are the second via holes 32.
Connected by

It is also possible to use through holes to connect different layers. This through hole 34 is also shown in FIG. This through hole 34 is
It is formed by a known method. That is, it is formed by a method in which a small hole is formed in a laminated substrate using a drill, and the inner surface of the laminated substrate is electrolessly copper-plated to have conductivity, and then electrolytic copper-plating is performed.

[0011]

2. Description of the Related Art In the conventional method using via holes as described above, the via hole 2 is formed in each adjacent layer.
It was necessary to form 4, 32 separately. The size of the occupied area of the via holes 24 and 32 in this case will be examined.

The hole diameter a of the via holes 24 and 32 is usually 0.
It is 1 mm (diameter), and the width b in the radial direction of the lands 22A and 30A connected to the via holes 24 and 32 needs to be at least 0.05 mm. Therefore, even if the two via holes 24 and 32 are closest to each other, (2a + 3b) = 0.35 mm is required as shown in FIG.

In this case, two via holes 24 and 32 are provided.
The dimension in the lined-up direction is 0.35 mm, and the dimension in the direction orthogonal to this is (a + 2b) = 0.2 mm.

When the through hole 34 is used, the diameter of the through hole 34 is limited to 0.3 mm because the drill hole of the through hole 34 is processed, and the width of the land 36 of the through hole 34 in the radial direction is at least 0. .05 mm is required. Therefore, the occupied size in this case is (0.3 + 0.0
5 × 2) = 0.40 mm or more.

Thus, when the two via holes 24 and 32 are used, the occupied dimension is 0.35 mm or more, and when the through hole 34 is used, it is 0.40 mm or more.
Although there is a strong demand for high-density mounting of printed wiring boards, it is necessary to minimize the area occupied by interlayer connection by via holes and through holes. However, in the conventional method, the above-mentioned size becomes a limit, which is an obstacle to high-density mounting.

[0016]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and when a via hole for connecting three or more layers is provided, the area occupied by the via hole is reduced to promote high density packaging. A first object of the present invention is to provide a multilayer printed wiring board that can be manufactured. A second object is to provide a method for manufacturing this multilayer printed wiring board.

[0017]

According to the present invention, a first object of the present invention is to provide a bottom layer circuit pattern formed on an insulating layer in a multilayer printed wiring board in which circuit patterns between three or more layers are connected by via holes. A first photosensitive resin layer overlaid on the pattern and having a first via hole, and a second via hole overlaid on the photosensitive resin layer and over the first via hole; And a second photosensitive resin layer.

A second object is to provide a method of manufacturing a multilayer printed wiring board in which circuit patterns between three or more layers are connected by via holes, wherein a) the lowermost circuit pattern connected by via holes is formed in an insulating layer. B) A photosensitive resin is applied to or laminated on this insulating layer, a mask is overlaid, exposed and developed to form a first via hole hole, and c) the cured resin formed in the step b) above. A circuit pattern is formed on the surface of the photosensitive resin and the inner surface of the first via hole hole by the additive method, and d) the photosensitive resin is further applied or laminated thereon, and the mask is exposed and developed to develop the first pattern. Forming a second via hole hole over the via hole hole, and e) the surface of the photosensitive resin layer formed and cured in step d) and the second via hole. Forming a circuit pattern by an additive method, it is achieved by a method for manufacturing a multilayer printed wiring board, characterized in that.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a view showing a processing step of an embodiment of the present invention, and FIG. 2 is an enlarged view of a completed via hole portion. First, a substrate 50 to be an insulating layer is prepared ((A) of FIG. 1). Copper foils 52, 52 are adhered to both surfaces of the substrate 50. The processing steps for one surface (upper surface) of the substrate 50 will be described here, but in reality, both surfaces are processed simultaneously. In order to simplify the description below, processing of the upper surface will be described.

A circuit pattern 54 is formed on the substrate 50 by a known method. For example, it is formed by a subtractive method such as a photoetching method (FIG. 1B).
This circuit pattern 54 becomes the circuit pattern of the lowermost layer.
On this substrate 10, a photosensitive resin is applied or laminated,
A first via hole 58 is formed in the first photosensitive resin 56 cured by exposure and development ((C) of FIG. 1).

That is, a mask film (not shown) is superposed on an uncured photosensitive resin and exposed to ultraviolet rays to form a latent image of the via hole 58, and the latent image is developed. For example, when a photo-curable photosensitive resin is used, the via hole hole 58
Exposure is carried out using a mask film in which only the black part is black and the other part is transparent. As a result, the unexposed portion of the via hole 58 is removed, and the portion other than this is cured to become the first photosensitive resin layer 56.

A circuit pattern 60 is formed on the first photosensitive resin layer 56 by, for example, an additive method.
That is, electroconductivity is applied to the inner surface of the via hole 58 and the surface of the cured photosensitive resin layer 56 by electroless copper plating, and a portion other than the circuit pattern 60, that is, a negative pattern is covered with a plating resist to perform electrolytic copper plating. Then, the plating resist may be removed and the unnecessary electroless copper plating layer may be removed.

By forming the circuit pattern 60, the inner surface of the via hole 58 is also plated with copper. As a result, the first via hole 62 that connects the circuit pattern 54 of the lowermost layer and the circuit pattern 60 of the upper layer is completed ((D) of FIG. 1).

A second photosensitive resin is further applied or laminated on the first photosensitive resin layer 56, and a second photosensitive resin layer 66 having a second via hole hole 64 is formed by exposure and development. Are formed ((E) of FIG. 1). Here the second
The via hole hole 64 has a larger diameter than the first via hole hole 58 and extends over the land 60A of the first via hole 62.

The uppermost circuit pattern 68 is formed on the second photosensitive resin layer 66 by the above-mentioned additive method or the like. At this time, the inner surface of the first via hole 62 and the inner surface of the second via hole hole 64 are simultaneously copper-plated. As a result, the second via hole 70 is formed over the first via hole 62, and the circuit pattern 54 in the lowermost layer is formed.
Can be connected to the outermost circuit pattern 68 ((F) of FIG. 1). In the figure, 68A is a land of this second via hole 70.

The dimensions of the first and second via holes 62, 70 formed in two steps will be examined with reference to FIG. First, the diameter c of the first via hole 62 is usually 0.1 mm.
Since the second via hole 70 formed on the second via hole 70 needs to partially overlap the land 60A of the first via hole 62, the diameter d of the second via hole 70 is at least 0.1.
It is thought that about 5 mm is required. The radial width e of the land 68A of the second via hole 70 needs to be 0.05 mm. Therefore, the occupied size of the first and second via holes 62, 70 is (d + 2e) = 0.25 mm in diameter.

This result is compared with that of the conventional structure shown in FIG. If the via holes 24 and 32 having the conventional structure are used, the occupied dimension becomes an ellipse of 0.35 mm × 0.20 mm. Further, if the conventional through hole 34 is used, a circular shape having a diameter of 0.40 mm is obtained. On the other hand, according to the present invention, a circular shape having a diameter of 0.25 mm is formed. As a result, the area occupied by the via holes is reduced, and high-density mounting can be promoted.

In the above description, the three-layer circuit pattern 54,
Although the connection between 60 and 68 is made, the present invention is also applicable to a multi-layer structure having three or more layers, and includes such a structure. In this case, two or more via holes connecting adjacent layers are formed so as to overlap each other. Insulating substrate 5
The present invention may be applied to not only one side but also both sides.

[0029]

As described above, the invention of claim 1 is as follows.
First and second formed respectively on the second photosensitive resin layer
Since the via holes are stacked in the thickness direction, the occupied dimension can be made smaller than that of the conventional structure in which via holes for connecting circuit patterns of three or more layers are separately formed. Therefore, it is suitable for high-density mounting of printed wiring boards.

According to the second aspect of the present invention, the method for manufacturing the multilayer printed wiring board can be obtained. Here, the circuit pattern of the lowermost layer can be formed by applying a subtractive method to the copper clad insulating plate.

[Brief description of drawings]

FIG. 1 is a diagram showing a manufacturing process of the present invention.

FIG. 2 is an enlarged sectional view of a via hole portion.

FIG. 3 is a diagram showing a conventional via hole.

FIG. 4 is a view showing a conventional via hole and through hole.

[Explanation of symbols]

 50 Substrate serving as an insulating layer 54 Circuit pattern of the bottom layer 56 First photosensitive resin layer 60 Circuit pattern 60A Land 62 First via hole 64 Second via hole 66 Second photosensitive resin layer 68 Outermost circuit pattern 68A Land 70 Second beer hole

Claims (3)

[Claims] 1. A multilayer printed wiring board in which circuit patterns between three or more layers are connected by via holes, wherein the circuit pattern of the lowermost layer formed in an insulating layer and a first via hole which is overlaid on the circuit pattern are provided. A first photosensitive resin layer formed, and a second photosensitive resin layer that is formed on the photosensitive resin layer and has a second via hole formed on the first via hole. A multilayer printed wiring board characterized by the above. 2. A method for manufacturing a multi-layer printed wiring board in which circuit patterns between three or more layers are connected by via holes, wherein a) a lowermost circuit pattern connected by via holes is formed in an insulating layer, and b) this insulation. Forming a first via hole hole at a via hole position by applying or stacking a photosensitive resin on the layer, exposing it with a mask, and developing it; and c) the surface of the cured photosensitive resin formed in the step b) above. And a circuit pattern is formed on the inner surface of the first via hole hole by the additive method, and d) a photosensitive resin is further applied or laminated on the inner surface of the first via hole, and a mask is overlaid, exposed, and developed to form a pattern on the first via hole. A second via-hole is formed on the surface of the photosensitive resin layer formed and cured in the step d) and the second via-hole. Thereby forming a circuit pattern, a method for manufacturing a multilayer printed circuit board, characterized in that. 3. The method for manufacturing a multilayer printed wiring board according to claim 2, wherein the circuit pattern in the lowermost layer is formed by a subtractive method.