JPH09200214A - Atm cell switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a bus type switch with which the use efficiency of buffer memory can be improved without abandoning any cell at the time of congested state. SOLUTION: A routing header showing the destinations of output means 12 (12a and 12b) is usually added to a cell by input means 11 (11a and 11b) as shown in a path 1A, and the cell is exchanged on a bus 14 based on this routing header and outputted through buffer memory 121 (121a and 121b) of the output means 12 to the outside. When the buffer memories 121 are lightly congested, buffer managing means 122 (122a and 122b) instruct the change of routing header into the destination of memory means 13 to routing header changing means 112 (112a and 112b) and when the buffer memories are heavily congested, the input stop signal of cell is further outputted. Thus, at the time of light congestion, the cell is temporarily stored in an auxiliary memory 131 of memory means 13 as shown in a path 1B and only when the report of reception permission is received from the buffer managing means 122, the cell is transmitted to the output means 12 by an auxiliary memory managing means 132.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus type ATM cell switch using an Asynchronous Transfer Mode (ATM) technique, and more particularly to improvement of its congestion control system.

[0002]

2. Description of the Related Art In recent years, ATM cell switches using ATM technology have been developed. The basic configuration is classified into a common memory type, a common bus type, an input buffer type, an input / output buffer type, a crosspoint buffer type, etc. (for example, NTT R & D 1993 No. 3, VOL. 42). Among these configurations, a general configuration of a common bus type (hereinafter referred to as a bus type) ATM cell switch will be described with reference to FIG.

In FIG. 3, 31a and 31b are input means for inputting cells, and 311a and 311b are input means 31.
a and 31b are provided in the routing header adding means,
32a and 32b are output means for outputting cells, 321 is a buffer memory provided in the output means 32a and 32b, and 322a and 322b are buffer memories 321a and 321b provided in the output means 32a and 32b. The buffer management means 33 for performing the operation is a bus that enables cell exchange.

The operation of this conventional bus type ATM cell switch will be described below. The cell addressed to the output means 32a input to the input means 31 (31a or 31b) is generated from the header information of the cell by the routing header addition means 311, and the routing header indicating the destination of the output means 32a is added and transmitted to the bus 33. To be done. The bus 33 exchanges cells on the basis of the routing header, and transmits it to the output means 32a of the destination. The output means 32a accumulates the received cells in the buffer memory 321a, and the buffer management means 32
This is output according to the instruction of 2a. Normally, the transmission rate of cells on the bus 33 is much faster than the input rate of cells to the input means 31 and the output rate of cells output from the output means 32, so that cells are stored in the input means 31. All of them are stored in the buffer memory 321a of the output means 32a. The buffer management means 322a monitors the capacity of the buffer memory 321a and, when the capacity exceeds a certain threshold value, judges that it is congested, outputs an input stop signal, and limits the input of cells to the bus type ATM cell switch. Instruct them to do so.

[0005]

However, in the conventional bus type ATM cell switch as described above, the buffer memory 32 monitored by the buffer management means 322a is used.
When the threshold value of the capacity of 1a is set to a value on the verge of overflowing the buffer memory 321a, the buffer memory 321a overflows among the cells received from the time when the input stop signal is output until the cell input is stopped. The minute cells will be discarded. In addition, the buffer memory 321a
When the threshold value of the capacity of is set to a low value so as not to cause cell discard, the use efficiency of the buffer memory deteriorates,
There was a problem.

The present invention has been made to solve the above conventional problems, and provides an ATM cell switch which can eliminate the cell discard of the ATM cell switch and improve the use efficiency of the buffer memory. The purpose is to do.

[0007]

In order to solve the above-mentioned object, the invention according to claim 1 provides a plurality of input means for inputting a cell, a plurality of output means for outputting a cell, and one storage means for storing the cell. In an ATM cell switch which is connected to a memory means via a bus and exchanges cells via the bus, the input means generates a routing header indicating a destination of the output means and adds the routing header to the cell. The output means includes a header adding means and a routing header changing means for changing a routing header of a cell addressed to a certain output means to a routing header including the destination information to the certain output means and having the memory means as a destination. , A buffer memory for accumulating cells, and buffer management means for managing cell input to the buffer memory, wherein the memory means is An auxiliary memory that stores cells from the auxiliary memory and outputs the cells to the bus; and an auxiliary memory management unit that manages cell input to the auxiliary memory and output of cells from the auxiliary memory. The cell normally passes through a path exchanged from the input means directly to the output means via a bus, and when the buffer memory is congested, the cell is exchanged from the input means to the output means via the memory means. It is supposed to go through the route.

According to a second aspect of the present invention, in the ATM cell switch, the routing header adding means is
A routing header indicating the destination of the output means is generated based on the header information of the cell and added to the beginning of the cell. The routing header changing means, when receiving the change notification from the output means, sends the change header. Only during the reception, the routing header addressed to the output means which has transmitted the change notification is modified to include the destination information to the output means and indicate the destination of the memory means, and the buffer management means. Sends a change notification to the routing header changing means and a reception permission notification to the memory means for permitting reception by the buffer memory, and the auxiliary memory management means based on the routing header of the received cell. Manages the destination information to the output means, and when the reception permission notification is received from the output means, only when the reception permission notification is received, A cell addressed to the output means that is transmitting the permission notification is transmitted to the bus, and the bus exchanges the cell with the output means or the memory means of the destination indicated by the routing header of the cell. It is a thing.

According to a third aspect of the present invention, in the ATM cell switch, when the holding capacity of the buffer memory exceeds a first threshold value which is a light congestion, a change notification to the input means, and When the reception permission notification to the memory means is transmitted, and when the storage capacity of the buffer memory reaches the second threshold value that is the heavy congestion, the transmission of the reception permission notification is stopped and the input means receives the notification. An input stop signal for stopping the input of cells to the ATM cell switch, and when the holding capacity of the buffer memory becomes less than the second threshold value, a reception permission notification is sent to the memory means. When the storage capacity of the buffer memory becomes less than the first threshold value, the change notification, the reception permission notification, and the transmission of the input stop signal are stopped. The auxiliary memory management means, when receiving the reception permission notification from the output means, while receiving the reception permission notification, transmits the cell addressed to the output means that has transmitted the reception permission notification and is stored in the auxiliary memory. It is something that is supposed to be done.

According to a fourth aspect of the present invention, a plurality of input means for inputting cells, a plurality of output means for outputting cells,
In an ATM cell switch which is connected to one memory means for storing cells via a bus and exchanges cells via the bus, the input means generates a routing header indicating a destination of the output means. A routing header adding means for adding to the cell is provided, and the output means has a buffer memory for accumulating cells, a return means for returning the cell received from the input means to a bus, and a return for the cell input to the output means. , And buffer management means for managing the input of cells to the buffer memory, the memory means accumulating cells from the bus and outputting the cells to the bus, and to the auxiliary memory. And an auxiliary memory management means for managing the cell input of the cell and the output of the cell from the auxiliary memory. From the input means to the output means when the buffer memory is congested, the buffer management means instructs the return means to return the cells directly input from the input means to the output means. The cell addressed to the output means and returned by the means passes through the path exchanged to the output means via the memory means.

According to a fifth aspect of the present invention, in the ATM cell switch, the buffer management means transmits a reception permission notification for permitting reception by the buffer memory to the memory means, and also serves as the return means. , The cell received from the input means is added with a routing header indicating that the cell includes the destination information to the output means and the destination is the memory means, and the cells are transmitted back to the bus, and the memory is stored. The cell received from the means is transmitted to the buffer memory based on the information of the routing header added by the memory means, and the auxiliary memory management means receives the reception permission notification from the output means. Only while receiving this, the reception permission notifications stored in the auxiliary memory are being sent. The cell addressed to the output means is added to the routing header indicating that the cell is addressed to the output means and including the information indicating that the cell is transmitted from the memory means, and the cell is transmitted to the bus. The cell is exchanged with the destination output means indicated by the routing header of the cell or the memory means.

According to a sixth aspect of the present invention, in the ATM cell switch, the buffer management means returns to the return means when the storage capacity of the buffer memory exceeds a first threshold value of light congestion. And sending a reception permission notification to the memory means, and the storage capacity of the buffer memory is heavily congested.
When the threshold value is reached, an input stop signal for stopping the input of the cell of the ATM cell switch is sent to the input means and the holding capacity of the buffer memory is stopped while the transmission of the reception permission notification is stopped. Is less than the second threshold value, a reception permission notification is transmitted to the memory means, and when the holding capacity of the buffer memory is less than the first threshold value, the loopback instruction is issued. When,
The reception permission notification and the transmission of the input stop signal are stopped, and the auxiliary memory management means is stored in the auxiliary memory while receiving the reception permission notification from the output means. Among them, the cell addressed to the output means that has transmitted the reception permission notification is transmitted.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. Hereinafter, the AT according to the first embodiment of the present invention
The M cell switch will be described with reference to the drawings. In FIG. 1, 11a and 11b are a plurality of input means for inputting a cell CL having a fixed code length and consisting of, for example, 48 bytes of actual information and a 5-byte header. 111a and 111b are the input means 11a and 11
It is a routing header adding means provided in b. This is based on the header information of the cell, and the routing header RH including the destination information H12a indicating the destination of the output means as shown in FIG. It is generated and added to the beginning of the cell CL. 112a and 112b are also the input means 11
a routing header changing means provided in a and 11b, which is a routing header addressed to the output means 12a that has transmitted the change notification i only when the change notification i is received from the output means 12a. For example, as shown in FIG. 4B, the header RH is changed to one having the destination information H13 to the memory means 13 at its head and also including the destination information H12a to the output means 12a.

Further, 12a and 12b are output means for outputting cells, and 121a and 121b are the output means 12.
It is a buffer memory for accumulating cells provided in a and 12b. 122a and 122b are the output means 12a and 1
2b is a buffer management unit that manages a buffer memory provided in 2b. For example, the buffer management unit 122a is
The routing header changing means 112a, 112b, ...
The buffer memory 121a is managed by transmitting the change notification i to ... And the reception permission notification j that permits reception by the buffer memory 121a.

Further, 13 is a memory means, and 131 is an auxiliary memory provided in the memory means 13 for accumulating the cells. Reference numeral 132 denotes auxiliary memory management means for managing the auxiliary memory 131. This auxiliary memory management means 132 manages destination information of the cell to the output means 12 based on the routing header RH of the received cell, For example, when the reception permission notification j is received from the output means 12a, only the cell addressed to the output means 12a which is transmitting the reception permission notification j is transmitted to the bus only while the reception permission notification j is being received.
Reference numeral 14 is a bus that enables exchange of cells.

Next, the operation of the ATM cell switch according to the first embodiment will be described with reference to FIGS. 1, 4, 6 and 8. First, at the beginning of cell transmission,
The buffer memory 121 of the output means 12a, 12b, ...
Is less than or equal to the first threshold, which is light congestion (see FIGS. 6 and 8).
(Corresponding to the section A of 1) in this case, in this case, the cell takes the path 1A which is directly exchanged from the input means 11a to the output means 12a via the bus 14.

More specifically, for example, the input means 11a
The cell input to the
Thus, based on the header information of the cell, the destination information H12a indicating the destination of the output means 12a is displayed as in the cell of FIG. 4 (a).
Is added to the routing header RH and transmitted to the bus 14 through the routing header changing means 112a.
The bus 14 transfers the cell CL to its routing header RH.
To the output means 12a of the destination indicated by. The cell CL
Is stored in the buffer memory 121a of the output means 12a, and is output from the output means 12a according to an instruction from the buffer management means 122a. In this way, the path of the cell at this time is the path 1A directly output from the input means 11a, 11b to the output means 12a, 12b via the bus 14.
Will be taken. Here, the transmission rate of cells on the bus 14 is the input rate of cells to the input means 11a and 11b,
And much faster than the output speed of the cells output from the output means 12a, 12b.

Next, the buffer memory 1 of the output means 12a
21a exceeds the first threshold value Tlc, which is light congestion, and enters a congestion state, and the second threshold value Th is further congestion that is heavy congestion.
The operation up to the point c, that is, the operation in the section B of FIGS. 6 and 8 will be described. In this case, the cell takes the path 1B which is exchanged from the input means 11a to the output means 12a via the memory means 13 via the bus 14, for example.

More specifically, first, when the buffer memory 121a of the output means 12a exceeds the light congestion threshold Tlc and becomes in a congestion state, the buffer management means 122a of the output means 12a causes the input means 11a, 11b, ... The change notification i is sent to the routing header changing means 112a, and the reception permission notification j is sent to the memory means 13. Routing header changing means 112a, 1 which received the change notification i
12b, ... While the notification is being received, the change notification i
Only for the cell addressed to the output means 12a that has transmitted, the routing header RH (see FIG. 4 (a)) of the cell has the information H13 indicating the memory means 13 at its head as the destination information, and the cell is Output means I had until then
Including information H12a indicating 2a (see FIG. 4 (b))
Change to

The memory means 13 which has received the reception permission notice j
While receiving the reception permission notification j, the auxiliary memory management means 132 of the cell among the cells accumulated in the auxiliary memory 131 is destined for the output means 12a which has received the reception permission notification j (see FIG. b)) only for its routing header R
As shown in FIG. 4 (c), H has information H2a indicating the output means 12a as its destination information at the beginning thereof, and information H13 indicating that the cell comes from the memory means 13. Output means 12a
Send to In this way, the auxiliary memory management means 132
Is the routing header RH of the cell received from the input means.
It manages to which output means the received cell is to be transmitted, based on the destination information of the output means included in.

As described above, the buffer memory 121a
Capacity of cells accumulated in (buffer memory holding capacity)
Exceeds the light congestion threshold Tlc, the buffer managing means 122a sends a change notification i to the routing header changing means 112a and a reception permission notification j to the memory means 13, but the buffer managing means 122a has accumulated them in the buffer memory 121a. When the cell capacity further reaches the heavy congestion threshold Thc (starting point of section C in FIGS. 6 and 8), the buffer management means 122.
The a stops transmission of the reception permission notification j, and transmits the input stop signal k requesting the input stop of the cell input to the ATM cell switch to the input means 11a, 11b, ....

From this state, when the capacity of the cells accumulated in the buffer memory 121a becomes equal to or more than the light congestion threshold Tlc and less than the heavy congestion threshold Thc (section D in FIGS. 6 and 8), the buffer management is performed. The means 122a transmits the reception permission notification j, and when the cell capacity becomes less than the light congestion threshold Tlc (section E in FIGS. 6 and 8), the change notification i, the reception permission notification j, and the input stop signal. Stop sending k. At this time, the output means 12 is stored in the auxiliary memory 131.
The cell addressed to a does not remain.

In the above operation, when the capacity of the cell accumulated in the buffer memory 121a of the output means 12a exceeds the light congestion threshold Tlc, the buffer management means 122a of the output means 12a transmits the change notification i. According to the routing header changing means 112 of the input means 11a.
a is the output means 12 that has transmitted the change notification i as described above.
Only for the cell addressed to a, the routing header RH of the cell (FIG. 4 (a)) has the information H13 indicating the memory means 13 at its head as the destination information, and the output means that the cell had until then. 12a is also changed to one having information H12a (FIG. 4 (b)), and the cell is the bus 1
4 is input to the auxiliary memory 131 of the memory means 13 and is stored therein. Then, according to the reception permission notification j transmitted by the buffer management means 122a of the output means 12a, the auxiliary memory management means 132 of the memory means 13
Of the cells stored in the auxiliary memory 131 as described above (cells to be exchanged in the other output means 12b, ... Are also stored), addressed to the output means 12a that has received the reception permission notification j. 4C is transmitted to the output means 12a as the cell shown in FIG. 4 (c), and the cell is routed from the input means 11a to the output means 12a via the memory means 13. 1B will be taken.

Here, in the section C of FIG. 6, when the reception permission notification j is turned off at the start point of the section C,
After the cell is input to the auxiliary memory 131, it cannot be immediately transferred to the output means 12a, and the cell input during the time when the input stop signal k is turned ON until the input is actually stopped. Are accumulated in the auxiliary memory 131 (the rising portion of the section C in FIG. 6), and thereafter, as the cells are output one by one from the buffer memory 121a over time, the auxiliary memory 131 outputs The cells are sequentially buffer memory 121a (or 121b,
.., etc.) are transferred one by one to the above auxiliary memory 1
The accumulated amount of 31 cells is gradually reduced (section C in FIG. 6).
Falling part). Thus, in this section C, the cells are one by one in the buffer memory 121a.
Is output from, the reception permission notification j is ON / OF.
F is repeated.

In the above explanation, the case where the cell is exchanged to the output memory 12a is mainly explained, but as mentioned a little in the above explanation, the case where the cell is exchanged to the other output means 12b. The operation is exactly the same, and the memory means 13 having the auxiliary memory 131 is provided with a shared memory for any of the plurality of output means 12a, 12b ,. , Which is used as a cell, and which manages cells received from a plurality of input means 11a, 11b, ... In a single auxiliary memory 131 space in common.

The buffer management means 122 of the output means 12 stops the transmission of the change notification i, the reception permission notification j, and the input stop signal k because the light congestion threshold Tlc.
It may be a smaller value. The congestion control method is not limited to the cell switch, and any bus type switch that adds a routing header to the beginning of data and exchanges the same can be used.

As described above, in the ATM cell switch according to the first embodiment, the threshold value is set in the buffer memory 121, and the congestion control of the buffer memory is performed according to the threshold value, that is, the cell From the route 1A for transmitting the route to be transmitted from the input unit 11 to the output unit 12 at the normal time,
At the time of light congestion, the destination of the cell is changed to change to the route 1B that is exchanged to the output means 12 via the memory means 13, and at the time of heavy congestion, the input of the cell is stopped and the auxiliary memory is stopped. 131 is used as a shared memory when viewed from the plurality of output means 12. Therefore, the problem of cell discard in the prior art, that is, out of the cells received from the output of the input stop signal until the cell input is stopped, the cells overflowing the buffer memory are discarded. The problem can be solved. Moreover, since the shared auxiliary memory is provided, all the buffer memories can be used up to their maximum capacity, and the usage efficiency of the buffer memories can be greatly improved.

Embodiment 2 . The ATM cell switch according to the second embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, 21a and 21b are, for example, 4
It is a plurality of input means for inputting cells CL having a fixed code length, which consists of 8 bytes of actual information and 5 bytes of header. Reference numeral 211 is a routing header adding means provided in the input means 21a, 21b, which is destination information indicating the destination of the output means as shown in FIG. 5 (a) based on the cell header information. A routing header RH including H22a is generated and added to the beginning of the cell.

Further, 22a and 22b are a plurality of output means for outputting cells, and 221a and 221b are buffer memories for accumulating cells provided in the output means 22a and 22b. Reference numerals 223a and 223b are return means for returning the cells received from the input means 21a and 21b to the bus. Reference numerals 222a and 222b are buffer management means for managing the buffer memories 221a and 221b, which manage reception of cells by the buffer memory and return of cells by the return means, and more specifically, buffer memories. , For example 22
The reception permission notification j for permitting reception by 1a is transmitted, and the loopback means 223a is operated to include the cell received from the input means 21a, and the cell including the destination information of the output means 22a at the beginning of the memory. The routing header RH indicating the destination of the means 23 is added and sent back to the bus, and the cell received from the memory means 23 is the routing header RH added by the memory means.
The information is sent to the buffer memory based on the above information.

Reference numeral 23 is a memory means, and 231 is an auxiliary memory provided in the memory means 23 for accumulating the cells. Reference numeral 232 is an auxiliary memory management means for managing the auxiliary memory 231, which is the output means 2 described above.
Only when the reception permission notification j is received from 2a, the cells stored in the auxiliary memory 231 and addressed to the output means 22a which is transmitting the reception permission notification j are stored in the auxiliary memory 231 on the bus 24. Is to be sent to. Reference numeral 24 is a bus that enables exchange of cells.

Next, the operation of the ATM cell switch according to the second embodiment will be described with reference to FIGS. 2, 5, 7, and 9. First, at the time when cell transmission is started, the buffer memory 221 of the output means 22a, 22b, ... Is below the light congestion threshold (corresponding to section A in FIGS. 7 and 9),
In this case, the cell is, for example, from the input means 21a to the bus 2
The route 2A that is directly exchanged to the output means 22a via 4 is taken.

More specifically, for example, the input means 21a
The cells input to the are the routing header adding means 211a.
As a result, based on the header information of the cell, a routing header RH including destination information H12a indicating the destination of the output means is added as in the cell of FIG. The bus 24 exchanges the cell CL with the destination output means 22a indicated by the routing header RH. The cell C
L passes through the folding means 223a of the output means 22a and is accumulated in the buffer memory 221a of the output means 22a,
The output means 22 is instructed by the buffer management means 222a.
a. In this way, the path of the cell at this time is the path 2A directly output from the input means 21a, 21b to the output means 22a, 22b via the bus 24. Here, the transmission rate of the cells on the bus 24 is much higher than the input rate of the cells to the input means 21a and 21b and the output rate of the cells output from the output means 22a and 22b.

Next, the buffer memory 2 of the output means 22a
21a exceeds the first threshold value Tlc, which is a light congestion, and becomes a congestion state, and further reaches the second threshold value Thc, which is a heavy congestion threshold value, that is, section B in FIGS. 7 and 9. The operation will be described. In this case, the cells are routed from the input means 21a to the output means 22a via the bus 24 and then to the output means 22a via the memory means 23 to take the path 2B.

More specifically, first, when the buffer memory 221a of the output means 22a exceeds the light congestion threshold Tlc and becomes a congestion state, the buffer management means 222a of the output means 22a returns to the return means 223 of the output means 22a.
A return instruction 1 is issued to a and a reception permission notification j is transmitted to the memory means 23. The buffer memory 221a is in a light congestion state, and the loopback unit 223a which receives the loopback instruction 1 from the buffer management unit 222a is the input unit 21.
The cell CL received from a is returned to the bus 24. At this time, the routing header RH of the cell is stored in the memory means 23.
Information H23 indicating that the destination information is included at the beginning thereof, and also includes the information H22a of the folded output means 22a (see FIG. 5B).

Memory means 23 which has received the reception permission notice j
While receiving the reception permission notification j, the auxiliary memory management means 232 of the cell that is destined for the output means 22a that has received the reception permission notification j among the cells accumulated in the auxiliary memory 231 (FIG. 5). As shown in FIG. 5C, the routing header RH is output to the output means 22 only for the cell (b).
The information H22a indicating "a" is changed to one having the information H23 indicating that the cell comes from the memory means 23 and having the information H22a at the beginning as the destination information, and transmitting it to the output means 22a. . In this way, the auxiliary memory management means 232 manages to which output means the received cell is transmitted from the information in the routing header RH of the cell received from the output means.

On the other hand, the return means 223a has the information H23 included in the routing header RH of the received cell.
When it is determined that the cell is a cell received from the memory means 23, the cell is passed to the buffer memory 221a without being folded.

As described above, the buffer memory 221a
Capacity of cells accumulated in (buffer memory holding capacity)
Is above the light congestion threshold Tlc, the buffer management means 222a issues a return instruction 1 to the return means 223a and sends a reception permission notification j to the memory means 23.
When the capacity of the cells accumulated in the buffer memory 221a reaches the heavy congestion threshold Tlc (start point of section C in FIGS. 7 and 9), the buffer management unit 222a stops transmitting the reception permission notification j. , An input stop signal k requesting input stop of a cell input to the present ATM cell switch is transmitted to the input means 21a, 21b, ....

From this state, when the capacity of the cells accumulated in the buffer memory 221a becomes equal to or more than the light congestion threshold Tlc and less than the heavy congestion threshold Thc (section D in FIGS. 7 and 9), the buffer management is performed. The means 222a transmits the reception permission notification j, and when the cell capacity becomes less than the light congestion threshold Tlc (section E in FIGS. 7 and 9), the change notification i, the reception permission notification j, and the input stop signal. Stop sending k. At this time, the output means 22 is stored in the auxiliary memory 231.
The cell addressed to a does not remain.

In the above operation, when the capacity of the cells accumulated in the buffer memory 221a of the output means 22a exceeds the light congestion threshold Tlc, the loopback instruction l issued by the buffer management means 222a of the output means 22a. In response to this, the return means 223a of the output means 22a stores the routing header RH of the cell (FIG. 5 (a)) in the memory means 23 only for the cell addressed to the output means 22a which issued the return instruction 1 as described above. Is changed to information (H (a)) having information H23 indicating the output means 22a which the cell has up to now (FIG. 5 (b)). It is input to the auxiliary memory 231 of the memory means 23 via the bus 24 and is stored therein. Then, in response to the reception permission notification j transmitted by the buffer management means 222a of the output means 22a, the auxiliary memory management means 232 of the memory means 23 stores the cells (others) accumulated in the auxiliary memory 231 as described above. Of the cells to be exchanged are also stored in the output means 22b, ...
Only the addressed cell is made the cell shown in FIG. 5 (c) and transmitted to the output means 22a, and the cell is returned from the input means 21a to the output means 22a and passed through the memory means 23. The route 2B reaching the output means 22a is taken.

Here, in the section C of FIG. 7, when the reception permission notification j is turned off at the start point of the section C,
After the cell is input to the auxiliary memory 231, it cannot be immediately transferred to the output means 22a, and the cell input during the time when the input stop signal k is turned ON until the input is actually stopped. Are accumulated in the auxiliary memory 231 (the rising portion of the section C in FIG. 7), and thereafter, as the cells are output from the buffer memory 221a one by one with the passage of time, the auxiliary memory 231 Cells sequentially from the buffer memory 221a (or 221
b), etc.) one by one, and the accumulated amount of cells of the auxiliary memory 131 gradually decreases (falling part of section C in FIG. 7). As described above, in this section C, the cells are buffered one by one in the buffer memory 22.
With the output from 1a, the reception permission notification j turns ON /
It is repeatedly turned off.

In the above description, the case where the cell is exchanged with the output means 22a is mainly explained, but as mentioned a little in the above explanation, the case where the cell is exchanged with the other output means 22b. The operation is exactly the same, and the memory means 23 having the auxiliary memory 231 is provided with a shared memory for any of the plurality of output means 22a, 22b ,. The cells received from the plurality of input means 21a, 21b, ... Are shared and managed in the space of one auxiliary memory 231.

The buffer management means 222 of the output means 22 stops the transmission of the loopback instruction l, the reception permission notification j, and the input stop signal k because the light congestion threshold Tl.
It may be a value smaller than c. Also, this congestion control method,
Not limited to the cell switch, any bus type switch that adds a routing header to the beginning of data and exchanges the same can be used.

As described above, in the ATM cell switch according to the second embodiment, the threshold value is set in the buffer memory 221 and the congestion control of the buffer memory is performed according to this threshold value, that is, the cell From the route 2A for transmitting the route to the output unit 22 from the normal input unit 21,
At the time of light congestion, the return means 223 makes a return so as to change to the route 2B that is exchanged to the output means 22 via the memory means 23, and at the time of heavy congestion, the input cell is stopped to assist. The memory 231 is used as a shared memory when viewed from the plurality of output means 22. Therefore, the problem of cell discard in the prior art, that is, out of the cells received from the output of the input stop signal until the cell input is stopped, the cells overflowing the buffer memory are discarded. The problem can be solved. Moreover, since the shared auxiliary memory is provided, all the buffer memories can be used up to their maximum capacity, and the usage efficiency of the buffer memories can be greatly improved.

[0044]

As described above, the ATM according to the present invention
According to the cell switch, the output means from the path for transmitting the cell through the input means at the normal time to the output means, and at the time of light congestion, through the memory means having the auxiliary memory provided in addition to the buffer memory. The input stop signal is output by changing the path to be exchanged with the cell, and by stopping the cell input at the time of heavy congestion and by sequentially accumulating already input cells in the auxiliary memory. It is possible to eliminate the problem of discarding the cells that overflow from the buffer memory among the received cells between the time the cell is input and the time when cell input is stopped, and to greatly improve the efficiency of use of the buffer memory. The effect that can be obtained is obtained.

Further, according to the ATM cell switch of the present invention, the auxiliary memory provided in addition to the buffer memory is managed as a shared memory for a plurality of output means, so that the utilization efficiency of the entire memory can be improved. The effect that can be obtained is obtained.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an ATM cell switch according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an ATM cell switch according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a general bus type ATM cell switch.

FIG. 4 is a diagram showing a cell configuration in the ATM cell switch according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a cell configuration in an ATM cell switch according to a second embodiment of the present invention.

FIG. 6 is a diagram for explaining the operation of the ATM cell switch according to the first embodiment of the present invention.

FIG. 7 is a diagram for explaining the operation of the ATM cell switch according to the second embodiment of the present invention.

FIG. 8 is a diagram for explaining signals in the operation of the ATM cell switch according to the first embodiment of the present invention.

FIG. 9 is a diagram for explaining signals in the operation of the ATM cell switch according to the second embodiment of the present invention.

[Explanation of symbols]

 11a, 11b Input means 12a, 12b Output means 13 Memory means 14 Bus 111a, 111b Routing header adding means 112a, 112b Routing header changing means 121a, 121b Buffer memory 122a, 122b Buffer management means 131 Auxiliary memory 132 Auxiliary memory management means 21a, 21b Input means 22a, 22b Output means 23 Memory means 24 Bus 211a, 211b Routing header adding means 221a, 221b Buffer memory 222a, 222b Buffer management means 223a, 223b Folding means 231 Auxiliary memory 232 Auxiliary memory management means 31a, 31b Input means 32a , 32b Output means 33 Bus 311a, 311b Routing header adding means 321a, 321b Buffer memory 322 , 322b buffer management unit 1A path 1B path 2A path 2B path

Claims (6)

[Claims] 1. A plurality of input means for inputting cells, a plurality of output means for outputting cells, and one memory means for storing cells are connected via a bus, and the cells are connected via the bus. In the ATM cell switch to be exchanged, the input means generates a routing header indicating a destination of the output means and adds the routing header to the cell, and a routing header of a cell addressed to a certain output means. Routing header changing means for changing to a routing header whose destination is the memory means including destination information to the means, the output means managing a buffer memory for accumulating cells, and an input of the cells to the buffer memory. Buffer management means for storing the cells from the bus and outputting the cells to the bus. A memory and an auxiliary memory management means for managing cell input to the auxiliary memory and cell output from the auxiliary memory, wherein the cell is normally directly output from the input means via the bus. An ATM cell switch, characterized in that it passes through a route to be exchanged with the means, and when the buffer memory is congested, the route is exchanged from the input means to the output means via the memory means. 2. The ATM cell switch according to claim 1, wherein the routing header adding means generates a routing header indicating a destination of the output means based on header information of the cell and adds the routing header to the head of the cell. The routing header changing means, when receiving the change notification from the output means, only while receiving the change notification, sends the routing header addressed to the output means, which has sent the change notification, to the output means. The information is changed to one indicating the destination of the memory means including information, and the buffer management means issues a change notice to the routing header change means and a reception permission notice permitting the memory means to receive the buffer memory. The auxiliary memory management means sends the address to the output means based on the routing header of the received cell. Managing the information and transmitting a cell addressed to the output means that is transmitting the reception permission notification to the bus only while receiving the reception permission notification from the output means. An ATM cell switch characterized in that the bus exchanges cells with the output means or the memory means of the destination indicated by the routing header of the cell. 3. The ATM cell switch according to claim 1, wherein the buffer management means changes to the input means when the storage capacity of the buffer memory exceeds a first threshold value that is light congestion. The notification is transmitted to the memory means, and when the storage capacity of the buffer memory reaches the second threshold value which is the heavy congestion, the transmission of the reception permission notification is stopped and the notification is transmitted. When an input stop signal for stopping the input of a cell to the ATM cell switch is transmitted to the input means and the holding capacity of the buffer memory becomes less than the second threshold value, the input means is directed to the memory means. When the reception permission notification is transmitted and the storage capacity of the buffer memory becomes less than the first threshold value, the transmission of the change notification, the reception permission notification, and the input stop signal is also stopped. When the reception permission notification is received from the output means, the auxiliary memory management means is directed to the output means that has transmitted the reception permission notification and is stored in the auxiliary memory. The ATM cell switch is characterized in that it transmits the cell of 4. A plurality of input means for inputting cells, a plurality of output means for outputting cells, and one memory means for storing cells are connected via a bus, and the cells are connected via the bus. In the ATM cell switch to be exchanged, the input means includes routing header adding means for generating a routing header indicating a destination of the output means and adding the routing header to the cell, and the output means includes a buffer memory for storing cells. The memory means includes a return means for returning the cell received from the input means to a bus, a return means for returning the cell input to the output means, and a buffer management means for managing the input of the cell to the buffer memory. An auxiliary memory that stores cells from the bus and outputs the cells to the bus; a cell input to the auxiliary memory; And an auxiliary memory management means for managing the output of the cell, the cell normally passes through a path exchanged from the input means to the output means, and when the buffer memory is congested, the buffer management means The return means is instructed to return the cell directly input from the input means to the output means, and the cell addressed to the output means and returned by the output means is exchanged with the output means via the memory means. An ATM cell switch, characterized in that it is through an established path. 5. The ATM cell switch according to claim 4, wherein the buffer management means transmits a reception permission notification permitting reception by the buffer memory to the memory means, and the return means serves as the return means. The cell received from the input means is added with a routing header indicating that the cell includes the destination information to the output means and the destination is the memory means, and the cells are transmitted back to the bus. The received cell is to be sent to the buffer memory based on the information of the routing header added by the memory means, and the auxiliary memory management means sends this when receiving the reception permission notification from the output means. The above-mentioned output device that is transmitting the reception permission notification among the data accumulated in the auxiliary memory only during reception A cell addressed to the cell is transmitted to the bus with a routing header indicating that the cell is addressed to the output means including information indicating that the cell is transmitted from the memory means. An ATM cell switch for exchanging cells with the output means or the memory means of the destination indicated by the routing header. 6. The ATM cell switch according to claim 5, wherein the buffer management means instructs the return means to return when the first threshold, which is a light congestion of the storage capacity of the buffer memory, is exceeded. At the same time, the reception permission notification is transmitted to the memory means, and when the storage capacity of the buffer memory reaches the second threshold value that is the heavy congestion, the transmission of the reception permission notification is stopped and the input is performed. An input stop signal for stopping the input of the cell of the ATM cell switch to the means, and when the holding capacity of the buffer memory becomes less than the second threshold value, reception is permitted to the memory means. When the notification is transmitted and the storage capacity of the buffer memory becomes less than the first threshold value, the loopback instruction, the reception permission notification, and the input stop message are sent. The auxiliary memory management means receives the reception permission notification from the output means, and while the reception permission notification is received from the output means, the reception permission notification stored in the auxiliary memory is received. The ATM cell switch is characterized in that it transmits a cell addressed to the output means that has transmitted.