JPH09198258A - Task stack overflow detecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To instantaneously detect a task stack overflow and to improve the reliability of a stack by interrupting a CPU when an address value on an address line exceeds a set stack upper limit value. SOLUTION: At the time of starting a task A, a stack upper limit value is read out from a task control block 5 and the read value is set up in a task stack upper limit value setting register 1. During the execution of the task A, an address matching circuit 2 compares the value of the register 1 with the address value on the address line 4, and when a stack address exceeding the upper limit value of the task A is read out/written, the CPU 3 is interrupted to inform the CPU 3 of the generation of a stack overflow. When task switching from the task A to a task B is generated, a stack upper limit value is read out from the block at the time of starting the task B and the read value is reset in the register 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a task stack overflow detection circuit, and more particularly to a task stack overflow detection circuit for a device controlled by software having a multitask structure.

[0002]

2. Description of the Related Art As a conventional stack overflow detection method, (1) a storage area for storing a nesting superposition degree is assigned to a storage means, and a microcomputer is activated when the storage content of the storage area exceeds a predetermined value. What is reset (Japanese Patent Laid-Open No. 1-241629) (2) When the read storage protection code is a specific storage protection code and the access code specifies writing, write data in the write interrupt area Therefore, there is one (Japanese Patent Publication No. 2-9373) that informs the CPU of the overflow of the stack area.

[0003]

The problem with the former stack overflow detection method is that the stack overflow is determined by the number of nesting. This is because if the original normal operation requires a lot of nesting, it will be referred to as a stack overflow. Because.

A problem with the latter stack overflow detection method is that a memory protection code must be set in a stackover area where access should be prohibited. The reason for this is that in the case of multitasking, the stack area changes each time a task is switched, so it is necessary to change the memory protection code every time, and there seems to be a problem that the processing performance becomes slow.

In general, the task stack amount is set as a size estimated from the operation contents of the task or simulated by simulating a typical operation.
There is a slight possibility that a task stack overflow will occur during an unexpected operation.

Further, although the stack area of the own task is actually exceeded and the stack of the other task is destroyed, it seems that the other task does not start up at that time, and it seems that it is working well. It may have an impact later.

An object of the present invention is to provide a task stack overflow detection circuit which detects the task stack overflow surely and immediately and eliminates the above and improves the reliability of the task stack. is there.

[0008]

In the task stack overflow detection circuit of the present invention, the stack upper limit value setting register in which the stack upper limit value of each task is set and the address value on the address line are set in the stack upper limit value setting register. The address matching circuit has an address matching circuit for interrupting the CPU when the address value exceeds the stack upper limit value.

When the task stack is accessed, the address matching circuit compares the access address with the set value of the stack upper limit value setting register. As a result, an access that exceeds the stack upper limit value is immediately detected, and the CPU is interrupted.

The stack overflow detection circuit of the present invention further has a task control block in which the stack upper limit value detected from the task stack amount at the time of task generation is written, and the stack upper limit value is read from the task control block at the time of task activation. It is set in the stack upper limit value setting register.

If the stack upper limit value of the task is set in the stack upper limit value setting register at the start of each task by the program, the stack overflow can be correctly detected even if the task switch occurs.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be proved with reference to the drawings.

FIG. 1 is a block diagram of a task stack overflow detection circuit according to an embodiment of the present invention.

This task stack overflow detection circuit includes a stack upper limit value setting register 1 in which the stack upper limit value of each task is set, and a stack upper limit value setting register 1
Value is compared with the address value on the address line 4, and when a stack address exceeding the stack upper limit value is read / written, the address matching circuit 2 that interrupts the CPU 3 and the program generate a task, A task control block in which the stack upper limit value calculated from the task stack amount in the stack memory area 6 is written, and the stack upper limit value is read at the time of task activation and task switch and set in the stack upper limit value setting register 1. It consists of 5. The size of the task stack is set for each task by the program parameters.

Next, the operation of this embodiment will be described.

When the task A is generated, the stack area of the task A is allocated to the stack memory area 6 by the operation system program, and the stack bottom address of the task A is determined. Next, the task stack upper limit value is calculated from the task stack amount specified by the program parameters and the assigned bottom address of the task stack. For example, the stack amount of task A is specified by the program parameter as 1000 bytes, and the bottom address of the task stack is 2000 bytes.
It is assumed that address 1000 is assigned. At this time, the stack upper limit value is 20001000-1000 = 2000.
It will be address 0000. The calculated stack upper limit value is written in the task control block 5. The same applies when the task B is generated.

When the task A is started, the stack upper limit value is read from the task control block 5, and this value is set in the task stack upper limit value setting register 1.

During execution of the task A, the address matching circuit 2 compares the value of the stack upper limit value setting register 1 with the address value on the address line 4, and the stack address exceeding the stack upper limit value of the task A is detected. When read / written, the CPU 3 is interrupted to notify that a stack overflow has occurred.

When a task switch from task A to task B occurs, the stack upper limit value is read from task control block 5 when task B is activated, and this value is set in stack upper limit value setting register 1. Do it again.

Even during the execution of task B, the address matching circuit 2 compares the value of the stack upper limit value setting register 1 with the address value on the address line 4, and the task B
Stack address exceeding the stack upper limit value of /
When written, it interrupts the CPU 3 to notify that a stack overflow has occurred.

The CPU 3, which has received the interrupt, saves the failure information such as the task name at the time of the failure occurrence, notifies the upper software of the failure occurrence, and waits for an instruction from the upper software.

[0022]

As described above, the present invention has the following effects. (1) Since an access to an address exceeding the stack upper limit value can be immediately detected, an abnormal operation that occurs after the task on the side of the stack destruction is activated can be prevented. The reason is that when the task stack is accessed, the address matching circuit compares the access address with the set value of the stack upper limit setting register and interrupts the CPU when the stack overflows. (2) Since the access exceeding the stack upper limit value can be reliably detected, the stack overflow that cannot be detected by the nesting superposition degree can be detected. The reason is that the stack overflow is determined by using the upper limit value of the stack address itself instead of the nesting superposition degree. (3) A stack overflow can be detected in the same way even in a multitask task switch. As a result, it becomes possible to immediately detect a stack overflow that is unknown until the task on the side where the stack is destroyed abnormally operates. The reason is that the judgment value of stack overflow can be easily performed only by rewriting the register.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

[Explanation of symbols]

 1 Stack upper limit setting register 2 Address matching circuit 3 CPU 4 Address line 5 Task control block 6 Stack memory area

Claims (2)

[Claims] 1. A stack upper limit value setting register in which a stack upper limit value of each task is set, and an address value on an address line is compared with a stack upper limit value set in the stack upper limit value setting register, and the address value is A task stack overflow detection circuit having an address matching circuit for interrupting the CPU when the stack upper limit is exceeded. 2. A task control block to which a stack upper limit value calculated from a task stack amount is written when a task is generated, and the stack upper limit value is read from the task control block when the task is activated, and the stack upper limit value is set. The task stack overflow detection circuit according to claim 1, which is set in a register.