JPH09172540A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To convert input image data (source data) with a 1st resolution into 2 end resolution data (destination) at a high speed. SOLUTION: When pixel data to be read out of image data with a prescribed bit pattern width latched in a data latch 3 are designated by a counter 5 and a data selector 4 selects the designated pixel data, a counter 7 or the like designates repetitive bits of pixel data latched by data latches 6-1 to 6-m based on a conversion factor set by a magnification register and a control circuit 10 controls updated read pixel data by the counter 5 based on a repetitive bit designation state by the counter 7 or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus applicable to an output device for converting the resolution of input image information into image information having a required resolution and displaying or printing the image information.

[0002]

2. Description of the Related Art In an image processing apparatus of this type, for example, an LBP printing apparatus, print data may be output using the resolution of a display device used when host application software creates print data as it is.

Further, it is assumed that a printer having a resolution different from that of the connected printer is connected by another application software, or that print data having a resolution different from that of the original printer is output. There is.

In order to deal with these problems, conventionally, the predetermined resolution data inputted is converted into the resolution of the engine once by software, and then the printing is started.

[0005]

However, in the above-mentioned conventional example, since the data is processed in units of words of a predetermined number of bits in order to convert the resolution, the designated pixel data of the given image data is designated. It is necessary to execute a program that combines complicated instructions for performing bit cutout, mask processing, data shift processing, etc. in order to arrange it at another position, and a long processing time is required for resolution conversion. .

Further, an image processing apparatus for converting data having a predetermined word width inputted by hardware once bit by bit by a parallel / serial converter and restoring it again by the serial / parallel converter into word width data. (JP-A-63
However, there is a problem that the device becomes complicated by thinning out the clock of the serial / parallel converter or inserting a dummy blank bit depending on the start position of the image data.

The present invention has been made to solve the above problems, and an object of the first to sixth inventions of the present invention is to provide image information of a predetermined resolution input with a predetermined bit width. Is taken out as image data of a predetermined bit width unit,
The input image data having the first resolution is obtained by controlling the writing of the pixel data and the reading of the pixel data so that the extracted image data is taken out pixel by pixel and each pixel data is repeatedly written at the designated position. The (source data) can be converted into the second resolution data (destination) at high speed, and at the start position within the word of the input image data or the start position of the image data of the predetermined word to be output. An object of the present invention is to provide an image processing device that can perform resolution conversion or image enlargement without requiring extra time.

[0008]

According to a first aspect of the present invention, there is provided storage means for storing image information of a predetermined bit width input at a predetermined resolution, resolution of image data to be output and input resolution. And a read-out control means for reading out the image data of the image information stored in the storage means based on a specified read-out address, and a read-out control means. First holding means for holding image data of a predetermined bit width, first specifying means for specifying pixel data to be read from the image data of a predetermined bit width held by the first holding means, and the first Selecting means for selecting and outputting the pixel data specified by the specifying means; second holding means for holding the pixel data output from the selecting means with a predetermined bit width; and the scaling factor. Second specifying means for specifying repetition bits of pixel data output from said selecting means based on the conversion ratio set by the constant unit, said second
Control means for controlling the update of the read pixel data by the first designating means based on the repeated bit designating state by the designating means.

In the second aspect of the present invention, the unit pixel data of the input image information is 1-bit data.

According to a third aspect of the present invention, the unit pixel data of the input image information is multi-bit data.

According to a fourth aspect of the present invention, the magnification setting means sets the conversion rate by comparing the designated resolution of the output image data with the input resolution.

In a fifth aspect of the present invention, the designated resolution can be designated as an arbitrary resolution based on an external input.

According to a sixth aspect of the present invention, the second designating means is capable of designating a repeating bit independently for each pixel.

[0014]

In the first aspect of the invention, when the image information of a predetermined bit width input at a predetermined resolution is stored in the storage means,
Image data of the stored image information is read based on a read address designated by the read control means,
When the read image data having a predetermined bit width is held in the first holding means and the pixel data to be read from the held image data having the predetermined bit width is designated by the first designating means, When the selecting unit selects and outputs the designated pixel data, the second designating unit designates the repeating bit of the pixel data to be held in the second holding unit based on the conversion rate set by the magnification setting unit. In addition, the control means controls the update of the read pixel data by the first designating means based on the repeated bit designating state by the second designating means, so that the bit width of the input image information can be increased with a simple structure. In addition, it is possible to convert into image information having a desired bit width.

In the second aspect of the invention, the unit pixel data of the input image information is 1-bit data, and the bit width of the input image information is converted into image information having a desired bit width at high speed with a simple structure. It is possible to do.

In the third invention, the unit pixel data of the input image information is multi-bit data, and the bit width of the input multi-valued image information is high in speed with a simple structure. It is possible to convert into information.

In the fourth invention, the magnification setting means is
The conversion rate is set by comparing the specified resolution of the output image data with the input resolution, and it is possible to generate the image data of a predetermined resolution without depending on the resolution of the input image data.

In the fifth aspect of the invention, the designated resolution can designate any resolution based on an external input.

In the sixth invention, the second designating means makes it possible to designate a repeating bit independently for each pixel,
It is possible to independently hold each pixel data of the image data held with a predetermined bit width as arbitrary pixel data in the second holding unit.

[0020]

【Example】

[First Embodiment] FIG. 1 is a block diagram for explaining the circuit arrangement of an image processing apparatus according to the first embodiment of the present invention, which corresponds to the case where one pixel has one bit.

In the figure, 1 is an image data memory, n
The original image data of bit width is stored. A DMA controller 2 controls reading of image data from the image data memory 1, and sequentially reads data for each word from a set address for each request of the control circuit 10.

3 is a data latch (data latch D),
The original image data from the DMA controller 2 is temporarily retained. Reference numeral 4 is a data selector, which is a signal 4 for selecting necessary pixel data from the data latch 3 and selecting the uppermost pixel.
a is output to the control circuit 10. A counter (counter S) 5 designates a pixel position to be selected in the data selector 4. The number k of control lines 5a of the counter 5 has a relationship such that 2 to the power k is n.

Reference numerals 6-1 to 6-m denote data latches (data latches S) which align the pixel data selected by the data selector 4 with the word width of the data to be output. A counter (counter D) 7 designates the bit position to be latched in the data latch 6. The control line 7a of the counter 7
The number β of lines has a relationship such that 2 raised to the power β is m.

Reference numeral 8 is a decoder, which converts the binary data from the counter 7 into a selection signal, and a signal 8a for selecting the uppermost pixel is input to the control circuit 10. 9-1 to 9-m is A
A selection signal from the decoder 8 and a clock C by the ND gate
The logical product (AND) with LK is taken. 10 is not shown C
A control circuit including a PU, a RAM, a ROM, an I / O port, etc., controls the entire circuit as a whole in the procedure shown in FIG.

In this embodiment, the bit width n of the source data word and the bit width m of the destination data word may or may not be the same.

In the image processing apparatus thus constructed, the counter 5 for outputting the bit position designating the position of the required pixel to the data selector 4 of the input data is the pixel at which the data of the first word starts at the beginning of the image conversion. The data selector 4 for selecting the necessary pixel data out of the data input without any operation such as loading the position, skipping the clock, inserting dummy blank bits, etc. must select the necessary pixel data. You can Further, the counter 7 which outputs the necessary pixel positions of the data latches 6-1 to 6-m for the output data also loads the position to start the conversion of the image into the counter, thereby starting the conversion similarly to the input data. It is now possible to write pixel data to the required bits immediately.

FIG. 2 is a schematic diagram for explaining the state of resolution conversion processing by the image processing apparatus shown in FIG.
Corresponding to the case of converting 00 dpi source data to 600 dpi destination data, (a) shows an example of horizontal resolution conversion, and (b) shows an example of vertical resolution conversion.

As shown in FIG. 2A, when the resolution in the horizontal direction is converted from 400 dpi to 600 dpi,
When the data “ABCDEFGH” is input as the source data, the pixels A, C, and E are repeated in this embodiment, and the destination pixel data “AABCCD”.
EEF ". Similarly, as shown in FIG.
When converting the vertical resolution from 400 dpl to 600 dpl, when the line "abcde" is input as the source data, the lines a, c, and e are repeated in the present embodiment, and the destination line data "a" is repeated.
"abccdee".

The resolution conversion processing operation will be described below with reference to FIG.

In FIG. 1, the source data is stored in the image data memory 1 as word data having a predetermined bit width (n bit width in this embodiment). The source image data read from the image data memory 1 by the DMA controller 2 is once held in the data latch 3, and the pixel data designated by the counter 5 is stored in the data latches 6-1 to 6-.
Of m, written in the location specified by the counter 7,
When the data latches 6-1 to 6-m have accumulated pixel data of a width to be output, the pixel data is output as resolution-converted destination pixel data.

The pixel of the source image data used repeatedly during resolution conversion is prohibited from incrementing the counter 5, and the same pixel data is written in the designated latch of the data latches 6-1 to 6-m. It is realized by letting it.

FIG. 3 is a block diagram showing an example of a repeat bit designating circuit incorporated in the control circuit 10 shown in FIG.

In FIG. 3, reference numeral 100 denotes an initial value register, which holds the initial value of addition. Reference numeral 101 is a magnification register, which holds the conversion rate. Reference numeral 102 denotes an adder, which adds the previous addition result and the magnification specified by the magnification register 101, and uses the carry output when the addition exceeds "1" for updating the pixel position of the source. A selector 103 selects the output data from the adder 102 and the data (initial value) of the initial value register 100 so that the flip-flop (FF) 104 can latch the initial value. This circuit is built in the control circuit 10 and is used to control the count-up of the counter 5 for designating the pixel position of the source data.

As shown in this figure, the present embodiment is characterized in that a repeating bit by digital integration (DDA) is designated, and the reciprocal of the magnification to be converted is added to the initial value for each pixel to be output. , The same pixel is repeatedly output until the result exceeds "1". after,
The value of "1" or more is rounded down and the decimal part is used in the next addition. In the actual circuit, the carry output when the sum exceeds "1" is used to update the pixel position of the source.

Hereinafter, this embodiment and the first, second, fourth to sixth parts will be described.
Correspondence with each means of the invention and its action will be described with reference to FIGS.

According to a first aspect of the present invention, a storage means (image data memory 1) for storing image information of a predetermined bit width input at a predetermined resolution is compared with the resolution of image data to be output and the input resolution. Magnification setting means for setting the conversion rate (the CPU of the control circuit 10 sets it in the register 101 based on the stored conversion magnification or the conversion magnification from an external input instruction), and the image of the image information stored in the storage means. Read control means (DMA controller 2) for reading data based on a designated read address, and first holding means (data latch 3) for holding image data of a predetermined bit width read by the read control means. ,
A first designating means (counter 5) for designating pixel data to be read out from the image data of a predetermined bit width held in the first holding means, and pixel data designated by the first designating means are selected. The selecting means (data selector 4) for outputting, the second holding means (data latches 6-1 to 6-m) for holding the pixel data output from the selecting means with a predetermined bit width, and the magnification setting means. Second designating means (counter 7, decode 8, AND gates 9-1 to 9-) for designating the repeating bit of the pixel data output from the selecting means based on the set conversion rate.
m)) and control means (control circuit 10) for controlling the update of read pixel data by the first designating means based on the repeated bit designating state by the second designating means. When the image information of the bit width is stored in the image data memory 1, the image data of the stored image information is read based on the read address designated by the DMA controller 2, and the read predetermined bit width is read. When the pixel data to be read out from the held image data of a predetermined bit width is designated by the counter 5, the data selector 4 selects the designated pixel data. When output, the counter 7 and the like latch the data latches 6-1 to 6-m based on the conversion rate set by the magnification register 101.
The control circuit 10 controls the update of the read pixel data by the previous counter 5 based on the repeated bit designation state by the counter 7 or the like, and the bit width of the image information to be input is designated. Can be converted into image information having a desired bit width at high speed with a simple configuration.

In the second invention, the unit pixel data of the input image information is 1-bit data, and the bit width of the input image information is converted into image information of a desired bit width at high speed with a simple structure. It is possible.

A fourth invention is a magnification setting means (control circuit 1
(Set by the CPU of 0) sets the conversion rate in the magnification register 101 by comparing the designated resolution of the output image data with the input resolution, without depending on the resolution of the input image data, Image data of a predetermined resolution can be generated.

According to the fifth aspect of the invention, as the designated resolution, an arbitrary resolution can be designated based on an external input, and an arbitrary resolution can be designated based on an external input.

According to a sixth aspect of the present invention, the second designating means (counter 7 or the like) is capable of designating a repeating bit independently for each pixel, and arbitrarily sets each pixel data of the image data held at a predetermined bit width. The pixel data can be held independently in the second holding means (data latches 6-1 to 6-m).

The resolution conversion processing operation in the image processing apparatus according to the present invention will be described below with reference to the flow charts shown in FIGS.

FIG. 4 is a flow chart showing an embodiment of the image processing method of the image processing apparatus according to the present invention, which corresponds to the resolution conversion processing in the horizontal direction. Note that (1) to (1)
4) shows each step.

First, in step (1), the data latch 6
Is cleared and the pixel position to be read is loaded into the counter 5. Also, the position of the first pixel is loaded into the counter 7. Initialization of the circuit such as setting the head address read from the image data memory 1 in the DMA controller 2 is performed.

In step (2), the DMA controller 2
Request to read one word of source data.
Then, the process waits until the source data is read in step (3), and if the source data is read, the data is latched in the data latch 3 in step (4).

Subsequently, in step (5), it is determined whether the last bit of the word to be output is filled with pixel data. If it is determined that the data can be output, the data output from step (6) is performed. If it is determined that the pixel data can still be set in the word data, the process proceeds to step (10) where the counter 7 is incremented to prepare for writing the next pixel.

When outputting the destination data, step (6) notifies that there is external data, and step (7) waits until the destination data is received. Then, in step (8), it is determined whether or not all the necessary destination data has been received by the outside. If YES, the process is terminated, and if NO, the data latch is cleared in step (9), and step (1
At 0), the counter 7 is incremented and the data pointer is cleared to "0".

On the other hand, even when the final pixel of the word is not written in step (5), the counter 7 is advanced to the next step (10). Then, in step (11), it is determined whether the pixel data to be latched next is to use the same data as that previously written or the next pixel data (in the present embodiment, the circuit shown in FIG. 3 is used). When the carry is seen from the adder 102, the next pixel data is determined if it is standing, and the same pixel data is determined if it is not set). If it is determined that the pixel data is the same, the process returns to step (4). Repeat from the point where the data is latched.

On the other hand, if it is determined in step (11) that the pixel data is different, it is checked in step (12) whether the output of the counter 5 is final, and if it is determined that the output is not final, , The counter 5 is incremented, the data latch flow from step (4) is repeated, and if it is determined that the counter 5 is the final one, the counter 5 is incremented, that is,
While clearing to "0", the process returns to step (2), the next source data is read from the DMA controller 2 from the image data memory 1, and the process of fetching the next data is performed.

FIG. 5 is a flow chart showing an embodiment of the image processing method of the image processing apparatus according to the present invention, which corresponds to the resolution conversion processing in the vertical direction. In addition, (1)-
(7) shows each step.

In step (1), the start address of the source data is set in the DMA controller 2, and the initial value register 100 and the magnification register 1 in the control circuit 10 shown in FIG. 3 are set.
The setting value is written to 01, the selector 103 is set to the initial value register side, and the initial value is written to the flip-flop 104.

Subsequently, in step (2), the resolution conversion processing in the horizontal direction shown in FIG. 4 is performed, and it is determined in step (3) whether or not the line is the final line. finish.

On the other hand, if it is determined in step (3) that the line is not the final line, the adder 102 is determined in step (4).
From the DMA controller 2 in order to use the next line of the source data in step (5) if it is determined that the carry is present.
For, set the start address of the next line.

On the other hand, if it is determined in step (4) that a carry has not occurred, the start address of the current line is set in the DMA controller 2 again in step (6). Then, in step (7), flip-flop 1
The output of the adder is latched to 04, and the step (2) is performed again.
Repeat the horizontal resolution conversion of.

The resolution conversion can be realized by performing the processing according to the above procedure. In the present invention, when the resolution conversion is started, arbitrary bits can be set in the counter 5 and the counter 7, so that the resolution conversion processing can be started immediately thereafter.

[Second Embodiment] FIG. 6 is a block diagram for explaining the circuit arrangement of an image processing apparatus according to the second embodiment of the present invention. The same components as those in FIG. 1 are designated by the same reference numerals. This embodiment corresponds to the case where the number of bits per pixel is "2" or more.

In the figure, reference numeral 11 is a data selector corresponding to a plurality of bits / pixel, and selects necessary pixel data from n-bit source data of one pixel. The output of the data selector 11 is different from that of FIG.
6-m is connected to the output of the data selector 11 according to the bit of the pixel to be stored.

Here, assuming that the number of bits per pixel is "P", the number n of source data bits is n = 2 ^ k between the counter 7 and the data latches 6-1 to 6-m. * P
(^ Indicates exponentiation), and the number of bits m of the destination is m = 2 ^ 1 * P.
The control method is the same as in the first embodiment.

As a result, the present invention can be applied even when the number of bits per pixel is 2 bits or more.

Correspondence between this embodiment and each means of the third invention and its operation will be described below with reference to FIG.

In the third invention, the unit pixel data of the inputted image information is multi-bit data, and the bit width (the number of bits n) of the inputted multi-valued image information is desired to be desired at high speed with a simple structure. It is possible to convert to image information having a bit width (bit number m).

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of one device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus. In this case, by reading a storage medium storing a program represented by software for achieving the present invention into the system or apparatus, the system or apparatus can enjoy the effects of the present invention.

Furthermore, by downloading and reading the program represented by the software for achieving the present invention from the database on the network by the communication program, the system or apparatus can be
It is possible to enjoy the effects of the present invention.

[0063]

As described above, the first embodiment according to the present invention is described.
According to the invention, storage means for storing image information of a predetermined bit width input at a predetermined resolution, and magnification setting means for comparing the resolution of the output image data with the input resolution and setting a conversion rate. A read control means for reading the image data of the image information stored in the storage means based on a designated read address; and a first holding means for holding image data of a predetermined bit width read by the read control means.
Holding means, first specifying means for specifying pixel data to be read from the image data of a predetermined bit width held in the first holding means, and pixel data specified by the first specifying means. Output from the selecting means, second holding means for holding the pixel data output from the selecting means with a predetermined bit width, and output from the selecting means based on the conversion rate set by the magnification setting means. Second designating means for designating a repetition bit of the pixel data to be read, and control means for controlling the update of the read pixel data by the first designating means on the basis of the repeat bit designating state by the second designating means. Then, when the input image information of a predetermined bit width is stored in the storage means, the image data of the stored image information is read by the read control means. The read image data having a predetermined bit width is held in the first holding means, and the pixel data read from the held image data having the predetermined bit width is the first designating means. When the selecting means selects and outputs the designated pixel data, the second designating means stores the pixel data in the second holding means based on the conversion rate set by the magnification setting means. Since the control means controls the updating of the read pixel data by the first designating means on the basis of the repeat bit designating state by the second designating means, the bit of the image information to be input is designated. The width can be quickly converted into image information having a desired bit width with a simple configuration.

According to the second invention, since the unit pixel data of the input image information is 1-bit data, the bit width of the input image information is simple and high-speed and the image of the desired bit width is obtained. It can be converted into information.

According to the third invention, since the unit pixel data of the input image information is multi-bit data, the bit width of the input multi-valued image information can be set to a desired bit at a high speed with a simple structure. It can be converted into width image information.

According to the fourth aspect, the magnification setting means sets the conversion rate by comparing the designated resolution of the image data to be output with the input resolution, and therefore depends on the resolution of the input image data. Without, it is possible to generate image data of a predetermined resolution.

According to the fifth invention, as the designated resolution, any resolution can be designated based on an external input.

In the sixth aspect of the invention, the second designating means is capable of independently designating a repeating bit for each pixel, so that each pixel data of the image data held with a predetermined bit width is treated as arbitrary pixel data. It can be held independently by the second holding means.

Therefore, the input image data (source data) having the first resolution can be converted into the second resolution data (destination) at a high speed with a simple structure, and the word of the input image data can be obtained. There is an effect that resolution conversion or image enlargement can be performed without requiring extra time irrespective of the start position within and the start position of image data of a predetermined word to be output.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a circuit configuration of an image processing apparatus showing a first embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating a resolution conversion processing state by the image processing apparatus illustrated in FIG.

FIG. 3 is a block diagram showing an example of a repeat bit designating circuit incorporated in the control circuit shown in FIG.

FIG. 4 is a flowchart showing an embodiment of an image processing method of the image processing apparatus according to the present invention.

FIG. 5 is a flowchart showing an embodiment of the image processing method of the image processing apparatus according to the present invention.

FIG. 6 is a block diagram illustrating a circuit configuration of an image processing apparatus showing a second embodiment of the present invention.

[Explanation of symbols]

 1 Image Data Memory 2 DMA Controller 3 Data Latch 4 Data Selector 5 Counter 6 Data Latch 7 Counter 8 Decoder 9 AND Gate 10 Control Circuit

Claims (6)

[Claims] 1. Storage means for storing image information of a predetermined bit width input at a predetermined resolution, and magnification setting means for comparing the resolution of image data to be output with the input resolution to set a conversion rate. Read control means for reading the image data of the image information stored in the storage means based on a designated read address, and first holding means for holding the image data of a predetermined bit width read by the read control means. And a first designating means for designating pixel data to be read from the image data of a predetermined bit width held in the first holding means, and the pixel data designated by the first designating means are selected and output. Based on the selecting means, the second holding means for holding the pixel data output from the selecting means with a predetermined bit width, and the conversion rate set by the magnification setting means. Second specifying means for specifying a repeating bit of the pixel data output from the selecting means,
An image processing apparatus comprising: a control unit that controls updating of read pixel data by the first designating unit based on a repeated bit designating state by the second designating unit. 2. The image processing apparatus according to claim 1, wherein the unit pixel data of the input image information is 1-bit data. 3. The image processing apparatus according to claim 1, wherein the unit pixel data of the input image information is multi-bit data. 4. The image processing apparatus according to claim 1, wherein the magnification setting means sets the conversion rate by comparing the designated resolution of the output image data with the input resolution. 5. The image processing apparatus according to claim 1, wherein the designated resolution can designate any resolution based on an external input. 6. The image processing apparatus according to claim 1, wherein the second designating unit is capable of designating a repeating bit independently for each pixel.