JPH09163140A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a processor capable of reducing the number of times of the access of an error buffer and accelerating a processing speed by providing a filtering means capable of performing a processing by a prescribed method and the respective means of correction, binarization/multilevel precessing, calculation, generation, storage and control. SOLUTION: The means 2 corrects the data 1 for respective picture elements by a correction amount 11 to the adjacent picture element outputted from the filtering means 10 and the correction amount 14 diffused from a previous line and correction control is performed by signals 17 generated from the means 15. The data 3 corrected in the means 2 are supplied to the means 4 and the means 6. The means 4 converts the data 3 to the binarized data of 1 bit or the multilevel data of 2 or more bits and outputs them as the data 5. The data 5 are passed through the means 4A and supplied to devices such as an external printer and a display device, etc., the duplicate images of input images are generated and they are supplied to the means 6. The signals 7 calculated in the means 6 are supplied to the means 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention aims at reduction of texture in error diffusion gradation processing, simplification of processing hardware and speedup of processing when a document image to be processed is scanner-inputted or copied. The present invention relates to an image processing device.

[0002]

2. Description of the Related Art Generally, in a document image processing apparatus capable of handling not only code information but also image information, image information having contrast such as characters and diagrams on a document read by a reading means such as a scanner has a fixed threshold value. By simple 2
Image information having gradation such as a photograph is binarized by a pseudo gradation method such as a dither method and output to a binary printer having a small gradation. This is because if the read image information is simply binarized with a fixed threshold, the resolution of the character and line image areas is preserved and the image quality is not deteriorated, but the gradation of the photographic image area is not. The image is deteriorated because it is not saved.

On the other hand, when the read image information is subjected to gradation by the systematic dither method or the like, the gradation property is preserved in the area of the photographic image so that the image quality is not deteriorated, but the area of the character or line image is formed. In that case, the resolution is lowered and the image quality is deteriorated. That is, with respect to the read image information, it is impossible to simultaneously satisfy the image quality of each region having different characteristics with a single binarization process.

However, the "error diffusion method" has been proposed as a binary / multi-valued method which satisfies the gradation of the photographic image area and has a higher resolution than the tissue dither in the character / line image area. There is. "Error diffusion method" (Reference: An Adapt
five Algorithm For Spatial
Grayscale, by R.G. W. Floydan
d L. Steinberg, Ρcecedings
of the S.P. I. D. Vo1.17-2, p
p. 75-77, Second Quarter 19
The method 76) is a method of adding a value obtained by multiplying the density of the pixel of interest by a weighting coefficient to the binarization error of the already binarized peripheral pixels, and performing binarization with a fixed threshold.

FIG. 56 is a block diagram of binarization processing by the "error diffusion method". In FIG. 56, z1 is an input image signal, z2 is correction means for correcting the image information of the pixel of interest, and z is
3 is a corrected image signal, z 4 is a binarizing means for binarizing the image information information of the corrected target pixel, z 5 is a binarized image signal, and z 6 is a binarization error of the binarized target pixel. Binarization error calculation means for calculating, z7 is a binarization error signal, z8 is a weighting coefficient storage means for storing the weighting coefficient of the error filter for calculating a weighting error, and z9 is a binarization error calculation means z6.
The weighting error calculating means for calculating the weighting error by multiplying the binarization error calculated in step 3 by the error filter weighting coefficient of the weighting coefficient storage means z8, z10 is the weighting error signal, and z11 is the weighting error calculated by the weighting error calculating means z9. Error storage means for storing,
z12 is an image correction signal.

The binarization process of the "error diffusion method" will be described in detail below.

An input signal z1 read by an input device such as a scanner is input to an image correction signal z1 by a correction means z2.
The correction processing is performed according to 2, and the corrected image signal z3 is output. Binarization means z4 to which the corrected image signal z3 is supplied
Is the corrected image signal z3 and the binarization threshold value Τh (for example, “80
h ”and the attached“ h ”are hexadecimal in“ hex ”), and the corrected image signal z3 is larger than the binarization threshold Th and is“ 1 ”(black pixel) as the binarized image signal z5. )
Is output, and if smaller, “0” (white pixel) is output.

Next, in the binarization error calculating means z6, the corrected image signal z3 and the binarized image signal z5 (here, "0h", "1" when the binarized image signal is "0") In this case, "FFh]" is calculated, and this is output as a binarization error signal z7.

The error filter shown in the weighting coefficient storage means z8 is a commonly used error filter configuration. Here, "*" in the weighting coefficient storage means z8
Indicates the position of the pixel of interest. In the weighting error calculating means z9, the weighting coefficients A, Β, C, D of the weighting coefficient storage means z8 are added to the binarization error signal z7 (where A = 7/16, Β = 1 /).
16C = 5/16, D = 3/16)
Calculate 10.

That is, the binarization error of the pixel of interest is multiplied by the weighting factors A, B, C and D, and the four peripheral pixels (pixels corresponding to the positions of the weighting factors A, B, C and D) of the pixel of interest are multiplied. Calculate the weighting error. The error storage means 41 is a weight error calculation means 2
The weighting error z10 calculated in 9 is stored, and the weighting errors of four pixels calculated by the weighting error calculating means z9 are eA, eB, and e for the target pixel “*”, respectively.
It is added and stored in the areas of C and eD. The above-described pixel correction signal z12 is a signal at the position of “*” and is a signal in which the weight error of four pixels calculated by the above procedure is accumulated.

In recent years, even in the error diffusion processing when the number of gradations (number of levels) of the output device is large, the above-mentioned binarizing means z is used.
4 is replaced with a multi-level converting means using threshold values corresponding to the number of gradations.

The above-mentioned "error diffusion processing" minimizes the binary / multi-valued error by diffusing the error generated by the binary / multi-valued processing of the pixel of interest to the peripheral pixels and performing error correction. To do. One problem with this method is that the texture (texture) is added to the output image (especially in the case of binarization processing).
e: a regular pattern) appears.

Further, when the above filter coefficient is used, there is a problem that a multiplier is required at the time of error diffusion filtering so that the circuit scale becomes large and the speed becomes slow. In order to solve this problem, a method has been proposed in which the filter coefficient is set to a power of 2, but the texture becomes more conspicuous in the output image.

As a method of reducing the texture, there is a method of randomly arranging the filter coefficients, but the randomness is relatively low. A method of making the coefficient values random is also conceivable, but this requires a condition for setting the random coefficient (A + B + C + D) to 1, which makes it considerably complicated.

A method has been proposed in which only the mask and the logical product are used instead of the coefficient, but this is a high-speed method for reducing the texture by the synergistic effect of scanner variation noise. However, CG (Computer Graphics)
For images numerically generated by a computer such as, the randomness is small and the reduction of texture is not sufficient. Therefore, a method of randomizing a mask value in the bit mask method, a texture reduction by a logical operation of an error correction unit, and a texture reduction by performing a threshold operation itself by a logical operation have been proposed.

However, although any of the above methods is a measure for reducing the texture or high image quality, or to some extent to increase the processing speed compared with the conventional method, it has two main drawbacks. First, if the reading resolution is made fine, the memory capacity of the error buffer is correspondingly increased, which leads to an increase in cost. Another problem is that the processing speed reaches the limit when the processing clock is further increased.

[0017]

As described above, in the conventional configuration, as the reading resolution is increased, the required capacity of the error buffer is correspondingly increased, leading to an increase in cost. Furthermore, if the processing speed (processing clock) is increased, the limit is reached because pipeline processing (or parallel processing) is not possible with the current configuration.

Therefore, according to the present invention, the configuration of the error filter is
An object of the present invention is to reduce the memory capacity of the error buffer by switching the combination and the error filter for each pixel, and to speed up the pipeline processing (parallel processing).

That is, in the present invention, the conventional error filter is reconfigured into a plurality of filters, and the filters are switched for each pixel to be processed. As a result, it is possible to avoid an error that is diffused to the immediately adjacent pixel in the processing for each pixel and to make it possible to arrange every other pixel or every plural pixels, thereby enabling parallel processing and pipeline processing,
The processing speed is improved by reducing the number of times the error buffer is accessed.

Similarly, the memory capacity of the error buffer required is reduced by arranging every other pixel or a plurality of pixels for error diffusion in the next line.

[0021]

SUMMARY OF THE INVENTION An image processing apparatus according to the present invention uses binary / multivalued image data of a pixel of interest in a processing target image composed of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Means for outputting the corrected image data corrected by the error correction amount based on the digitized error diffusion, and binary / multivalued correction image data by this correcting means
A multi-value converting means, a calculating means for calculating an error between the binary / multi-valued image data binarized / multi-valued by the binary / multi-value converting means and the corrected image data by the correcting means, and a filter parameter. The generating means for generating, the filter parameter generated by the generating means and the error calculated by the calculating means are subjected to filtering for diffusing the multi-valued error to the peripheral pixels, and the next pixel in the main scanning direction with respect to the target pixel is detected. An error filtering unit that outputs an error correction amount to the pixel and an error correction amount to the next line in the sub-scanning direction with respect to the pixel of interest, and to the next line in the sub-scanning direction with respect to the pixel of interest output by the error filtering unit. A storage unit for storing the error correction amount, and an error correction amount for the next line in the sub-scanning direction with respect to the pixel of interest stored in the storage unit. The error filtering means is composed of control means for correcting the image data of the pixel of interest by the correction means based on the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering means. A filter group including a plurality of filters having different pixels for diffusing is provided, and filtering is performed by selectively switching the filter for each pixel or for each plurality of pixels.

The image processing apparatus of the present invention uses the binary / multi-valued error diffusion to convert the image data of the pixel of interest in the image to be processed which is composed of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. A correction means for outputting the corrected image data corrected by the correction amount, a binary / multivalued means for binarizing / multivalued the corrected image data by the correction means, and a binary / multivalued by the binary / multivalued means. Calculation means for calculating an error between the binarized binary / multi-valued image data and the correction image data by the correction means, a generation means for generating a filter parameter, a filter parameter generated by the generation means and the calculation means. Filtering that diffuses multi-valued errors to surrounding pixels is performed by calculation with the error calculated by, and the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the target image Error filtering means for outputting the error correction amount to the next line in the sub-scanning direction with respect to, and storage means for storing the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, And the error correction amount to the next line in the sub-scanning direction for the pixel of interest stored in this storage means and the error correction amount of the next pixel in the main scanning direction for the pixel of interest output by the error filtering means,
The error filtering means is composed of a control means for correcting the image data of the pixel of interest by the correction means. A plurality of pixels in the main scanning direction are simultaneously filtered by selectively switching the filters for each.

The image processing apparatus of the present invention includes a plurality of image data input in a stream of each pixel in the main scanning direction in the image to be processed which includes a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Converting means for converting into pixel-by-pixel image data, and outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by this converting means Correction means, and a plurality of corrected image data obtained by the correction means
Multi-value conversion means, and a plurality of binary / multi-valued image data which has been binarized / multi-valued by the binary / multi-value conversion means 1 in the main scanning direction
Outputting means for converting into a stream for each pixel and outputting it, calculating respective errors between a plurality of binary / multivalued image data by the binary / multivalued means and a plurality of corrected image data by the correcting means. Calculating means, generating means for generating a filter parameter, filtering for diffusing a multi-valued error to peripheral pixels by calculation of the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting an error correction amount to the next pixel in the main scanning direction and an error correction amount to the next line in the sub-scanning direction for the pixel of interest, and a sub-scanning direction for the pixel of interest output by this error filtering means Of the error correction amount to the line next to the pixel and the pixel of interest stored in this memory. The image data of the pixel of interest is corrected by the correction unit based on the error correction amount for the next line in the sub-scanning direction and the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering unit. The error filtering means is provided with a filter group including a plurality of filters having different pixels for diffusing an error, and a plurality of pixels in the main scanning direction are selectively switched for each pixel or for each plurality of pixels. Are to be simultaneously filtered.

The image processing apparatus according to the present invention includes a plurality of pieces of image data input in a stream of each pixel in the main scanning direction in an image to be processed which includes a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Converting means for converting into pixel-by-pixel image data, and outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by this converting means Correction means, and a plurality of corrected image data obtained by the correction means
Multi-value conversion means, and a plurality of binary / multi-valued image data which has been binarized / multi-valued by the binary / multi-value conversion means 1 in the main scanning direction
Outputting means for converting into a stream for each pixel and outputting it, calculating respective errors between a plurality of binary / multivalued image data by the binary / multivalued means and a plurality of corrected image data by the correcting means. Calculating means, generating means for generating a filter parameter, filtering for diffusing a multi-valued error to peripheral pixels by calculation of the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting an error correction amount to the next pixel in the main scanning direction and an error correction amount to the next line in the sub-scanning direction for the pixel of interest, and a sub-scanning direction for the pixel of interest output by this error filtering means Of the error correction amount to the line next to the pixel and the pixel of interest stored in this memory. The image data of the pixel of interest is corrected by the correction unit based on the error correction amount for the next line in the sub-scanning direction and the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering unit. The error filtering means is provided with a filter group composed of a plurality of filters having different pixels for diffusing an error, and the number of accesses to the storage means is selectively switched for each pixel or for each plurality of pixels. Is reduced and a plurality of pixels in the main scanning direction are simultaneously filtered.

The image processing apparatus according to the present invention includes a plurality of pieces of image data input in a stream of each pixel in the main scanning direction in an image to be processed which is composed of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Converting means for converting into pixel-by-pixel image data, and outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by this converting means Correction means, and a plurality of corrected image data obtained by the correction means
Multi-value conversion means, and a plurality of binary / multi-valued image data which has been binarized / multi-valued by the binary / multi-value conversion means 1 in the main scanning direction
Outputting means for converting into a stream for each pixel and outputting it, calculating respective errors between a plurality of binary / multivalued image data by the binary / multivalued means and a plurality of corrected image data by the correcting means. Calculating means, generating means for generating a filter parameter, filtering for diffusing a multi-valued error to peripheral pixels by calculation of the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting an error correction amount to the next pixel in the main scanning direction and an error correction amount to the next line in the sub-scanning direction for the pixel of interest, and a sub-scanning direction for the pixel of interest output by this error filtering means Of the error correction amount to the line next to the pixel and the pixel of interest stored in this memory. The image data of the pixel of interest is corrected by the correction unit based on the error correction amount for the next line in the sub-scanning direction and the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering unit. The error filtering means includes a first filter group including a plurality of filters having different pixels for diffusing an error, and every other pixel or every other pixel in the main scanning direction, or the next filter in the sub scanning direction. Perform error diffusion every other pixel or every other pixel in the line,
And a second filter group consisting of a plurality of filters with different pixels for diffusing an error, and every other pixel or every other pixel in the main scanning direction, or every other pixel or every plural pixels in the next line in the sub scanning direction, or Error diffusion is performed every other pixel or every plurality of pixels in the next line in the main scanning direction or the sub-scanning direction, and a third filter group including a plurality of filters having different pixels for diffusing the error is provided. Filtering is performed by selectively using one of the second and third filter groups.

The image processing apparatus of the present invention includes a plurality of image data input in a stream of each pixel in the main scanning direction in an image to be processed which includes a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. A conversion unit for converting the image data of each matrix of a plurality of pixels on a line, and the pixels of the matrix corrected by the error correction amount based on the binary / multi-valued error diffusion for the image data of each pixel of the matrix converted by this conversion unit. Correction means for outputting the corrected image data, and binary / multivalued correction image data of pixels of the matrix by the correction means.
Multi-value conversion means, converts the binary / multi-valued image data of the pixels of the binary / multi-valued matrix by the binary / multi-valued conversion means into a stream for each pixel in the main scanning direction and outputs the stream. Output means, calculating means for calculating respective errors between the binary / multivalued image data of the matrix pixels by the binary / multivalued means and the corrected image data of the matrix pixels by the correction means, and filter parameters. Generating means for generating, filtering for diffusing multi-valued error to surrounding pixels by calculation of the filter parameter generated by this generating means and the error calculated by the calculating means,
Error filtering means for outputting an error correction amount for the pixel of interest to the next pixel in the main scanning direction and an error correction amount for the pixel of interest to the next line in the sub-scanning direction, for the pixel of interest output by the error filtering device Storage means for storing the amount of error correction for the next line in the sub-scanning direction, and the amount of error correction for the next line in the sub-scanning direction for the pixel of interest stored in this storage means and the error filtering means. The error correction amount of the next pixel in the main scanning direction with respect to the target pixel, and the error filtering unit includes a plurality of different pixels in which the error is diffused. By providing a filter group consisting of the above filters, it is possible to selectively switch the filter for each pixel or for each multiple pixels. The is performed simultaneously filtering a plurality of pixels of the matrix with the number of accesses is reduced and more lines of the storage means.

The image processing apparatus according to the present invention uses the binary / multi-value conversion error of the image data of the target pixel consisting of a plurality of channels in the processing target image consisting of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Correcting means for outputting corrected image data of a plurality of channels corrected by an error correction amount based on diffusion, binary / multivalued means for binarizing / correcting the corrected image data of a plurality of channels by the correcting means, the two
Calculation means for calculating an error between the binary / multivalued image data of a plurality of channels binarized / multivalued by the value / multivalued means and the corrected image data of a plurality of channels by the correction means,
Generating means for generating a filter parameter, filtering for diffusing a multi-valued error to peripheral pixels by calculation of the filter parameter generated by the generating means and the error of a plurality of channels calculated by the calculating means is performed. An error filtering unit that outputs an error correction amount to the next pixel in the main scanning direction with respect to the target pixel and an error correction amount to the next line in the sub scanning direction with respect to the target pixel of a plurality of channels, and is output by this error filtering unit. Storage means for storing the error correction amount to the next line in the sub-scanning direction for the target pixel of the plurality of channels, and error correction to the next line in the sub-scanning direction for the target pixel of the plurality of channels stored in this storage means Quantity and the target pixel of a plurality of channels output by the error filtering means The correction unit is composed of control means for correcting the image data of the target pixel of a plurality of channels by the correction amount of the next pixel in the main scanning direction. The error filtering means diffuses the error for each channel. When a filter group including a plurality of filters having different pixels is provided and error diffusion is performed every other pixel or every other pixel in the next line in the sub-scanning direction, at least one channel is diffused in the sub-scanning direction. By using a filter in which the location of the pixel is different, the number of accesses to the storage means is reduced and a plurality of pixels of a plurality of channels in the main scanning direction are simultaneously filtered.

The image processing apparatus according to the present invention uses the binary / multi-value conversion error of the image data of the target pixel consisting of a plurality of channels in the image to be processed consisting of a plurality of pixels in the main scanning direction and a plurality of lines in the sub-scanning direction. Correcting means for outputting corrected image data of a plurality of channels corrected by an error correction amount based on diffusion, binary / multivalued means for binarizing / correcting the corrected image data of a plurality of channels by the correcting means, the two
Calculation means for calculating an error between the binary / multivalued image data of a plurality of channels binarized / multivalued by the value / multivalued means and the corrected image data of a plurality of channels by the correction means,
Generating means for generating a filter parameter, filtering for diffusing a multi-valued error to peripheral pixels by calculation of the filter parameter generated by the generating means and the error of a plurality of channels calculated by the calculating means is performed. An error filtering unit that outputs an error correction amount to the next pixel in the main scanning direction with respect to the target pixel and an error correction amount to the next line in the sub scanning direction with respect to the target pixel of a plurality of channels, and is output by this error filtering unit. Storage means for storing the error correction amount to the next line in the sub-scanning direction for the target pixel of the plurality of channels, and error correction to the next line in the sub-scanning direction for the target pixel of the plurality of channels stored in this storage means Quantity and the target pixel of a plurality of channels output by the error filtering means The error filtering means is composed of control means for correcting the image data of the target pixel of the plurality of channels by the correction amount of the next pixel in the main scanning direction, and the error filtering means is at least one of the plurality of channels. Error diffusion is performed using a filter with a fixed coefficient, and every other pixel or every other pixel in the main scanning direction, or every other pixel or multiple pixels in the next line in the sub scanning direction with respect to other channels. Every
Alternatively, error diffusion is performed every other pixel or every other plurality of pixels in the next line in the main scanning direction or the sub-scanning direction, and a filter group including a plurality of filters having different pixels for diffusing the error is provided. By performing error diffusion every other pixel or every plurality of pixels in the line, the number of accesses to the storage means is reduced and a plurality of pixels in the main scanning direction are simultaneously filtered.

According to the image processing apparatus of the present invention, the image data of the target pixel in the image to be processed which is composed of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction is used as an error based on binary / multi-valued error diffusion. A correction means for outputting the corrected image data corrected by the correction amount, a binary / multivalued means for binarizing / multivalued the corrected image data by the correction means, and a binary / multivalued by the binary / multivalued means. Calculation means for calculating an error between the binarized binary / multi-valued image data and the correction image data by the correction means, a generation means for generating a filter parameter, a filter parameter generated by the generation means and the calculation means. Filtering that diffuses multi-valued errors to surrounding pixels is performed by calculation with the error calculated by, and the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the target image Error filtering means for outputting the error correction amount to the next line in the sub-scanning direction with respect to, and storage means for storing the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, And the error correction amount to the next line in the sub-scanning direction for the pixel of interest stored in this storage means and the error correction amount of the next pixel in the main scanning direction for the pixel of interest output by the error filtering means,
The error filtering means is provided with a filter group including a plurality of filters having different pixels for diffusing an error, and the pixel group is provided for each line in the sub-scanning direction. The filtering is performed by selectively switching the filters in a different order for each or a plurality of pixels.

The image processing apparatus of the present invention uses the binary / multi-valued error diffusion based error of the image data of the pixel of interest in the image to be processed which is composed of a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. A correction means for outputting the corrected image data corrected by the correction amount, a binary / multivalued means for binarizing / multivalued the corrected image data by the correction means, and a binary / multivalued by the binary / multivalued means. Calculation means for calculating an error between the binarized binary / multi-valued image data and the correction image data by the correction means, a generation means for generating a filter parameter, a filter parameter generated by the generation means and the calculation means. Filtering that diffuses multi-valued errors to surrounding pixels is performed by calculation with the error calculated by, and the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the target image Error filtering means for outputting the error correction amount to the next line in the sub-scanning direction with respect to, and storage means for storing the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, And the error correction amount to the next line in the sub-scanning direction for the pixel of interest stored in this storage means and the error correction amount of the next pixel in the main scanning direction for the pixel of interest output by the error filtering means,
The error filtering means is composed of a control means for correcting the image data of the pixel of interest by the correction means, and the error filtering means performs error diffusion every other pixel or every plurality of pixels in the main scanning direction, and a plurality of different pixels for diffusing the error. Error diffusion is performed every 1 pixel or every 2 pixels in the main scanning direction, or every 1 pixel or every 2 pixels in the next line in the sub scanning direction, and the error is diffused. A second filter group composed of a plurality of filters having different pixels, and every other pixel or every other pixel in the main scanning direction, every other pixel or every other pixel in the next line in the sub scanning direction, or in the main scanning direction or the sub scanning direction. Pixels that perform error diffusion every other pixel or every plurality of pixels in the next line in the scanning direction, and diffuse the error Third made from different filters
Is provided, and filtering is performed by switching the first, second, and third filter groups periodically or randomly for each line in the sub-scanning direction.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

Although the present invention will be described mainly for the purpose of obtaining binarized data as an output image, the present invention is not limited to this case, and may be for obtaining multi-valued data as an output image. It is possible.

FIG. 1 schematically shows the structure of an image processing apparatus according to the present invention.

In FIG. 1, for example, with respect to an image (input image) read by a scanner, input image data 1A which is image data of a plurality of bits (for example, 8 bits).
Are input to the input image conversion means 2A of this image processing apparatus. The input image conversion means 2A is for converting the input image data 1A according to the image processing (gradation processing) to be performed thereafter. Since this conversion differs depending on the input method, the processing method, etc., it will be described in detail when the detailed description of the embodiment is given. For example, when gradation processing is performed using the memory reduction filtering method of the error buffer 13 described below, the input image conversion unit 2A outputs the input image data 1A as it is as the converted input image data 1. Further, in the case of high-speed gradation processing, since a plurality of pixels in the main scanning direction or the sub-scanning direction are simultaneously processed, pixels in the main scanning direction or the sub-scanning direction are collectively output (two pixels in the main scanning direction). In the case of parallel processing, the pixel streams 1, 2 of the processing target line,
, 3, etc. in units of two pixels (1, 2), (3, 4),
... and so on).

The converted input image data (hereinafter referred to as input pixel data) 1 is first input to the error correction means 2. Then, in the error correction means 2, the input pixel data 1 for each pixel is output from the error filtering means 10 described later from the error correction amount 11 to the adjacent pixel (hereinafter simply referred to as the correction amount eT) and the previous line. The correction is performed by the diffused error correction amount 14 (hereinafter simply referred to as correction amount eP).
The correction control is performed by the error correction control signal 17 generated from the control signal generating means 15 described later. The corrected image data 3 corrected by the error correction unit 2 is supplied to the threshold value processing unit 4 and the error calculation unit 6.

The threshold value processing means 4 is used for the corrected image data 3
Is converted into 1-bit binary data or 2-bit or more multi-valued data and output as output image data 5. The output image data 5 output from the threshold processing means 4 is supplied to an output device such as an external printer or display device via the output image converting means 4A,
A duplicate image of the input image is generated and the error calculating means 6
It is supplied to.

The output image converting means 4A converts an image similarly to the input image converting means 2A, and converts an output image in accordance with the image processing (gradation processing) means and the subsequent output means.

For example, when a printer that performs image processing on two pixels in parallel and outputs one pixel at a time is used as an output device, the output image data 5 output at every two pixels at the same time from the threshold process is output on one pixel. After conversion as a stream, it is output as output image data 5A to the printer. As described above, the means for performing conversion in accordance with the request from the output side of the image processing device differs depending on the case, and will be described in detail in the detailed description of the embodiment.

The error calculating means 6 calculates the corrected image data 3
And the output pixel data 5 is used to calculate the error of the binarized data or the multivalued data obtained by performing threshold processing on the pixel of interest. The error signal 7 calculated by the error calculating means 6 is the error filtering means. It is designed to be supplied to 10.

The error filtering means 10 receives the error signal 7 from the error calculating means 6 and the filter parameter 9 output from the filter parameter generating means 8, and
Based on the set filter configuration, the filter (error filter) is switched for each pixel and for every plurality of pixels to perform the filtering process, and the error correction amount 12 corresponding to the next line (hereinafter simply referred to as eN). ) And a correction amount eT that is diffused to neighboring pixels on the same line are output.
The filter switching control and the like are performed by the filter switching control signal 19 generated by the control signal generating means 15 described later.

The filter parameter generating means 8 generates a plurality of filter parameters according to the settings and supplies them to the error filtering means 10. Control such as randomization of filter parameters is controlled by a filter parameter control signal 20 generated by a control signal generating means 15 described later.

The error buffer 13 is a storage means for storing the correction amount eN to be diffused to the next line supplied from the error filtering means 10, and the error correction means 2 stores the correction amount eN from the previous line corresponding to the target pixel to be processed. The correction amount eP is supplied. Writing / reading control of the error buffer 13 is controlled by a buffer control signal 18 generated by a control signal generating means 15 described later.

The control signal generating means 15 generates a control signal for controlling writing, reading, etc. of the filter parameter generating means 8, the error correcting means 2, the error filtering means 10, and the error buffer 13.

The external interface means 16 is an input / output interface capable of externally setting the threshold value processing means 4, the filter parameter generating means 8, the error filtering means 10 and the like in consideration of processing speed, cost and the like (for example, , Touch panel, LCD display, keyboard, CRT display).

Next, detailed description of each block will be given through some embodiments.

First, an embodiment relating to the reduction of the access count of the error buffer 13 (or the memory capacity of the error buffer 13) by switching the filter will be described with reference to FIG.

In FIG. 2, since the image processing is performed for each pixel, the input conversion means 2A is unnecessary, and the input image data 1A of FIG. 1 and the converted input image data 1 are the same. Similarly, since the output conversion processing means 4A is unnecessary,
The output image data 5 after the threshold processing and the output image data 5A after conversion in FIG. 1 are the same.

The external interface 16 shown in FIG.
Is an interface that is generally used for externally setting parameters such as filter parameters inside the image processing apparatus and processing selection, and is similarly used in the following embodiments.

2 is similar to FIG. 1, except that error correction means 2, threshold value processing means 4, error calculation means 6, filter parameter generation means 8, error filtering means 10,
The error buffer 13 and the like are provided, and the details thereof will be described.

FIG. 3 shows a specific example of the configuration of the error correction means 2.

The error correction means 2, as shown in FIG. 3, has adders 100 and 102 and a flip-flop circuit (F / F).
101, 109 and selectors 103, 104.

In the adder 100 shown in FIG. 3, the output 105 of the selector 103 is added to the input image data 1 and the input image 1 is corrected by the correction amount from the previous line.
06 is output.

The selector 103 outputs 0 when the select signal 17A, which is a part of the error correction control signal 17 from the control signal generating means 15 described later, is 0, and when the select signal 17A is 1, the signal from the previous line is output. The correction amount eP is used as the output 105 and is supplied as one input to the adder 100.

The input image 106 corrected by the correction amount of the previous line is delayed by one clock in synchronization with the image clock by the flip-flop circuit (F / F) 101, output as delayed data 107, and added by the adder. 1
02.

In the adder 102, the delayed corrected image 1
The output 108 of the selector 104 is added to 07, and the corrected image data 3 is output.

The selector 104 sets the output 108 to 0 when the select signal 17B, which is a part of the error correction control signal 17 from the control signal generating means 15 described later, is 0, and otherwise corrects the error from the previous pixel. The amount eT is delayed by one pixel by the flip-flop 109, and the output 110 is output 108.
And

Next, details of the threshold value processing means 4 of FIG. 2 will be described with reference to FIGS.

FIG. 4 shows threshold value processing means by comparison calculation.
Particularly, in order to obtain multi-valued data as the output pixel data 5, the number of output levels corresponding to the desired number of bits as the multi-valued data (for example, if the number of bits of the multi-valued data is 4, The number may be 16 values. In order to obtain the binarized data as the output image data 5, the number of output levels may be set to 2.

In FIG. 4, the number of output levels will be described as (l + 1).

Comparing with the output levels 0, 1, 2, ..., 1, comparators Η1, Η2, Η3, ..., Ηl are provided, and each comparator has corrected image data from the error correcting means 2. 3 is input, and thresholds Τh1 to Thl predetermined according to the output levels of the respective comparators Η1, Η2, ..., Ηl are input.
Respectively, and the comparison results ΗΟ1, ΗΟ2,
…, Output Ηol respectively.

Each comparator Η1, H2, ..., Ηl (Ηi, i
= 1 to 1), the corrected image data 3 is compared with the threshold value set for each, and when the corrected image data 3 is smaller than the threshold value Thi, "0" is output as the comparison result Η0i. , Otherwise, outputs “1” as Η0i.

The encoder 150 encodes the comparison result Η0i, and outputs 1 type of multi-valued data as output image data 5 corresponding to the comparison result Η0i. At that time, a specific example of the correspondence between the comparison result Η0i and the multi-valued data (output image data) 5 output from the encoder 150 is shown in FIG.

When the binarized data is obtained as the output image data 5, there are only two levels "0" and "1", so that the configuration shown in FIG. 6 is possible.

In FIG. 6, the comparator 151 has a threshold value Th1.
And the corrected image data 3 are compared with each other. If the corrected image data 3 is smaller than the threshold value Th1, "0" is output, and otherwise, "1" is output.

The threshold value processing means 4 may have various configurations other than these. For example, as shown in FIG.
A specific example for obtaining the binarized data will be described with reference to FIG. 7.

In FIG. 7, for example, 1 bit × 1K R
Binarization processing is possible by previously writing the binarized data corresponding to all possible post-correction image data 3 in the AM 152 and using the post-correction image data 3 as the address signal of the RAM 152. Note that RAM1
The conversion information written in 52 is, for example, a CPU not shown.
May be read from a ROM in which conversion data (not shown) is stored in advance and written in the RAM 152. A ROM may be used instead of the RAM 152.

The threshold value processing means for obtaining the binarized data as shown in FIGS. 6 and 7 can set the threshold value Th1 from the outside.

On the other hand, when the threshold value Th1 is fixed, a configuration as shown in FIG. 8 is possible.

FIG. 8 shows, using a logic circuit, for example, Τh1 = 7F as a threshold value (hexadecimal notation;
(Expressed as Fh), the corrected image data 3 is 7
When it is smaller than Fh, the output data 5 becomes "0",
Other than that, the logic is set to be "1".

For example, as shown in FIG. 9, the corrected image data 3 has a sign 1 bit (b9) and an absolute value bit (b0).
To b8) and the bit expansion of the threshold value Th1 = 7Fh is “01111111”, the lower bits (b0 to b0) of the image data 3 corrected by the AND circuits A1 to A3 are shown in FIG. b6) The output of the AND circuit A3 is "1" when all are 1, and "0" otherwise. Further, the OR circuit A4 outputs the output of the AND circuit A3 and the 8th bit (b
7), the 9th bit (b8) of the corrected image data 3 is input. When the corrected image data 3 is larger than Τh1, one of the other two inputs of the OR circuit A4 becomes “1”.

The sign bit of the corrected image data 3 and the output of the OR circuit A4 are input to the AND circuit A5,
When the corrected image data 3 is negative, the output of the AND circuit A4 is forcibly set to "0". Therefore, when the corrected image data 3 is equal to or greater than 7Fh, the output of the AND circuit A5 is "1", and otherwise is "0".

Although the case where the threshold value Th1 is 7Fh has been described here, the comparison circuit can be similarly configured even when the threshold value Th1 is other than 7Fh.

As described above, the threshold value processing means by the logic circuit has a small circuit scale and is capable of high-speed comparison operation, but the drawback is that the threshold value is fixed and external setting is impossible.

Next, the error calculating means 6 of FIG. 2 will be described with reference to FIG.

In FIG. 10, the error calculating means 6 is a bit converting means 6a for converting the output image data 5 (binarized data or multi-valued data) output from the threshold processing means 4 into 8 bits, and this bit. It is composed of a subtractor 6b for calculating an error between the converted data supplied from the converting means 6a and the corrected image data 3, and the subtractor 6b outputs the error signal 7
Is output.

For example, when the output image data 5 is binarized data, the bit converting means 6a is constructed by using an 8 bit × 2 memory (eg ROM), and the threshold value Th (1) =
When the binary data is “0” for 7Fh, the converted data is “00h”, and when the binary data is 1, the converted data is “FFh” (“h” is a hexadecimal value). Shown).

Similarly, when the output image data 5 is multi-valued data, a plurality of memories are used corresponding to the output levels.
It suffices to obtain each conversion data.

Next, the filter parameter generating means 8 will be described with reference to FIGS. 11 to 18.

FIG. 11 shows a model of an error filter of the conventional error diffusion method. By correcting the values of the peripheral pixels A, B, C, and D corresponding to the binary / multi-valued error of the pixel of interest indicated by *, the entire gradation is preserved. The coefficient values corresponding to the A, B, C, and D pixels change depending on the filter method, but in the conventional method of multiplying the coefficient by the error, the coefficients K A, K, KC, and KD corresponding to A, B, C, and D, respectively. Must sum to 1.

That is, K A + K K + K C + K D = 1 On the other hand, in the filtering method based on the logical product of the error and the coefficient (referred to as this method mask), the mask values are MA, M, M.
Assuming C and MD, the total sum is 255 (when the maximum error corresponds to 8 bits), that is, MA + M ++ MC + M
When D = 255 and MA, M, MC, and MD are all considered comprehensively, each bit must be 1 only once.

Hereinafter, the filtering method by multiplication of the coefficient and the error will be called "filtering by arithmetic operation", and the filtering by logical product of the mask and error will be called "filtering by logical operation". The conditions for setting the filter value for each method are as follows.

A) Filtering by arithmetic operation 1) Sum of filter coefficients = 1.0 B) Filtering by logical operation 1) Sum of mask values = 255 (absolute value of maximum error = 8 bits) 2) Total of all masks In the case of consideration, each bit is 1 only once.

In the present invention, unlike the prior art, FIG.
(A) and (b), FIG. 23 (a) to (d), and FIG. 24 (a) to
As shown in (c) and the like, a plurality of filters are used, and processing is performed while switching the filters for each pixel or for each plurality of pixels.

First, some filter configurations that can be used to reduce the number of times of writing and reading of the error buffer 13 and the memory capacity will be described.

Filter F1 and filter F2 shown in FIG.
It is possible to reduce the number of times of writing / reading (the number of times of access) of the error buffer 13 and the memory capacity by switching between each pixel for each pixel and performing the processing. In FIG. 13, the filter F1 is used for odd-numbered pixels such as pixels 1, 3, 5, ... Of each line, and the filter F2 is used for even-numbered pixels such as 2, 4, 6 ,. As shown in, since the error is diffused only to the odd-numbered pixels of the corresponding next line, the number of times of writing and reading of the error buffer and the memory capacity are halved. Similarly, the filter F2 is set to an odd number of pixels,
If 1 is used for even-numbered pixels, the error is diffused only to even-numbered pixels on the next line, so that the same effect can be obtained.

In the case of filtering by logical operation,
Filter of FIG. 12 = mask value M of adjacent pixels A and C of F1
The sum of A and MC is 255, which satisfies the condition 2) of condition B, and the sum of mask values MA, M B, and MD of adjacent pixels A, B, and D of the filter F2 is 255, and condition 2) of condition B is satisfied. Is satisfied. Similarly, in the case of filtering by arithmetic operation, the sum of the coefficients of the filter F1 and the sum of the coefficients of the filter F2 are set to be 1, respectively.

Next, the filter F1 and the filter F in FIG.
In Example 2, an example of mask value generation based on a logical operation will be described.

As shown in FIGS. 14A and 14B, the simplest example is externally set in advance so as to satisfy the above condition B. For example, the total sum of mask values in the filter F1 shown in FIG. 14A is 255, which satisfies the above condition 1). Furthermore, the mask M of FIG.
When A1 and MC1 are comprehensively considered, each bit is set to 1 only once, and the condition 2) of condition B is also satisfied. Similarly, the filter F2 shown in FIG. 14B is set to satisfy the condition B. Although the mask value MC of the filter F1 in FIG. 14A is set to be the same as the mask value MA of the filter F2, a completely different value may be set instead. In that case, the maximum error value may increase a little due to the threshold value and the like, and the memory capacity of the error buffer 13 may increase slightly more than half (error buffer 1
The number of addresses in 3 is halved, but the number of bits in each address may increase).

In addition to the settings shown in FIGS. 14 (a) and 14 (b), various settings satisfying the above conditions B) 1) and B) 2) are possible. Similarly, in the arithmetic operation, the coefficient may be set instead of the mask value so that the above condition A-1) is satisfied.

The error filtering method by arithmetic operation is
Although there are problems such as texture generation and filtering due to multiplication, etc., the "logical operation filtering method" is a process that has improved the texture problem and improved filtering by simplifying the circuit. The generation of a random mask is considered as a further improvement plan for the texture problem.

Next, FIG. 15 shows random generation of mask values in the filter of FIG. FIG.
It corresponds to the filter F1 of FIG.
FIG. 12B corresponds to the filter F2 in FIG. In FIG. 15A and FIG. 15B, M
1 and M2 are so-called M sequences, which are maximum period pseudo-random sequences having a period (2m-1) corresponding to the degree m.

The logical inversion processing units N1 and N2 perform a logical inversion process for each bit, and the logical product processing unit L1 performs a logical product for each bit. M shown in FIG.
A1 and MC1 are mask values corresponding to the adjacent pixels A and C of the filter F1, and MA2 and MB shown in FIG.
2, and MD2 are adjacent pixels A, B, and D of the filter F2.
Is a mask value corresponding to. Although FIG. 15 uses the M-series of the order 8, it is also possible to generate the M-series of the order 9 or higher and use only any 8 bits from the M-series.

Further, as shown in FIG. 16, M bits of M11 (3rd order), M12 (3rd order), and M13 (2nd order) are set to 8 bits.
It is also possible to divide it into a series and use it as a combination of orders less than 8. In addition, M1, M2, and the like have different orders (for example, orders 8 and 9) or have the same order and different characteristic polynomials (Character) as described later.
It is also possible to generate them by using the elastic polynomials, or to generate them by two shifts so that they are independent of each other in the same M sequence.

Corresponding to the filter F1 of FIG.
Masks MA1 and MC1 generated by FIG.
And FIG. 15 corresponding to the filter F2 in FIG.
Masks MA2, M2, MC generated by (b)
In the case of No. 2, since the conditions 1) and 2) of Condition B are satisfied, the error is diffused without omission.

A concrete example of the M-sequence (pseudo-random sequence) generating means is shown in FIG. This is the characteristic polynomial (Cha of
This is a concrete example of a racististic polynomial. All operations are Galwa
oisField) 2 operation (binary XOR operation in short).

X8 = Δ5 + X3 + X1 + Δ0 The M-sequence generating means shown in FIG. 17 includes shift registers (composed of flip-flop circuits) 170a-1.
70h and exclusive OR circuits 171a and 171
b and 171c, each shift register 170a
The initial value of 170h to 170h is other than "0", and each bit (170a to 17a) of each register is synchronized with the control clock signal input from the control clock generating means.
0h) is shifted to the right, the value output from each register, that is, the mask value is random (pseudo) only once within one cycle (255) clocks for the values of “01h” to “Ffh”. Is configured to appear in. If another polynomial is used, the order of appearance of the output changes.

Similarly, in the above-mentioned "filtering by arithmetic operation" method, it is also possible to randomly generate coefficients so as to satisfy the condition 1) of condition A.

It is also possible to preset the coefficients and mask values as many as the number of neighboring pixels of the corresponding filter and use those values at random as the mask values and coefficients of neighboring pixels.

For example, the two mask values shown in FIG. 14A correspond to the filter F1 shown in FIG.
2 and corresponding to the filter F2 in FIG.
4 (b) has three mask values m1, m2, m3,
A lookup table of (2 × 16) shown in FIG. 18 (a) and (6 × 24) shown in FIG. 18 (b) is created, and in the case of FIG. By using an arbitrary 1 bit as an address and setting the contents of the corresponding table to MA1 and MC1, it is possible to randomize the position of the preset mask. Similarly, in the case of FIG. 18B, an M series of third order or higher is generated, any 3 bits are selected, and the remainder when the value is divided by 6 is used as an address, and the corresponding table By setting the contents to MA2, M2, and MD2, the position of the mask can be set randomly.

Here, the randomization of the mask position will be described, but the method of randomizing the coefficient positions is also the same. Similarly, it is possible to use other random number generating means.

Next, details of the control signal generating means 15 of FIG. 2 will be described. The control signal generating means 15 is means for generating a control clock for controlling randomization of filter parameters.

FIG. 19 shows an embodiment of the control signal generating means for each line, and the corresponding timing charts are shown in FIG.
(G). The line synchronization signal 22 shown in FIG.
Inverted signal 185d by inverter 185a of FIG.
(Shown in (c)), and the line synchronization signal 22 is delayed by one pixel by the flip-flop circuit 185b.
A line control clock 185f required for randomization for each line is output by the logical product of the AND circuit 185c of e (shown in FIG. 20D).

In generating the line control clock 185f for each pixel, the input pixel clock 21 itself shown in FIG. 20A is output as the pixel control clock, and the selector 185h outputs the select signal 185g to 0.
In this case, the line-by-line control clock 185f is output as the filter parameter control signal 20, and the select signal 18
When 5g is 1, the pixel clock 21 is output as the filter parameter control signal 20. Select signal 18
5g is set by the external interface.

Depending on the setting, randomization is performed for each pixel clock 21 based on the pixel clock 21 or for each multiple pixel clock, or for each line or multiple lines based on the line synchronization signal 22. It is also possible to generate a control signal for

One advantage of randomizing the filter parameter for each line or a plurality of lines is that the required number of bits of the error buffer 13 can be controlled (for example, 9-bit FIFO).

The select signal 17B controls the correction signal from the adjacent pixel. In the filters of FIGS. 12 (a) and 12 (b), the error is diffused for each pixel.
As shown in (g), it is already in the high (1 or Vcc) state. In addition, select signal 17 from the previous line
A, the filtering switching control signal 19, the buffer control signal 18 as the write / read control signal of the error buffer 13 and the like are performed every other pixel, so that the pixel clock 21 of FIG. 19 is divided in synchronization with the line synchronization signal 22. Use what you did. In this case, it is composed of a frequency divider 185i and an inverter circuit 185k that inverts the frequency division output 185j of the frequency divider 185i. The timing is shown in FIG.

Although there are various error filter configurations as described later, the error filtering means 10 of FIG. 2 will be described by taking the filters of FIGS. 12 (a) and 12 (b) as an example. The filtering means 10 receives the binary / multi-valued error from the error calculating means 6 and the filter parameter 9 generated from the filter parameter generating means 8 and distributes the correction amount to adjacent pixels with the error as the correction amount. Is. The error filtering means 10 may be a “filtering means by arithmetic operation”, a “filtering means by logical operation” or the like as described above, but here, the error amount output from the error calculating means 6 is the error signal 7 of the city. The filtering by the logical operation of the filter parameter 9 as the filter mask value output as a parameter from the filter parameter generating means 8 will be described.

The details of the filter based on the logical operation of the error and the mask will be described with reference to FIG. The error filtering means 10 in FIG. 21 is composed of a filter switching means 21, a bit masking means 22, two flip-flop circuits 23a and 23b as delay circuits, and two adders 24a and 24b. Further, the filter switching means 21 includes four selectors 21a to 21d.
The bit mask means 22 is composed of four bit mask operation means 22a to 22d.

The error buffer 13 of FIG. 21 is composed of a line buffer 25, which is a first-in-first-out buffer.

The filter switching means 21 shown in FIG. 21 is driven by the filter switching control signal 19 shown in FIG. 22 (h) generated by the control signal generating means 15 shown in FIG.
2 (c) to (f). That is, in the case of odd-numbered pixels, only the mask values MA1 and MC1 corresponding to the filter F1 shown in FIG. 12A are output to the adjacent pixels A, B, C, and D through the selectors 21a to 21d, and the other values are 0. And Similarly, in the case of odd-numbered pixels, adjacent pixels through the selectors 21a to 21d,
In A, B, C, and D, only the mask values MA2, MB2, and MD2 corresponding to the filter F1 shown in FIG. 12B are output, and the other values are set to 0.

On the contrary, by inverting and using the control signal 19, the odd number of pixels is applied to the filter F of FIG.
2 and an even number of pixels, the filter F1 in FIG. 12A can be used. Here, the same filter is used in the first pixels of all lines, but it is also possible to switch it for each line or randomly.

In this embodiment, the error filtering means 10 based on the logical operation of the bit and the mask uses the configuration of the filter shown in FIG. 12 as described above, and the filter is switched for each pixel, that is, on the same line as the target pixel. A filter F1 that calculates a binarization error correction amount for the pixel immediately next to it and the pixel immediately below it adjacent to the next line, the pixel next to the pixel next to the same line as the pixel of interest, and the lower left and right after the adjacent line. The filter F2 for calculating the binarization error correction amount is switched for each pixel to perform filtering, and the mask values MA1, MC1, MA2, MΒ in the corresponding adjacent pixels are filtered.
2, MD2 (file parameter 9) is input from the filter parameter generating means 8 shown in FIG.

The error to be diffused to each peripheral pixel is calculated by the bit mask calculating means 22a to 22d. It is calculated by a bit mask operation of the error signal 7 and the outputs MA, MΒ, MC, MD of the filter switching means 21 as shown in Fig. 22 (g), and the respective errors eA, eΒ, eC, eD to be diffused. can get. As a result, the error correction amount 11 (e
T) and the error eD and error eC delayed by one pixel and the error eB delayed by two pixels are combined into one and output as the error correction amount 12 (eN) to the pixel of the next line. .

An example of the timing is shown in FIG. 22 (g).
Shown as the filter output of. Further, the control signal generating means 15
When the buffer control signal 18 generated from the buffer control signal 18 is used as the buffer write / read signal, for example, the line buffer 25 is output only when the buffer control signal 18 is high (level 1).
Read and write the required error correction amount 1
2 (eN) (that is, data excluding 0) can be stored, and the memory capacity of the error buffer 13 can be reduced by half compared to the conventional case.

The details of the filter based on the logical operation of the error and the mask have been described above, but the filter based on the arithmetic operation of the error and the coefficient can be realized by the same configuration.
However, the filter parameter generating means 8 in FIG. 2 uses the coefficients KA1 and KC in the filter F1 instead of the mask value.
1. Coefficients K2, K2, K2 in filter F2
Occurs. Further, in the error filtering means 10, filtering by arithmetic operation (multiplication) may be substituted for the bit mask operation of the bit mask operation means 22a to 22d of FIG.

In the above embodiment, the details have been described by taking the filters of FIGS. 12 (a) and 12 (b) as an example, but various configurations other than this are conceivable. Figure 2
3 (a)-(d) and FIGS. 24 (a)-(c).

The filter shown in FIG. 23 has the same structure as that shown in FIG.
It is composed of four filters F1 to F4 shown in (d), and by repeating each filter F1 to F4 every four pixels, the number of accesses to the error buffer 13 and the half of its memory capacity can be achieved.

For example, considering filtering by a logical operation of an error and a mask, pixels 1, 5 in the main scanning direction,
, ..., and the like, with the filters F1 of the masks MA1 and MC1,
The mask MA2 for the pixels 2, 6, 10, ..., And the mask F2 for the filter F2 of the MD2, and the mask MA for the pixels 3, 7, 11 ,.
3. Filtering is performed by using the filter F3 of M3 and the filter F4 of the masks MA4 and MC4 for the pixels 4, 8, 12 ,. The tiling is shown in Figure 2.
5, FIG. 26 and FIG.

The tiling in FIG. 25 performs filtering by using the filters F1 to F4 for each line (sub-scan) as described above. Therefore, the error is diffused from the previous line to the pixels 1, 4, 5, 8, 9, 12, 13, ... In each main scanning direction, and the buffer is halved if only the information in that pixel is written and read. To be done. In the above, the filter for pixel 1 is F1, but F2 is used instead of F1, and filters F2, F
You may switch in order of 3, F4, and F1.

However, in this case, the error is diffused from the previous line to the pixels 3, 4, 7, 8, 11, 12, ... In each main scanning direction. It is also possible to use the filter F3 instead of F1 and switch the order of the filters F3, F4, F1 and F2, or use the filter F4 instead of F1 and switch the order of the filters F4, F1, F2 and F3. It is possible. Correspondingly, in these two cases, the pixels 2, 3, 6, 7, 10, 1 in the respective main scanning directions are respectively provided.
, Etc., or pixels 1, 2 in each main scanning direction,
The error is diffused to the lines 5, 6, 9, 10, 13, 14, ...

In the tiling of FIG. 26, similarly to the above, in the first line, the fifth line, the ninth line, ..., The filter F1 is used for the pixels 1, 5, 9 ,. , Etc., and the filter F3 is used for pixels 3, 7, 11 ,.
4 is used for the pixels 4, 8, 12, ..., But in the second line, the sixth line, the tenth line, ..., the filter F2 is used for the pixels 1, 5, 9 ,. F
3 is used for pixels 2, 6, 10, ..., The filter F4 is used for pixels 3, 7, 11, ..., And the like, and the filter F1 is used for pixels 4, 8, 12 ,. , The seventh line, the eleventh line, etc., the filter F3 is used for the pixels 1, 5, 9, ..., And the filter F4 is used for the pixel 2,
, 10, etc., and the filter F1 is used for pixels 3, 7,
11, etc., and filter F2 pixels are 4, 8, 1
, Etc., and in the fourth line, the eighth line, the twelfth line, etc., the filter F4 is used for the pixels 1, 5, 9,
... and so on, and the filter F1 is used for pixels 2, 6, 10, ...
, Etc., the filter F2 is used for the pixels 3, 7, 11, ..., And the filter F3 is used for the pixels 4, 8, 12, .. Is.

That is, the filters in the first pixel can be repeated every four lines as F1, F2, F3, and F4 in the sub-scanning direction. In this case, the error is diffused from the first, fifth, ninth, ... Lines to the pixels 1, 4, 5, 8, 9, 12, 13 ,. , 2nd, 6th, 10th, ..., etc. lines to 3rd, 7th, 11th ,.
The error is diffused to 1, 12, ...
The error is diffused to the pixels 2, 3, 6, 7, 10, 11, ... Of the lines of the fourth, eighth, 12, ... 5, 9, 1
The error is diffused to the pixels 1, 2, 5, 6, 9, 10 ,. Therefore, unlike FIG. 25, the error writing and reading positions change line by line in a 4-line cycle, but the memory capacity of the error buffer 13 is halved.

Although it has been described here that the filters in the first pixel in the sub-scanning direction are F1, F2, F3, and F4 and the filter is repeated for each line in the same manner as in FIG. 25, the filter for the first pixel in the sub-scanning direction is described. (F2, F3, F4,
It is possible to perform in the order of (F1), the order of (F3, F4, F1, F2), or the order of (F4, F1, F2, F3). However, the diffused pixel position of each line also changes correspondingly.

Similarly, using FIG. 27, it is possible to repeatedly switch the filters starting from the filters F1 and F3 every two lines in the sub-scanning direction.
In this case, the pixels 1, 4, 5, 8 from the first, 3, 5, ... Lines to the second, 4, 6 ,.
The error is diffused to the pixels of 9, ..., And the like, and from the lines of the second, 4, 6 ,,.
The error is diffused to 3, 6, 7, 10, 11 ,. Therefore, the error writing and reading positions change line by line in a two-line cycle.

Further, the filters (F3, F
1) In order, filter (F2, F4) or filter (F
The filtering can be repeated in the order of 4, F2), and the pixel positions to be diffused correspondingly also change.

When the tiling of FIG. 26 is used, the start of the filter is determined periodically in the sub-scanning direction, but the start filter can be set randomly by randomizing it. For example, in the example of FIG.
In the lines such as 5, 9, ..., The filters (F1, F
2, F3, F4) in the order of the second, sixth, tenth, ..., etc. lines, in the order of filters (F2, F3, F4, F1), in the third, 7, 11, ... Filter (F3, F4, F1, F2) order, and fourth, eighth, first
For lines such as 2, ..., Filters (F4, F1,
Since the filters are switched in the order of F2 and F3), there is periodicity. In order to break the periodicity, it is possible to randomly select one from the above four switching orders for each line. However, in this case, it is necessary to store the error because the pixel order in which the error is diffused to the next line changes depending on the selection of the filter.

For example, filters (F1, F2, F3, F
4) is 00, filters (F2, F3, F4, F1) are 0
Label 1, filter (F3, F4, F1, F2) 02, filter (F4, F1, F2, F3) 03.
An M sequence of 3rd order or more is used, and arbitrary 2 bits or output of the M sequence 0-3 operation (output divide 3
If the remainder) is selected as a filter, one of the above is selected. If random occurrence is 00, 03, 01,
, Etc., the diffusion points from the first line to the second line are 1, 4, 5, 8, 9 ... Pixels, and the diffusion points from the second line to the third line are 1. 2, 5,
6, ... Pixels, and the diffusion points from the third line to the fourth line are 3, 4, 7, 8, 11, ... Pixels.
Since the random number changes depending on the random generation method, the initial value, etc., it is necessary to regenerate the corresponding writing order of the preceding line for error reading of the processing target line.

The above filters (F1, F2, F3, F
As a combination of switching in the order of 4), 24 combinations are possible as shown in the table of FIG. All of them can be used except the combination (shown as NG) in which the filter F3 is applied and then the filter F2 is applied, but the tiling and the like in that case differ depending on each case. It is also possible to change the usable combination for each line periodically or randomly.

Up to now, the filter configuration capable of reducing the number of accesses of the error buffer 13 and the memory capacity to half has been described, but if the configurations as shown in (a) to (c) of FIG. The memory capacity can be reduced to 1/3. 24 (a)-
Filter F1, filter F2, and filter F shown in (c)
3 can be used by a combination of switching the order of filters (F1, F2, F3), switching the order of filters (F2, F3, F1), and switching the order of filters (F3, F1, F2). Examples of tiling in the filters shown in (a) to (c) of FIG. 24 are shown in FIGS. 29, 30, and 31.

In the tiling Τ1 shown in FIG. 29, as shown in FIG.
Each of the filters shown in (a) to (c) of 4 is switched in the order of filters (F1, F2, F3) for each line to perform filtering. That is, in each line in the sub-scanning direction, the filter F1 is used in the order of pixels 1, 4, 7, 10, ..., The filter F2 is used in the order of pixels 2, 5, 8 ,. Filtering is performed by using 6, 9, ... In this order. In this case, the error is diffused from the previous line to the pixels 2, 5, 8, 11, ... Of each line.

Further, as described above, the order of filters is from filter (F1, F2, F3) to filter (F2, F).
3, F1) may be changed in this order. However, in this case, the error is diffused from the previous line to the pixels 1, 4, 7, 10, ... Of each line. Similarly, change the order of filters to filter (F
3, F1, F2) in that order, the pixels 3,
The error is diffused from the previous line to 6, 9, 12, ....

30 and 31 are different from each other in the starting order of the filter for each line and are similar to the tiling in FIGS. 26 and 27.

In FIG. 30, the first in the sub-scanning direction,
The error is diffused from the 4, 7, ... Lines to the pixels 2, 5, 8 ,.
Pixel 1 of the third, sixth, ninth, ...
The error is diffused to 4, 7, ..., From the third, 6, 9, ... Line to the pixels 3, 6 ,, of the lines 4, 7, 10 ,.
Pixels are diffused to 9, ...

Similarly, in FIG. 31, from the first, fourth, seventh, ... Lines in the sub-scanning direction, the second, fifth, eighth, ...
The error is diffused to the pixels 2, 5, 8, ... Of the line, and the second,
The error is diffused from the 5, 8, ... Lines to the third, 6, 9, ... Pixels 3, 6, 9 ,. Pixel 1 of
Pixels are diffused to 4, 7, ....

Also in FIGS. 29, 30, and 31, FIG.
5, randomization of the order of filter switching in the sub-scanning direction is possible as in the description of FIG.

Error buffer 13 by filter switching
The operation of the first embodiment regarding the reduction of the number of times of access and the memory capacity will be collectively described with reference to FIG. 2. An error in which the reading value of the pixel to be processed is diffused by the error correction unit 2 from the previous line or the previous pixel. The corrected pixel data 3 is binarized / multi-valued on the basis of a preset threshold value from the outside by the threshold processing means 4, and the output image data 5 of the image processing apparatus is corrected. Is output as. The error calculation means 6 calculates an error signal 7 by threshold processing from the binary / multi-valued output image data 5 and the corrected pixel data 3.

The error filtering means 10 receives the error signal 7 by the threshold processing and the filter parameter 9 generated by the filter parameter generating means 8 as input, and based on the filter switching control signal 19 generated by the control signal generating means 15. The error correction amounts 11 and 12 in the peripheral pixels are calculated while switching the filter to, and the error correction amount 11 to the next adjacent pixel is fed back to the next pixel,
The error correction amount 12 for the next line is sent to the error buffer 13 as the buffer control signal 1 generated by the control signal generating means 15.
Write based on 8. Further, based on the buffer control signal 18, the error correction amount 14 (eP) from the previous line
Is read from the error buffer 13.

Further, the error correction means 2 performs correction control as to whether or not correction is to be performed by the select signals 17A, 17 of the error correction control signal 17 generated by the control signal generation means 15. The control signal generating means 15 corrects, switches the filter, and the error buffer 13 based on the contents of the filter or the like designated by the external input / output interface means 16.
Data writing to the error buffer 13, data reading from the error buffer 13, or randomization of filter parameters.

By using the above filter switching method, the number of accesses to the error buffer 13 and the memory capacity can be reduced, leading to cost reduction. For example, it is considered that even if the resolution is increased from 400 dpi to 600 dpi, equal or higher gradation processing can be obtained at the same cost. In addition, it is also possible to consider the compatibility of resolution and gradation by performing area determination and using this method only for areas that require gradation processing, and by adaptively performing processing that is appropriate for areas that require resolution. To be

Further, in the case of multi-value output, the error amount is smaller than that in the case of binary output, and therefore there is little possibility of diffusion to all the neighborhoods even if a conventional filter is used. Therefore, this method can be used to realize the same level of image quality as that of the related art with a smaller error buffer memory.

Next, high-speed processing by switching filters will be described as a second embodiment of the present invention with reference to FIG. An example of the filter in the high-speed processing configuration of FIG. 32 is shown in FIG. 33 (a) (b) or FIG. 34 (a) (b). The filters of FIGS. 35 (a) and 35 (b) are configured so that high-speed processing and reduction of the memory capacity of the error buffer 13 can be obtained.

33 (a) (b) and 34 (a)
Considering the configurations of the filters shown in FIGS. 35 (a) and 35 (b),
The operation of the image processing apparatus in FIG. 32 will be collectively described.

The basic configuration of FIG. 32 is the same as that of FIG. 1, and the input image converting means 2A converts a pixel stream input in the main scanning direction for each pixel so that two pixels can be simultaneously processed. The pixel stream 1A is collectively converted into two pixels based on the input pixel conversion control signal 23 generated by the control signal generating means 15.

The two-pixel stream 1 after conversion is corrected in parallel by two pixels by the error correction means 2, and the corrected image data 3 is thresholded in parallel by two pixels by the threshold processing means 4. The output image data 5 of the threshold processing is output in units of 2 pixels, and the output pixel conversion means 4A outputs the output pixel conversion control signal 24 according to the output device connected to the output side of this image processing device.
And output image data 5A after the conversion is output. For example, when a printer that outputs each pixel is connected, the two-pixel stream is converted into a one-pixel stream (that is, the inverse conversion of the input image conversion unit 2A) and output.

Output image data 5 and corrected image data 3
From the above, the error calculation means 6 calculates an error due to the threshold processing, and the error is filtered by the error filtering means 10 due to the filter switching, and the filter parameter generation means 8 is obtained.
The error correction amount is diffused to the peripheral pixels of the pixel to be processed based on the filter parameter 9 generated from. The control signal generation means 15 uses the information source set by the external interface means 3 to input the pixel conversion control signal 23, the output pixel conversion control signal 24, the error correction control signal 17, the buffer control signal 18, the filter switching control signal 19, A filter parameter control signal 20 for randomizing filter parameters is generated.

In FIG. 32, the input image converting means 2A shown in FIG. 1 is as shown in FIG. 36, and the input image for each pixel is simultaneously output for every two pixels corresponding to the filter. In the case of the filters of FIGS. 33 (a) and 33 (b), two pixels are processed in parallel, so that the pixel clock 21 (as shown in FIG. 37 (shown in FIG. 37 (a)) is input by dividing the frequency by two.

The flip-flop circuit 302 is shown in FIG.
As shown in (c) of FIG.
The input image data Di (G1, ...) Shown in (b) is delayed by one pixel to output an output D (i-1). The flip-flop circuit 303 uses the input pixel conversion control signal 23
Set output D of the flip-flop circuit 302 in synchronization with
(I-1) is output as the output D (i-3). The flip-flop circuit 304 outputs the input image data Di shown in FIG. 37B as an output D (i-2) in synchronization with the input pixel conversion control signal 23. Thereby, from the flip-flop circuits 303 and 304,
As shown in FIG. 37 (e), two pixels (G1, G2, ...)
It is output collectively. Further, a divided-by-2 clock (shown in FIG. 37D) is used instead of the pixel clock 21 as a processing clock for the subsequent processing.

The error correction means 2 uses two error correction means 2 shown in FIG. 3, one for each of the two pixels, and uses a clock divided by two instead of the pixel clock as the processing clock. Further, the select signal 17B of the error correction control signal 17 has already become high (with correction) in the error correction means 2 on the odd-numbered pixels 1, 3, 5, ... Side, and the even-numbered pixels 2, 4, 6 ,. The error correction means 2 is already low (state without correction).

Threshold processing means 4 and error calculating means 6 of FIG.
Are similar to the threshold value processing means 4, the error calculating means 6 and the like described in the first embodiment of FIG. 2, and in this case, the odd number pixels 1, 3, 5, ... And the even number pixels 2, 4, 5 Holds two in order to process ... in parallel.

The filter parameter generating means 8 is also similar to the filter parameter generating means 8 of FIG. 2, and generates the filter parameter 9 based on the set method.
The error filtering means 10 is supplied.

Next, the error filtering process by switching filters will be described. The filtering process is almost the same as the filtering process in the first embodiment of FIG. 2 shown in FIG. 21, but the configuration thereof is shown in FIG.

The bit mask means 32-A, 32 shown in FIG.
-Β is the bit mask calculation means 22a to 22d of FIG.
Is the same as the bit mask means 22 composed of
And bit mask means 32-B for even pixels are used. In addition, filter parameters MA1, M1 and MC
1, MD1, etc. are mask values for the filter F1, and filter parameters MA2, M2, MC2, MD2, etc. are mask values for the filter F2. ea1, eb1, ec1, ed
Reference numeral 1 denotes an output of the bit masking means 32-A, which represents an error signal distributed to the peripheral pixels by the threshold value processing of odd-numbered pixels, and ea2, eb2, ec2, and ed2 are outputs of the bit masking means 32-B and are even numbers. An error signal obtained by threshold processing of pixels is distributed to peripheral pixels. The filter F1 is used for odd pixels and the filter F2 is used for even pixels.

In FIG. 33, MA1 of the filter F1
Becomes 0, and the filter parameter MΒ of the filter F2 is
2, MC2, MD2 become 0. Similarly, in FIG. 34, the filter parameter MA1 of the filter F1 is 0, and in the filter of FIG. 35, the filter parameters MA1 and MC1 of the filter F1 are 0 and the filter F
The filter parameters M2 and MD2 of 2 become 0. e
T is an error from the even pixel to the immediately adjacent pixel (odd pixel), and is input to the error correction means 2 corresponding to the odd pixel. The error from the corresponding odd pixel is always 0.

Error diffused from each pixel, ea1, eb
1, ec1, ed1, ea2, eb2, ec2, ed2
The flip-flop circuits 32-C and 32-D and the adders 32-F to 32-I are combined as an error correction amount for the next line in units of two pixels. The error to the next line in units of 2 pixels is corrected by the filter switching control signal 19 in the selector 32-E and the error correction amount 12 (e
N) is output. Figure 39 shows the timing etc.
It shows in (a)-(o). Therefore, the pixel clock 21 can be used as the write control to the error buffer 13. Further, the errors read from the error buffer 13 based on the pixel clock 21 can be collectively input to the error correction unit 2 in units of two pixels as in the input pixel conversion unit 2A shown in FIG.

Further, in the filter of FIG. 35, since the filter parameters MA1 and MC1 of the filter F1 and the filter parameters MB2 and MD2 of the filter F2 are 0, the outputs ea1 and ec1 of the bit mask means 32A and 32B, eb2 and ed2 are 0 regardless of the error, and the signal 32-L output from the adder 32-I shown in FIGS. 38 and 39 is always 0. Therefore, in this case, the selector 32-E shown in FIG. 38 is unnecessary and the signal 32-K which is the output of the adder 32-H is set to the error correction amount 1
2 (eΝ). Further, by using the processing clock which is the frequency divided by 2 of the pixel clock 21 for writing / reading of the error buffer 13, the memory capacity of the error buffer 13 is halved, and the double speed processing is possible.

Further, FIGS. 40 (a) to 40 (d) and FIG.
When the filters F1 to F4 shown in (a) to (d) are repeatedly used for the pixels in the main scanning direction in order, the speed is increased by parallel processing, and the error buffer is similar to the description of the filters in FIGS. 23 (a) to (d). 13 can be halved.

The parallel processing in units of two pixels has been described above, but FIGS. 42 (a) to 42 (c), 43 (a) to 43 (c),
The pixel groups of FIGS. 44 (a) to (c) and FIGS. 45 (a) to (c) can be used in the same manner for three-pixel parallel processing, and the memory capacity of the error buffer 13 can be reduced to 1/3. Is. In this case, FIGS. 42 (a) to 42 (c) and FIG.
(A)-(c), FIG. 44 (a)-(c), FIG. 45 (a)
It is also possible to select the filter groups (c) to (c) periodically or randomly for each line in the sub-scanning direction.

Further, by using the filter group of FIGS. 46 (a) to (f), the two-pixel parallel processing, the error buffer 1
If it can be reduced to 1/3 of the memory capacity of 3, it is possible to perform parallel processing of 4 pixels and to reduce the memory capacity of the error buffer 13 to 1/4 by using FIGS. 47 (a) to (d). . In this way, by combining the filters, etc.
It is possible to reduce the memory capacity of the error buffer 13 and to combine various processing speeds.

The control signal generating means 15 has the same function as the control signal generating means 15 of the first embodiment shown in FIG.
The control signal is generated at the timings shown in FIGS.

Next, input image data input by a plurality of channels, for example, an image read by a line sensor (scanner) of R, G, B (red, green, blue) is read as Y.
An example will be described in which (yellow), M (magenta), C (cyan), and K (black) are simultaneously processed. The structure is described in FIG.

In FIG. 48, 4 channels (hereinafter, referred to as channel 1, channel 2 channel 3 and channel 4)
Signals are simultaneously input, and as described in the above embodiment,
The error correction means 2 corrects the error diffused from the previously processed pixels in four channels simultaneously, and the threshold value processing means 4 simultaneously binarizes the corrected pixels in a plurality of channels to obtain output image data 5. To be The error calculation means 6 calculates the error due to the threshold value processing of each channel, and the filtering means 10 diffuses the error to the peripheral pixels, whereby an output with excellent gradation is obtained. In this case, a combination of filters and channels shown in FIG. 49 will be described as an example.

In the third embodiment shown in FIG. 48, the error filtering means 10 is the same as the respective means corresponding to the first embodiment of FIG. 2 except for the error filtering means 10. . The structure of the error filtering means 10 is shown in FIG. Filter 41 for each channel in FIG.
a to 41d are the same as the error filtering means 10 shown in FIG. 21 in the first embodiment of FIG. The difference in this case is that the mask value is 0 or 1,
51 instead of the selectors 21a, ...
The control signals Sa, Sb, Sc and Sd as the filter parameters shown in the timing charts of (d) to (g) are used as they are as mask signals.

The control signal generating means 15 shown in FIG.
Filter switching control signal 19 shown in 1 (c) to (g)
And control signals Sa, Sb, Sc, Sd are generated. Part 1
As an example, as shown in FIG. 52, a counter 15a, flip-flop circuits 15c, 15d, 15e, and NOR circuit 15b.
Composed of The counter 15a in FIG. 52 has 0,
This is a 2-bit counter that repeatedly counts 1, 2, and 3, and the flip-flop circuits 15c, 15d, and 15e perform delay in synchronization with the pixel clock 21. As a result, the error diffusion processing of four channels can be performed simultaneously, and the memory capacity of the error buffer 13 can be reduced. For example, in this example, while the conventional error diffusion required the memory capacity of the error buffer for four channels, it can be reduced to one channel, that is, ¼ here.

Other combinations such as halving the memory capacity of the error buffer 13 are possible by using the filter combination of the first embodiment shown in FIG. Further, if the concept of simultaneous processing of a plurality of pixels in the second embodiment shown in FIG. 32 is incorporated, simultaneous processing of a plurality of channels and a plurality of pixels of each channel becomes possible, and high-speed processing with good cost performance becomes possible. Further, in the case of multi-channel input, a configuration in which some of the channels are subjected to the filter switching processing of the present invention and the remaining channels are divided into the conventional error diffusion processing and the like can be considered.

Another structure of the high-speed processing is as shown in FIG. 53, which is almost the same as that shown in FIG. 32, except that the input image converting means 2A converts the plurality of pixels in the main scanning direction. Instead, it's a way of putting together multiple lines. Correspondingly, the output image conversion means 4A
Does not convert a plurality of pixels into an original one-pixel stream, but divides pixels of a plurality of lines that are simultaneously input and converts them into line pixels, and outputs the line pixels. It is also possible to output without conversion corresponding to the output device connected to this image processing. For example, 1 with a line sensor such as CCD
The image data input for each line is simultaneously processed for a plurality of lines (for example, 4 lines) and is output as it is to an output device for multi-channel output (simultaneous output of 4 lines). Here, one example for the two-line simultaneous processing of the input conversion means 2A of FIG. 53 is shown in FIG. 54, and the details will be described. However, other processing can be configured in the same way as the above-described embodiment. Omit it.

In FIG. 54, 45-1 to 45-4 (FIFΟ1
..- FIFO4) are line buffers for temporarily storing the input image. The FIFO1 and the FIFO2 are one set, and the FIFO3 and the FIFO4 are another set. The inputs of the FIFO1 and the FIFO3 are connected to the image data input for each pixel depending on the switching state of the switch S1. The input of FIFO2 is connected to the output of FIFO1, and the input of FIFO4 is connected to the output of FIFO3.

By means of the switches S2 and S3, the FIFI1,
FIFO2, or FIFO3, FIFO4 are 2 in pairs
It is output as a line image. Switch S1 has terminal A
If the switch S1 is connected to 1 and the image is input to the FIFO1, the switch S2 is connected to B2, the switch S3 is connected to B3, and the contents of the FIFO3 and the FIFO4 are output as a two-line image. Conversely, the switch S1 is connected to the terminal. When connected to B1, an image is input from the reading device to the FIFO3, the switch S2 has a terminal A2, and the switch S3 has a terminal A.
3 is connected, and the data of FIFΟ1 and FIFΟ2 is 2
It is output as a line image.

Not only is the conventional error diffusion performed at high speed using the configuration of FIG. 53, but the memory capacity of the error buffer 13 is reduced and the processing speed is further increased in combination with the above-mentioned filter switching means and the like. You can also Also, with only the error buffer for one line, FIG.
A filter having a distance of 1 pixel or more in the periphery shown in (b) can also be incorporated. Using the filter configuration of FIGS. 55 (a) and 55 (b), starting from the filter F1 in the main scanning direction corresponding to the odd lines in the sub-scanning direction, switching the filter F1 and the filter F2 for each pixel to set the even-numbered lines in the sub-scanning direction. Starting from the filter F2 in the corresponding main scanning direction,
By switching between the filter F2 and the filter F1 for each pixel, the error diffusion process can be performed only with the error buffer for one line.

In all of the above-mentioned embodiments, the configuration has been described in which the memory capacity of the error buffer can be reduced and the processing speed can be increased by switching the filters, but another effect of switching the filters is that of the conventional filter configuration. It is considered that the problem of the conventional diagonal texture of error diffusion can be solved by using some of them, or by using some with different parameter coefficients and switching them randomly for each pixel or for every multiple pixels. To be

As described above, the texture can be reduced by randomly switching the filters.

By using a filter group capable of diffusing every pixel or every plural pixels in the sub-scanning direction and switching it for each pixel or every plural pixels, the number of accesses of the error storage means can be reduced and the processing speed can be increased. Can be planned.

By using a filter group capable of diffusing every pixel or every plural pixels in the main scanning direction and switching it for each pixel or every plural pixels, simultaneous processing of plural pixels becomes possible, and the processing speed is increased. be able to.

In the error diffusion in the sub-scanning direction, the number of access times of the error buffer is reduced by the error diffusion for every one pixel or every plural pixels, the simultaneous processing of a plurality of pixels in the main scanning direction is realized at the same time, and the processing speed is increased. Can be achieved.

By providing various filter groups as described above,
One of them can be flexible and can be instructed from the outside according to the application.

By simultaneously processing a plurality of pixels on a plurality of lines in the sub-scanning direction, the processing speed can be increased.

It is possible to speed up the processing by simultaneously processing a plurality of channels.

By using the conventional error diffusion for some of the plurality of channels and using the filter switching method for the other channels, the conventional error diffusion is performed by the multi-line simultaneous processing,
Other than that, the processing speed can be increased by a hybrid format such as simultaneous processing of a plurality of pixels.

Initial situation of filter repetition It is possible to make the directionality of diffusion uniform or random by changing randomly or periodically for each line in the sub-scanning direction.

By using a plurality of filter groups and changing them periodically or randomly in the sub-scanning direction, the directionality of diffusion can be made uniform or random.

[0180]

As described in detail above, according to the present invention, it is possible to reduce the number of times the error buffer is accessed and the memory capacity by switching the filter. Especially, for high resolution and multi-gradation processing, the cost is reduced. High-speed processing with good performance is possible.

Simultaneous processing of a plurality of pixels is possible, and high speed processing can be realized.

Regarding the multi-channel simultaneous processing, it is possible to reduce the number of accesses to the error buffer and the memory capacity, and to speed up the processing.

Further, the conventional error diffusion texture by switching filters can be improved to some extent.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of an image processing apparatus for explaining the present invention.

FIG. 2 is a block diagram showing a schematic configuration of an image processing apparatus according to the first embodiment.

FIG. 3 is a block diagram showing a configuration of error correction means.

FIG. 4 is a block diagram showing a configuration of threshold processing means.

FIG. 5 is a diagram for explaining the processing of the encoder unit of the threshold processing means.

FIG. 6 is a diagram showing an example of a comparator of threshold processing means.

FIG. 7 is a diagram showing another configuration example of threshold processing means.

FIG. 8 is a diagram showing another configuration example of threshold processing means.

FIG. 9 is a diagram showing an example of bit expansion of an input image after correction processing.

FIG. 10 is a diagram showing a configuration example of error calculation means.

FIG. 11 is a diagram for explaining a filter model of a conventional error diffusion method.

FIG. 12 is a diagram showing a configuration example of a filter.

FIG. 13 is a diagram showing an example of error diffusion by using a filter.

FIG. 14 is a diagram showing an example of a mask for implementing a filter with a bit mask.

FIG. 15 is a diagram for explaining random generation of mask values in a filter.

FIG. 16 is a diagram for explaining a low-order pseudo-random sequence to a high-order pseudo-random sequence.

FIG. 17 is a diagram showing a specific example of a pseudo random sequence (M sequence) generating means.

FIG. 18 is a diagram showing an example of a method for randomly setting the position of a mask.

FIG. 19 is a diagram showing a configuration example of control signal generating means.

FIG. 20 is a timing chart showing signals of main parts of control signal generating means.

FIG. 21 is a diagram showing a configuration example of error filtering means.

FIG. 22 is a timing chart showing signals of the main parts of the error filtering means.

FIG. 23 is a diagram showing a configuration example of a filter.

FIG. 24 is a diagram showing a configuration example of a filter.

25 is a diagram showing an example of tiling (changing the initial value in the sub-scanning direction) in the filter configuration of FIG.

FIG. 26 is a diagram showing an example of tiling in the filter configuration of FIG. 23.

FIG. 27 is a diagram showing an example of tiling in the filter configuration of FIG. 23.

FIG. 28 is a view showing combinations that can switch filters among all the combinations shown in FIG. 23;

FIG. 29 is a diagram showing an example of tiling in the filter configuration of FIG. 24.

30 is a diagram showing an example of tiling in the filter configuration of FIG.

31 is a diagram showing an example of tiling in the filter configuration of FIG. 24. FIG.

FIG. 32 is a block diagram showing a schematic configuration of an image processing apparatus in a second embodiment (high speed processing).

FIG. 33 is a diagram showing a configuration example of a filter that can be used for two-pixel simultaneous processing.

FIG. 34 is a diagram showing a configuration example of a filter that can be used for two-pixel simultaneous processing.

FIG. 35 is a diagram showing a configuration example of a filter that can be used for two-pixel simultaneous processing and half the memory capacity of the error buffer.

FIG. 36 is a view showing an example of the arrangement of an input image conversion unit that collects pixels in the main scanning direction every two pixels.

FIG. 37 is a timing chart showing signals of main parts of the input image converting means.

FIG. 38 is a diagram showing a configuration example of error filtering means.

FIG. 39 is a timing chart showing the signals of the essential parts of the error filtering means.

FIG. 40 is a diagram showing a configuration example of a filter that can be used for two-pixel simultaneous processing and half the memory capacity of the error buffer.

FIG. 41 is a diagram showing a configuration example of a filter that can be used for two-pixel simultaneous processing and half the memory capacity of the error buffer.

FIG. 42 is a diagram showing a configuration example of a filter that can be used for simultaneous processing of three pixels and ⅓ of the memory capacity of the error buffer.

FIG. 43 is a diagram showing a configuration example of a filter that can be used for simultaneous processing of three pixels and ⅓ of the memory capacity of the error buffer.

FIG. 44 is a diagram showing a configuration example of a filter that can be used for simultaneous processing of three pixels and ⅓ of the memory capacity of the error buffer.

FIG. 45 is a diagram showing a configuration example of a filter that can be used for simultaneous processing of three pixels and ⅓ of the memory capacity of the error buffer.

FIG. 46 is a diagram showing a configuration example of a filter that can be used for simultaneous two-pixel processing and ⅓ of the memory capacity of the error buffer.

FIG. 47 is a diagram showing a configuration example of a filter that can be used for simultaneous processing of four pixels and quadrupling the memory capacity of the error buffer.

FIG. 48 is a block diagram showing a schematic configuration of an image processing apparatus in a third embodiment (multi-channel simultaneous processing).

FIG. 49 is a diagram for explaining switching of filters for each channel.

FIG. 50 is a diagram showing a configuration example of error filtering means.

FIG. 51 is a timing chart showing signals of the essential parts of the error filtering means.

FIG. 52 is a diagram showing a configuration example of control signal generating means.

FIG. 53 is a block diagram showing a schematic configuration of an image processing apparatus in a fourth embodiment (simultaneous processing of a plurality of lines).

FIG. 54 is a block diagram showing a schematic configuration of input image conversion means for converting into a multi-line image.

FIG. 55 is a diagram showing a configuration example of a filter that extends over a plurality of lines (2 lines).

FIG. 56 is a configuration diagram of binarization processing for explaining the conventional error diffusion method.

[Explanation of symbols]

 2 ... Error correcting means 4 ... Threshold processing means 6 ... Error calculating means 8 ... Filter parameter generating means 10 ... Error filtering means 13 ... Error buffer 15 ... Control signal generating means

Claims (10)

[Claims] 1. A correction in which image data of a pixel of interest in a processing target image including a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction is corrected by an error correction amount based on binary / multivalued error diffusion. Correction means for outputting image data; binary / multivalued means for binarizing / multivalued corrected image data by the correction means; and binary / multivalued by the binary / multivalued means Binary /
Calculating means for calculating an error between the multi-valued image data and the corrected image data by the correcting means, generating means for generating a filter parameter, filter parameter generated by the generating means, and an error calculated by the calculating means. By performing the filtering to diffuse the multi-valued error to the peripheral pixels, the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the error correction amount to the next line in the sub scanning direction with respect to the target pixel are calculated. Error storage means for outputting the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, and a sub-pixel for the pixel of interest stored in this storage means. The error correction amount to the next line in the scanning direction and the pixel of interest output by the error filtering means And a control unit that corrects the image data of the pixel of interest by the correction unit according to the error correction amount of the next pixel in the main scanning direction. The error filtering unit includes a plurality of filters having different pixels that diffuse the error. An image processing apparatus, comprising: a filter group having the above configuration, and performing filtering by selectively switching filters for each pixel or for each of a plurality of pixels. 2. A correction in which image data of a pixel of interest in a processing target image including a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction is corrected by an error correction amount based on binary / multi-valued error diffusion. Correction means for outputting image data; binary / multivalued means for binarizing / multivalued corrected image data by the correction means; and binary / multivalued by the binary / multivalued means Binary /
Calculating means for calculating an error between the multi-valued image data and the corrected image data by the correcting means, generating means for generating a filter parameter, filter parameter generated by the generating means, and an error calculated by the calculating means. By performing the filtering to diffuse the multi-valued error to the peripheral pixels, the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the error correction amount to the next line in the sub scanning direction with respect to the target pixel are calculated. Error storage means for outputting the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, and a sub-pixel for the pixel of interest stored in this storage means. The error correction amount to the next line in the scanning direction and the pixel of interest output by the error filtering means And a control unit that corrects the image data of the pixel of interest by the correction unit according to the error correction amount of the next pixel in the main scanning direction, and the error filtering unit has different pixels that diffuse the error in the main scanning direction. An image processing apparatus, wherein a filter group including a plurality of filters is provided and a plurality of pixels in the main scanning direction are simultaneously filtered by selectively switching the filters for each pixel or for each plurality of pixels. 3. Image data input in a stream for each pixel in the main scanning direction in a processing target image including a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction is converted into image data for each plurality of pixels. Conversion means for converting, and correction means for outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by the conversion means, Each of a plurality of corrected image data by this correction means is set to 2
Binary / multi-value conversion means for converting values / multi-values and a plurality of binary / multi-valued image data binarized / multi-valued by the binary / multi-value conversion means for each pixel in the main scanning direction. Output means for converting and outputting to the stream, calculation for calculating respective errors between the plurality of binary / multivalued image data by the binary / multivalued means and the plurality of corrected image data by the correction means Means, a generating means for generating a filter parameter, and a filtering for diffusing a multi-valued error to peripheral pixels by calculating the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting the error correction amount to the next pixel in the main scanning direction and the error correction amount to the next line in the sub scanning direction for the pixel of interest; Storage means for storing the error correction amount for the next line in the sub-scanning direction with respect to the pixel of interest output, and the error correction amount for the next line in the sub-scanning direction for the pixel of interest stored in this storage means. The error filtering means includes a control means for correcting the image data of the pixel of interest by the correction means based on the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering means. Image processing characterized by providing a filter group consisting of a plurality of filters with different pixels for diffusing an error, and selectively filtering the filters for each pixel or for each plurality of pixels to simultaneously filter a plurality of pixels in the main scanning direction apparatus. 4. Image data input in a stream for each pixel in the main scanning direction in a processing target image including a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction is converted into image data for each plurality of pixels. Conversion means for converting, and correction means for outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by the conversion means, Each of a plurality of corrected image data by this correction means is set to 2
Binary / multi-value conversion means for converting values / multi-values and a plurality of binary / multi-valued image data binarized / multi-valued by the binary / multi-value conversion means for each pixel in the main scanning direction. Output means for converting and outputting to the stream, calculation for calculating respective errors between the plurality of binary / multivalued image data by the binary / multivalued means and the plurality of corrected image data by the correction means Means, a generating means for generating a filter parameter, and a filtering for diffusing a multi-valued error to peripheral pixels by calculating the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting the error correction amount to the next pixel in the main scanning direction and the error correction amount to the next line in the sub scanning direction for the pixel of interest; Storage means for storing the error correction amount for the next line in the sub-scanning direction with respect to the pixel of interest output, and the error correction amount for the next line in the sub-scanning direction for the pixel of interest stored in this storage means. The error filtering means includes a control means for correcting the image data of the pixel of interest by the correction means based on the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering means. By providing a filter group consisting of a plurality of filters with different pixels for diffusing the error and selectively switching the filters for each pixel or for each of the plurality of pixels, the number of accesses to the storage means is reduced and a plurality of pixels in the main scanning direction are simultaneously processed. An image processing apparatus characterized by performing filtering. 5. Image data input in a stream for each pixel in the main scanning direction in a processing target image including a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction is converted into image data for each plurality of pixels. Conversion means for converting, and correction means for outputting a plurality of corrected image data corrected by an error correction amount based on binary / multi-valued error diffusion for image data of a plurality of pixels of interest converted by the conversion means, Each of a plurality of corrected image data by this correction means is set to 2
Binary / multi-value conversion means for converting values / multi-values and a plurality of binary / multi-valued image data binarized / multi-valued by the binary / multi-value conversion means for each pixel in the main scanning direction. Output means for converting and outputting to the stream, calculation for calculating respective errors between the plurality of binary / multivalued image data by the binary / multivalued means and the plurality of corrected image data by the correction means Means, a generating means for generating a filter parameter, and a filtering for diffusing a multi-valued error to peripheral pixels by calculating the filter parameter generated by the generating means and the error calculated by the calculating means, Error filtering means for outputting the error correction amount to the next pixel in the main scanning direction and the error correction amount to the next line in the sub scanning direction for the pixel of interest; Storage means for storing the error correction amount for the next line in the sub-scanning direction with respect to the pixel of interest output, and the error correction amount for the next line in the sub-scanning direction for the pixel of interest stored in this storage means. The error filtering means includes a control means for correcting the image data of the pixel of interest by the correction means based on the error correction amount of the next pixel in the main scanning direction with respect to the pixel of interest output by the error filtering means. A first filter group including a plurality of filters having different pixels for diffusing an error, and error diffusion every other pixel or every plural pixels in the main scanning direction, or every other pixel or every plural pixels in the next line in the sub scanning direction. And a second filter group consisting of a plurality of filters having different pixels for diffusing the error and every other pixel or a plurality of pixels in the main scanning direction. Error diffusion is performed every pixel or every other pixel or every plural pixels in the next line in the sub-scanning direction, or every one pixel or every plural pixels in the next line in the main scanning direction or the sub-scanning direction, and the error is diffused. And a third filter group including a plurality of filters having different pixels, and performing filtering by selectively using any one of the first, second, and third filter groups. . 6. A matrix of a plurality of pixels for a plurality of lines of image data input in a stream for each pixel in a main scanning direction in an image to be processed which includes a plurality of pixels in the main scanning direction and a plurality of lines in the sub scanning direction. Conversion means for converting the image data for each pixel, and the corrected image data of the pixels of the matrix corrected by the error correction amount based on the binary / multi-valued error diffusion for the image data of each pixel of the matrix converted by this conversion means. Correction means for outputting, binary / multivalued means for binarizing / multivalued the corrected image data of the pixels of the matrix by the correcting means, and binarization / multivalued by the binary / multivalued means The binary / multi-valued image data of pixels of the created matrix in the main scanning direction
Output means for converting into a stream for each pixel and outputting the stream, and binary / pixel value of matrix of the binary / multi-value conversion means
Calculation means for calculating respective errors between the multi-valued image data and the correction image data of the pixels of the matrix by the correction means, a generation means for generating a filter parameter, a filter parameter generated by the generation means, and the above calculation. Filtering for diffusing a multi-valued error to peripheral pixels is performed by calculation with the error calculated by the means, and the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the next line in the sub scanning direction with respect to the target pixel. Error correction amount for outputting to the next line in the sub-scanning direction with respect to the pixel of interest output by the error filtering device, Error correction amount to the next line in the sub-scanning direction with respect to the target pixel being detected and the error filtering means. And an error correction amount of the next pixel in the main scanning direction with respect to the target pixel output from the target pixel, and a control unit that corrects the image data of the target pixel by the correction unit. The error filtering unit diffuses the error. By providing a filter group composed of a plurality of filters having different pixels and selectively switching the filters for each pixel or for each plurality of pixels, the number of times of access to the storage means is reduced and a matrix of a plurality of pixels is simultaneously filtered by a plurality of lines. An image processing device characterized by the above. 7. An error correction amount based on binary / multi-valued error diffusion for image data of a target pixel consisting of a plurality of channels in a processing target image consisting of a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction. Correction means for outputting corrected image data of a plurality of channels corrected by
Value / multi-valued binary / multi-valued means, binary / multi-valued image data of a plurality of channels binarized / multi-valued by the binary / multi-valued means and a plurality of channels by the correction means Calculation means for calculating an error from the corrected image data, generating means for generating a filter parameter, and calculation of the filter parameter generated by the generating means and the error of a plurality of channels calculated by the calculating means for surrounding pixels. The error correction amount to the next pixel in the main scanning direction for the target pixel of the multiple channels and the error correction amount to the next line in the sub-scanning direction for the target pixel of the multiple channels are And an error to the next line in the sub-scanning direction for the target pixel of a plurality of channels output by the error filtering means. A storage unit that stores the correction amount, and an error correction amount to the next line in the sub-scanning direction for the target pixel of the plurality of channels stored in the storage unit and the target pixel of the plurality of channels output by the error filtering unit. And a control unit for correcting the image data of the pixel of interest of the plurality of channels by the correction unit according to the error correction amount of the next pixel in the main scanning direction. The error filtering unit diffuses the error for each channel. When a filter group consisting of a plurality of filters with different pixels is provided and error diffusion is performed every other pixel or every other pixel in the next line in the sub-scanning direction, diffusion is performed in the sub-scanning direction in at least one or more channels. By using filters with different pixel locations,
An image processing apparatus, characterized in that the number of accesses to the storage means is reduced and a plurality of pixels of a plurality of channels in the main scanning direction are simultaneously filtered. 8. An error correction amount based on binary / multi-valued error diffusion for image data of a pixel of interest in a processing target image including a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction. Correction means for outputting corrected image data of a plurality of channels corrected by
Value / multi-valued binary / multi-valued means, binary / multi-valued image data of a plurality of channels binarized / multi-valued by the binary / multi-valued means and a plurality of channels by the correction means Calculation means for calculating an error from the corrected image data, generating means for generating a filter parameter, and calculation of the filter parameter generated by the generating means and the error of a plurality of channels calculated by the calculating means for surrounding pixels. The error correction amount to the next pixel in the main scanning direction for the target pixel of the multiple channels and the error correction amount to the next line in the sub-scanning direction for the target pixel of the multiple channels are And an error to the next line in the sub-scanning direction for the target pixel of a plurality of channels output by the error filtering means. A storage unit that stores the correction amount, and an error correction amount to the next line in the sub-scanning direction for the target pixel of the plurality of channels stored in the storage unit and the target pixel of the plurality of channels output by the error filtering unit. And a control unit that corrects the image data of the target pixel of a plurality of channels by the correction unit according to the error correction amount of the next pixel in the main scanning direction. The error filtering unit includes at least one of the plurality of channels. Error diffusion is performed on a channel using a filter with a fixed coefficient, and for every other channel, every other pixel or every other pixel in the main scanning direction, or every other pixel or a plurality of pixels in the next line in the sub scanning direction. Error every other pixel or every other pixel or every other pixel in the next line in the main scanning direction or the sub scanning direction. Access to the storage means is performed by providing a filter group composed of a plurality of filters that perform diffusion and diffuse an error, and perform error diffusion every other pixel or every other pixel in the next line in the sub-scanning direction. An image processing apparatus, wherein the number of times is reduced and a plurality of pixels in the main scanning direction are simultaneously filtered. 9. A correction in which image data of a target pixel in a processing target image including a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction is corrected by an error correction amount based on binary / multi-valued error diffusion. Correction means for outputting image data; binary / multivalued means for binarizing / multivalued corrected image data by the correction means; and binary / multivalued by the binary / multivalued means Binary /
Calculating means for calculating an error between the multi-valued image data and the corrected image data by the correcting means, generating means for generating a filter parameter, filter parameter generated by the generating means, and an error calculated by the calculating means. By performing the filtering to diffuse the multi-valued error to the peripheral pixels, the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the error correction amount to the next line in the sub scanning direction with respect to the target pixel are calculated. Error storage means for outputting the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, and a sub-pixel for the pixel of interest stored in this storage means. The error correction amount to the next line in the scanning direction and the pixel of interest output by the error filtering means And a control unit that corrects the image data of the pixel of interest by the correction unit according to the error correction amount of the next pixel in the main scanning direction. The error filtering unit includes a plurality of filters having different pixels that diffuse the error. An image processing apparatus, wherein a filter group is provided, and filtering is performed by selectively switching filters in different order for each pixel or for each plurality of pixels for each line in the sub-scanning direction. 10. A correction in which image data of a pixel of interest in a processing target image including a plurality of pixels in a main scanning direction and a plurality of lines in a sub scanning direction is corrected by an error correction amount based on binary / multi-valued error diffusion. Correction means for outputting image data; binary / multivalued means for binarizing / multivalued corrected image data by the correction means; and binary / multivalued by the binary / multivalued means Binary /
Calculating means for calculating an error between the multi-valued image data and the corrected image data by the correcting means, generating means for generating a filter parameter, filter parameter generated by the generating means, and an error calculated by the calculating means. By performing the filtering to diffuse the multi-valued error to the peripheral pixels, the error correction amount to the next pixel in the main scanning direction with respect to the target pixel and the error correction amount to the next line in the sub scanning direction with respect to the target pixel are calculated. Error storage means for outputting the error correction amount to the next line in the sub-scanning direction for the pixel of interest output by the error filtering means, and a sub-pixel for the pixel of interest stored in this storage means. The error correction amount to the next line in the scanning direction and the pixel of interest output by the error filtering means And a control unit that corrects the image data of the pixel of interest by the correction unit according to the error correction amount of the next pixel in the main scanning direction. The error filtering unit includes every one pixel or every plural pixels in the main scanning direction. A first filter group consisting of a plurality of filters having different pixels for performing error diffusion and for diffusing the error, every other pixel in the main scanning direction or every plurality of pixels, or every other pixel in the next line in the sub scanning direction Alternatively, a second filter group including a plurality of filters that perform error diffusion for every plurality of pixels and which diffuse the error and every other pixel in the main scanning direction or every plurality of pixels, or the next line in the sub-scanning direction Every 1 pixel or every 2 pixels, or every 1 pixel or every 2 pixels in the next line in the main scanning direction or sub scanning direction Is provided with a third filter group including a plurality of filters having different pixels for performing error diffusion, and the first, second, and third filter groups are periodically or line by line in the sub-scanning direction. An image processing apparatus characterized in that filtering is performed by randomly switching and using.