JPH09162757A - Digital antenna matching device - Google Patents
Digital antenna matching deviceInfo
- Publication number
- JPH09162757A JPH09162757A JP33571195A JP33571195A JPH09162757A JP H09162757 A JPH09162757 A JP H09162757A JP 33571195 A JP33571195 A JP 33571195A JP 33571195 A JP33571195 A JP 33571195A JP H09162757 A JPH09162757 A JP H09162757A
- Authority
- JP
- Japan
- Prior art keywords
- matching
- antenna
- signal
- transmitter
- matching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Transmitters (AREA)
- Networks Using Active Elements (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、短波帯送信機に用
いられる空中線整合器に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an antenna matching device used in a shortwave band transmitter.
【０００２】[0002]
【従来の技術】短波帯送信機は送信周波数帯が広く、無
線回線の状態に応じて周波数チャネルを切替えて送信す
るため、送信電力増幅段の出力と空中線との間に、チャ
ネル切替えに対応してインピーダンス整合をとる空中線
整合器が設けられている。従来は空中線整合器のＬＣ整
合回路の可変部分をアナログ制御によって整合をとって
いたが、最近はマイクロプロセッサによってディジタル
制御されるようになった。図１は本発明を適用しようと
する整合器の系統図を示したものである。空中線に送信
電力を供給するための送信機１の出力は整合器２に入力
される。送信機からの送信電力を電波として発射する空
中線には整合器２から電力が供給される。2. Description of the Related Art A short-wave band transmitter has a wide transmission frequency band and transmits by switching frequency channels according to the state of a wireless line. Therefore, it is possible to switch channels between the output of a transmission power amplification stage and an antenna. An antenna matching device for impedance matching is provided. Conventionally, the variable part of the LC matching circuit of the antenna matching device was matched by analog control, but recently it has been digitally controlled by a microprocessor. FIG. 1 is a system diagram of a matching device to which the present invention is applied. The output of the transmitter 1 for supplying the transmission power to the antenna is input to the matching device 2. Power is supplied from the matching unit 2 to the antenna that emits the transmission power from the transmitter as a radio wave.
【０００３】整合器２は、誤差検出器３，整合回路４，
Ａ／Ｄ変換器５、及びＣＰＵ６とによって構成されてい
る。誤差検出器３は、送信機と空中線とのインピーダン
ス差を検出する。誤差信号Ｚは、送信機１と空中線のイ
ンピーダンス差を検出した信号である。誤差信号φは、
送信機１と空中線のインピーダンスの位相差を検出した
信号である。また、誤差検出器３は、電圧定在波比（Ｖ
ＳＷＲ）を判定するための進行波電力（Ｐf）信号と反
射波電力（Ｐr ）信号を検出する。Ａ／Ｄ変換器５は、
アナログ信号のＰf とＰr をディジタル信号に変換する
コンバータである。ＣＰＵ６は、誤差検出器３からの誤
差信号Ｚ，φを判定しながら整合回路４の整合素子を制
御するマイクロコンピュータである。整合回路４は、送
信機と空中線間のインピーダンス整合をとる回路であ
り、リアクタンス素子の組合せで構成されている。図１
の整合器２で自動整合を行う場合、図２（Ａ）に示すよ
うに、誤差検出器３で検出したＺ信号（送信機と空中線
のインピーダンス差信号）と、φ信号（送信機と空中線
のインピーダンスの位相差信号）の各誤差がゼロになる
ように整合回路４の可変素子をＣＰＵ６によってディジ
タル制御する。The matching unit 2 includes an error detector 3, a matching circuit 4, and a matching circuit 4.
It is composed of an A / D converter 5 and a CPU 6. The error detector 3 detects the impedance difference between the transmitter and the antenna. The error signal Z is a signal that detects the impedance difference between the transmitter 1 and the antenna. The error signal φ is
It is a signal that detects the phase difference between the impedance of the transmitter 1 and the impedance of the antenna. Further, the error detector 3 has a voltage standing wave ratio (V
A traveling wave power (P f ) signal and a reflected wave power (P r ) signal for determining SWR) are detected. The A / D converter 5 is
It is a converter for converting analog signals P f and P r into digital signals. The CPU 6 is a microcomputer that controls the matching element of the matching circuit 4 while determining the error signals Z and φ from the error detector 3. The matching circuit 4 is a circuit for impedance matching between the transmitter and the antenna, and is composed of a combination of reactance elements. FIG.
2 (A), the Z signal (impedance difference signal between the transmitter and the antenna) detected by the error detector 3 and the φ signal (of the transmitter and the antenna) are detected as shown in FIG. The variable element of the matching circuit 4 is digitally controlled by the CPU 6 so that each error of the impedance phase difference signal) becomes zero.
【０００４】[0004]
【発明が解決しようとする課題】しかし、上記従来の整
合回路４の可変素子の制御方法は、リレー等によるバイ
ナリステップ切替のディジタル整合回路の場合、整合回
路４の各可変素子の値は、連続可変とはならず、切替の
最下位の桁の素子値の幅で階段上に変化する。従って、
バイナリステップの１ビット変化の中間の素子値を得る
ことはできない。図３に一例として、整合コイル可変の
バイナリステップに対する整合コイルのインダクタンス
の変化を示す。図３において、理想的な整合点のインダ
クタンスをとすると、実際のバイナリステップで設定
できるのは、又はのインダクタンスである。このた
め、理想的な整合点のインダクタンスを得ることができ
ず、各素子の設定は１ビットの設定誤差が生じることは
避けられない。この結果、整合素子の設定値が理想的な
整合点からずれたところにあるため、電圧定在波比（Ｖ
ＳＷＲ）で表した整合精度が最良点にならない欠点があ
る。However, according to the conventional method of controlling the variable elements of the matching circuit 4, the value of each variable element of the matching circuit 4 is continuous in the case of a binary step switching digital matching circuit such as a relay. It is not variable, but changes stepwise by the width of the element value of the lowest digit of switching. Therefore,
It is not possible to obtain an element value in the middle of a 1-bit change in a binary step. As an example, FIG. 3 shows a change in the inductance of the matching coil with respect to the binary step of changing the matching coil. In FIG. 3, assuming that the inductance at the ideal matching point is, the inductance that can be set in the actual binary step is or. For this reason, the ideal inductance at the matching point cannot be obtained, and it is unavoidable that a 1-bit setting error occurs in the setting of each element. As a result, since the set value of the matching element is displaced from the ideal matching point, the voltage standing wave ratio (V
There is a drawback that the matching accuracy expressed by (SWR) is not the best point.
【０００５】本発明の目的は、従来技術の問題点の設定
誤差を小さくし、電圧定在波比（ＶＳＷＲ）で表した整
合精度を向上することのできるディジタル空中線整合器
を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a digital antenna matching device capable of reducing the setting error, which is a problem of the prior art, and improving the matching accuracy represented by the voltage standing wave ratio (VSWR). .
【０００６】[0006]
【課題を解決するための手段】本発明のディジタル空中
線整合器は、送信機と空中線との間に挿入接続され、該
送信機からの送信信号を通過させるとともに該送信機と
空中線とのインピーダンス誤差信号と位相誤差信号、及
び進行波電力と反射波電力を検出する誤差検出器と、該
誤差検出器からの送信信号を外部から与えられる制御信
号によって制御されるリアクタンス可変整合素子を介し
て前記空中線に出力する整合回路と、前記進行波電力と
反射波電力をディジタル変換するアナログ／ディジタル
変換器と、前記インピーダンス誤差信号と位相誤差信号
の値がゼロになるような前記制御信号を前記整合回路に
与えるとともに、前記アナログ／ディジタル変換器の出
力を用いて電圧定在波比を算出し該電圧定在波比が規格
値以内であるかを判定するＣＰＵとを備えたディジタル
空中線整合器において、前記ＣＰＵは、前記制御信号を
前記整合回路に与えてインピーダンス誤差信号と位相誤
差信号の値がゼロになったのち、前記整合回路の複数の
可変素子の整合位置を±１〜２ビットずらせてその組合
せの中から前記電圧定在波比が最良になる組合せを求め
て前記整合回路の各可変素子の整合位置を補正するよう
にしたことを特徴とするものである。SUMMARY OF THE INVENTION A digital antenna matching device of the present invention is inserted and connected between a transmitter and an antenna so as to pass a transmission signal from the transmitter and an impedance error between the transmitter and the antenna. The signal and the phase error signal, the error detector for detecting the traveling wave power and the reflected wave power, and the antenna through the reactance variable matching element controlled by a control signal externally applied to the transmission signal from the error detector. To the matching circuit, the analog / digital converter for digitally converting the traveling wave power and the reflected wave power, and the control signal to the matching circuit such that the values of the impedance error signal and the phase error signal become zero. At the same time, the voltage standing wave ratio is calculated by using the output of the analog / digital converter to determine whether the voltage standing wave ratio is within the standard value. In a digital antenna matching device having a CPU for adjusting the impedance, the CPU applies the control signal to the matching circuit to reduce the values of the impedance error signal and the phase error signal to zero, and then the plurality of variable circuits of the matching circuit are changed. The matching positions of the variable elements of the matching circuit are corrected by shifting the matching positions of the elements by ± 1 to 2 bits and finding a combination having the best voltage standing wave ratio from the combinations. It is what
【０００７】[0007]
【発明の実施の形態】図１は本発明を適用する構成例図
である。図１の整合器２において、誤差検出器３からの
送信機と空中線のインピーダンス差を示すＺ信号と、送
信機と空中線のインピーダンスの位相差を示すφ信号の
各誤差信号をゼロにし、前述の従来の整合動作が完了し
た後に、次に示す電圧定在波比の最良点探索を行い、電
圧定在波比で表した整合精度を向上させる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing a configuration example to which the present invention is applied. In the matching device 2 of FIG. 1, each error signal of the Z signal indicating the impedance difference between the transmitter and the antenna from the error detector 3 and the φ signal indicating the phase difference between the impedance of the transmitter and the antenna is set to zero, and After the conventional matching operation is completed, the best point of the voltage standing wave ratio shown below is searched to improve the matching accuracy represented by the voltage standing wave ratio.
【０００８】図２（Ｂ）は本発明の制御方法を示す概要
フロチャートである。本発明による電圧定在波比の最良
点探索方法は、従来方式による整合が完了した時の各リ
アクタンス整合可変素子の整合位置から、それぞれ±ｎ
ビット変化させると、その組合せは２2n通りとなるが、
例えば、±１〜２ビット程度各整合素子の位置を動か
し、その時の各組合せにおける電圧定在波比が最良にな
る可変素子の組合せをＣＰＵ６によって求める。なお、
電圧定在波比は、誤差検出器３からのＰf 信号，Ｐr 信
号をＡ／Ｄ変換器５でディジタル信号に変換してＣＰＵ
６に取り込み、Ｐf ／Ｐr を計算して求める。FIG. 2B is a schematic flowchart showing the control method of the present invention. The method for searching the best point of the voltage standing wave ratio according to the present invention is ± n from the matching position of each reactance matching variable element when the matching by the conventional method is completed.
When the bit is changed, there are 2 2n combinations, but
For example, the positions of the matching elements are moved by about ± 1 to 2 bits, and the CPU 6 finds the combination of the variable elements having the best voltage standing wave ratio in each combination at that time. In addition,
For the voltage standing wave ratio, the P f signal and P r signal from the error detector 3 are converted into digital signals by the A / D converter 5 and the CPU
Taken into No. 6 and calculating P f / P r .
【０００９】[0009]
【発明の効果】本発明によって、従来技術の方式に比べ
整合回路の電圧定在波比で表した整合精度が向上できる
ため実用上の効果は大きい。According to the present invention, the matching accuracy represented by the voltage standing wave ratio of the matching circuit can be improved as compared with the method of the prior art, so that the practical effect is large.
【図１】本発明を適用する構成例図である。FIG. 1 is a configuration example diagram to which the present invention is applied.
【図２】従来の制御例（Ａ）と本発明の制御例（Ｂ）を
示すフローチャートである。FIG. 2 is a flowchart showing a conventional control example (A) and a control example (B) of the present invention.
【図３】本発明の作用を説明する図である。FIG. 3 is a diagram illustrating the operation of the present invention.
１ 送信機 ２ 整合器 ３ 誤差検出器 ４ 整合回路 ５ Ａ／Ｄ変換器 ６ ＣＰＵ 1 Transmitter 2 Matching device 3 Error detector 4 Matching circuit 5 A / D converter 6 CPU
Claims (1)
該送信機からの送信信号を通過させるとともに該送信機
と空中線とのインピーダンス誤差信号と位相誤差信号、
及び進行波電力と反射波電力を検出する誤差検出器と、
該誤差検出器からの送信信号を外部から与えられる制御
信号によって制御されるリアクタンス可変整合素子を介
して前記空中線に出力する整合回路と、前記進行波電力
と反射波電力をディジタル変換するアナログ／ディジタ
ル変換器と、前記インピーダンス誤差信号と位相誤差信
号の値がゼロになるような前記制御信号を前記整合回路
に与えるとともに、前記アナログ／ディジタル変換器の
出力を用いて電圧定在波比を算出し該電圧定在波比が規
格値以内であるかを判定するＣＰＵとを備えたディジタ
ル空中線整合器において、 前記ＣＰＵは、前記制御信号を前記整合回路に与えてイ
ンピーダンス誤差信号と位相誤差信号の値がゼロになっ
たのち、前記整合回路の複数の可変素子の整合位置を±
１〜２ビットずらせてその組合せの中から前記電圧定在
波比が最良になる組合せを求めて前記整合回路の各可変
素子の整合位置を補正するようにしたことを特徴とする
ディジタル空中線整合器。1. An insertion connection is provided between a transmitter and an antenna,
An impedance error signal and a phase error signal between the transmitter and the antenna while passing a transmission signal from the transmitter,
And an error detector for detecting traveling wave power and reflected wave power,
A matching circuit for outputting a transmission signal from the error detector to the antenna via a reactance variable matching element controlled by a control signal given from the outside, and an analog / digital converter for digitally converting the traveling wave power and the reflected wave power. A converter and the control signal that provides zero values of the impedance error signal and the phase error signal to the matching circuit, and calculates the voltage standing wave ratio using the output of the analog / digital converter. In a digital antenna matching device including a CPU that determines whether the voltage standing wave ratio is within a standard value, the CPU applies the control signal to the matching circuit to obtain values of an impedance error signal and a phase error signal. After the value becomes zero, the matching positions of the multiple variable elements in the matching circuit are
A digital antenna matching device characterized in that the matching position of each variable element of the matching circuit is corrected by finding a combination having the best voltage standing wave ratio from the combinations by shifting by 1 or 2 bits. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33571195A JPH09162757A (en) | 1995-12-01 | 1995-12-01 | Digital antenna matching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33571195A JPH09162757A (en) | 1995-12-01 | 1995-12-01 | Digital antenna matching device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09162757A true JPH09162757A (en) | 1997-06-20 |
Family
ID=18291630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33571195A Pending JPH09162757A (en) | 1995-12-01 | 1995-12-01 | Digital antenna matching device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09162757A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6570462B2 (en) * | 2000-11-08 | 2003-05-27 | Research In Motion Limited | Adaptive tuning device and method utilizing a surface acoustic wave device for tuning a wireless communication device |
| US6825794B2 (en) | 2000-06-02 | 2004-11-30 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| JP2009171523A (en) * | 2008-01-21 | 2009-07-30 | Hitachi Kokusai Electric Inc | Matching method of antenna matcher |
| JP2016201805A (en) * | 2012-06-01 | 2016-12-01 | ノースン・カンパニー・リミテッドNohsn Co., Ltd. | Impedance matching device and method |
| CN116742432A (en) * | 2023-08-15 | 2023-09-12 | 西安普用电子科技有限公司 | Interface universality adapting method and system for realizing cable assembly based on negative feedback |
-
1995
- 1995-12-01 JP JP33571195A patent/JPH09162757A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6825794B2 (en) | 2000-06-02 | 2004-11-30 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US7292822B2 (en) | 2000-06-02 | 2007-11-06 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US7747220B2 (en) | 2000-06-02 | 2010-06-29 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US8099048B2 (en) | 2000-06-02 | 2012-01-17 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US8260204B2 (en) | 2000-06-02 | 2012-09-04 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US8463185B2 (en) | 2000-06-02 | 2013-06-11 | Research In Motion Limited | Wireless communication system using surface acoustic wave (SAW) second harmonic techniques |
| US6570462B2 (en) * | 2000-11-08 | 2003-05-27 | Research In Motion Limited | Adaptive tuning device and method utilizing a surface acoustic wave device for tuning a wireless communication device |
| JP2009171523A (en) * | 2008-01-21 | 2009-07-30 | Hitachi Kokusai Electric Inc | Matching method of antenna matcher |
| JP2016201805A (en) * | 2012-06-01 | 2016-12-01 | ノースン・カンパニー・リミテッドNohsn Co., Ltd. | Impedance matching device and method |
| CN116742432A (en) * | 2023-08-15 | 2023-09-12 | 西安普用电子科技有限公司 | Interface universality adapting method and system for realizing cable assembly based on negative feedback |
| CN116742432B (en) * | 2023-08-15 | 2023-10-24 | 西安普用电子科技有限公司 | Interface universality adapting method and system for realizing cable assembly based on negative feedback |
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