JPH09121211A - Confirmation frame transfer system for fc/atm network conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the data transmission efficiency in an ATM line, an exchange, or the like. SOLUTION: An FC/ATM conversion part 1 and an ATM/FC conversion part 2 are provided with confirmation frame detectors 15 and 25 which detect a confirmation frame included in an FC (fiber channel) frame and address counters 16 and 26 which control in accordance with detection results of respective confirmation frame detectors so that write addresses and read addresses of memories 12 and 23 coincide with each other. Since the confirmation frame written in the memory is immediately read out and transferred as the result, the time interval of transmission of a series of data frames is narrowed in counter N ports which receive ATM cells from N ports side having an FC interface through an ATM network, and consequently, the whole of the data frame transfer time is shortened.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an N port having a fiber channel (hereinafter, FC) interface disposed at a distance from an N port via an asynchronous transfer mode network (hereinafter, referred to as an ATM network). Regarding the communication method, especially F
In services that require return of confirmation frames belonging to class 1 and class 2 of the C standard, when performing full-duplex communication,
FC / ATM that improves transmission efficiency by preventing increase in data frame transmission time due to waiting for confirmation frame return
The present invention relates to a confirmation frame transfer method in a network conversion device.

[0002]

2. Description of the Related Art Conventionally, connection between an FC network and an ATM network has not been made publicly, and no conventional example is found. However, the FC standard (ANSI standard X3T11) specifies a procedure for transmitting a data frame between N ports having an FC interface.
In 2, it is obliged to return a confirmation frame for a received data frame. This is to prevent overflow of the opposite receiving buffer, and a value E called an end_end_credit number reserved in advance is used.
The transmission side suppresses transmission of data frames so as not to exceed E.

[0003] The above-mentioned N port refers to a Node port provided in the terminals 110 and 120 as shown in FIG. The port of the switching apparatus 100 that performs the above operation is called an F port. Note that TX and RX in FIG. 7 indicate a transmission terminal and a reception terminal, respectively. Here, the above-mentioned value “EE” indicates the size represented by the number of frames of the reception buffer, and the larger the value, the more data frames can be transmitted at one time.

[0004] On the other hand, the number Nr of data frames received by the opposite receiving buffer is inserted into the header of the confirmation frame and notified. When the number of transmitted data frames is Ns, the N port on the transmitting side calculates the number of spare frames in the opposite receiving buffer using Expression (1). That is, EE-Ns + Nr [frame] (1) Further, it is allowed to further transmit a data frame of a number equal to the value.

Here, in the state of Nr <Ns, out of Ns transmitted data frames, (Ns-Nr) frames are still on the transmission line and have not arrived at the opposite N port. Then, when Nr = Ns at a certain point in time when the confirmation frame is received, a new number of data frames represented by Expression (2) can be transmitted. That is, EE−Ns + Nr = EE [frame] (2) Only one EE data frame can be transmitted at a time, and the next data frame cannot be transmitted until a confirmation frame is received.

[0006]

If such a conventional technique is applied to a transmission method via an ATM network as it is, it takes a long time to transmit a large number of data frames. The reason is that the delay of the confirmation frame due to FC / ATM conversion cannot be ignored, and the time for waiting for the confirmation frame increases, and during that time, the data frame cannot be transmitted.

That is, if a large number of data frames are set at a time to transmit a large number of data frames at one time, the queue of data frames in the FC / ATM converter increases in proportion thereto, and therefore, the number of confirmation frames becomes large. The waiting time that must wait until transmission of all data frames that have arrived before that is completed increases. If the arrival of the confirmation frame is delayed, the next data frame to be transmitted is made to wait, and as a result, the required transmission time of the data frame increases.

Accordingly, an object of the present invention is to reduce the waiting time of a confirmation frame at an N port connected to the present apparatus as much as possible. It is another object of the present invention to reduce the waiting time of the confirmation frame at the opposite N port as much as possible. That is, the transmission efficiency of the data frame is improved by reducing the waiting time of the confirmation frame at both N ports.

[0009]

SUMMARY OF THE INVENTION In order to solve such a problem, the present invention provides an FC / ATM in which an FC frame is input from an N port, converted into an ATM cell, and transmitted to an ATM network.
Confirmation frame detection means for detecting a confirmation frame included in the FC frame in either one of the conversion unit and the ATM / FC conversion unit that inputs an ATM cell from the ATM network, converts the ATM cell into an FC frame, and transmits the FC frame to the N port. Address control means for controlling the write address and the read address of either one of the first and second memories for accumulating FC frame data according to the detection result of the confirmation frame detection means. Is. Therefore, when the confirmation frame is detected in the FC frame to be communicated, it is controlled so that the write address and the read address of either one of the first and second memories match.
As a result, the confirmation frame written in the relevant memory is immediately read and transmitted.

Further, the FC / ATM conversion section stores a first confirmation frame detecting means for detecting a confirmation frame included in the FC frame, and a first confirmation frame detecting means for accumulating the FC frame in accordance with the detection result of the first confirmation frame detecting means. A first address control means for controlling the write address and the read address of the first memory to coincide with each other, and the ATM / F
A second confirmation frame detection unit that detects a confirmation frame included in the FC frame in the C conversion unit, and a write address of a second memory that stores the FC frame according to the detection result of the second confirmation frame detection unit. Second address control means for controlling so that the read address and the read address coincide with each other are provided. Therefore, when the confirmation frame is detected in the FC frame transmitted from the N port,
The write address and the read address of the first memory are controlled so that they match each other, and as a result, the confirmation frame written in the first memory is immediately read out to the ATM.
When a confirmation frame is detected in the converted FC frame transmitted to the network side or transmitted from the ATM network side, the write address and the read address of the second memory are controlled so as to match each other. As a result, the confirmation frame written in the second memory is immediately read out and N
Sent to the port side.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an FC / ATM network conversion device to which the present invention is applied. This device is
An FC / ATM conversion unit 1 shown in FIG. 1A for converting an FC frame input from a C frame input terminal Fin into an ATM cell and outputting it from an ATM cell output terminal Aout,
It comprises an ATM / FC converter 2 shown in FIG. 1B, which reversely converts an ATM cell input from the M cell input terminal Ain into an FC frame and outputs the same from the FC frame output terminal Fout.

Here, the FC / ATM converter 1 comprises an FC frame receiver 11, a memory 12, a segmenter 13, an ATM cell transmitter 14, and a confirmation frame detector 1.
5, and an address counter 16 for counting the addresses of the memory 12. Also, the ATM / FC converter 2
Is composed of an ATM cell receiver 21, a reassembly unit 22, a memory 23, an FC frame transmitter 24, a confirmation frame detector 25, and an address counter 26. The memories 12 and 23 are used for speed adjustment because the data rates of the ATM network and the FC are different.

Next, an outline of the operation of the present apparatus will be described with reference to FIG. The FC frame input from the N port (not shown) to the FC frame input terminal Fin has 1 byte equal to 1 byte.
This is a so-called 10-bit code displayed by 0 bits. This is a code designed to maintain DC balance and facilitate clock extraction. The FC frame receiver 11 performs optical / electrical conversion on the FC frame, and then reversely converts one byte into an 8-bit code. here,
As described above, the data speed of the FC interface and the speed of the ATM line need to be adjusted, and the inversely converted FC frame is temporarily written to the memory 12 at the FC speed and accumulated. You.

Thereafter, the FC frame is read out from the memory 1 in the order of input at the speed of the ATM line, divided into 48-byte ATM cells by the segmentation unit 13, and a 5-byte header is added to each cell.
It becomes a cell and is transmitted to the ATM network by the ATM cell transmitter 14. The last cell at the end of the FC frame is provided with an 8-byte trailer, and padding of the required number of bytes is inserted between the data and the trailer to finally form a 53-byte ATM cell. Becomes
The above description is for a protocol called AAL5 (ATM adaptation layer 5), but this is not necessarily required.

In such a conversion process, the segmenter 13 adds the destination address (Destina) included in the header of the FC frame to the header of the cell.
VPI (virtual path identifier) corresponding to (tion_ID)
And VCI (virtual channel identifier) are set. VP
The correspondence between I and VCI and the destination address (counter N port address) is determined in advance, and the correspondence information is held inside the apparatus. A generated in this way
The TM cell is subjected to electrical / optical conversion by the ATM cell transmitter 14, and then transmitted from the output terminal Aout to the ATM line.

On the other hand, an ATM cell input from an ATM line via an input terminal Ain is transmitted to an ATM cell receiver 21.
Then, light / electric conversion is performed to extract cells. Then, in the reassembly unit 22, the cell header, the trailer,
Padding is removed, and the original FC frame transmitted by the opposite N port is restored. The restored FC frame is temporarily stored in the memory 23 at the speed of the ATM line for speed adjustment. The stored FC frames are read from the memory 23 at the FC speed in the order of input, and are guided to the FC frame transmitter 24. Then, the FC frame transmitter 24 converts one byte into a 10-bit code, performs electrical / optical conversion, and transmits it as an FC frame to the N port. Note that the FC frame transmitter 24F and the above-described FC frame receiver 11 use the FC-0 of the FC layer.
(Physical layer), FC-1 (code layer), and FC-2
(A protocol layer).

Next, the operation of the present apparatus with respect to the confirmation frame included in the FC frame will be described. The FC frame input to the FC frame receiver 11 includes a data frame, a command frame, and a response frame in addition to the confirmation frame, but the header contents are different.
In this case, the acknowledgment frame detector 15 detects the acknowledgment frame based on the contents of the header and reports it to the address counter 16. Here, the address counter 16 stores the memory 12
The memory 12 is operated as a FIFO (first-in first-out) to control the written data to be read in the same order as the written data. .

Next, the operation of the address counter 16 will be described with reference to FIGS. In the map of the memory 12 shown in FIG. 2, it is assumed that each rectangular portion corresponds to an address of the memory 12. Further, in the example of FIG. 2, the frame data is stored in a data frame “0”, a data frame “1”,.
..Writing in frame order in the order of..., But it does not necessarily mean that the short data frame or the confirmation frame ACK occupies the entire rectangular portion, but merely indicates that it is accommodated at that address. Absent. Note that the example of FIG. 2 shows a case where the confirmation frame ACK is written immediately after the data frames “0” to “7” are sequentially accumulated, and the memory area above the confirmation frame ACK is empty. Has become.

Here, the address counter 16 at this time is
FIG. 3 shows control timings for reading / writing of the memory 12 according to the above. That is, the writing control of the memory 12 by the address counter 16 starts from the data frame “0” in the order of the numerals (corresponding to the data frame numbers) in the square frame in FIG. Here, it is assumed that the data frame “0” was read at the time when the confirmation frame ACK was written. In this example, the ATM line has a lower speed than the FC, and the read speed is lower than the write speed, and data frames are stored in the memory 12. Therefore, at this point, data frames subsequent to data frame “1” are stored in the memory 12. Here, if the address counter 16 does not control anything, the confirmation frame ACK is read after the data frame “7”.

However, in the present invention, the address counter 1
6, the confirmation frame ACK is read immediately after the data frame "0" because the read address of the memory 12 is changed and controlled so that the read address is immediately read from the same address as the address where the confirmation frame ACK was written. Thereafter, the address counter 16 restores the read address, so that the data is sequentially read from the data frame “1”. In this case, writing of a data frame subsequent to the confirmation frame ACK is performed sequentially from an empty address.

The relationship between the memory 23 and the address counter 26 in the ATM / FC converter 2 is the same as that described in the above-mentioned FC.
This is the same as the relationship between the memory 12 and the address counter 16 in the / ATM converter 1. That is, the input AT
The M cell is returned to the FC frame by the reassembly unit 22,
When writing to the memory 23 once, the confirmation frame detector 2
In step 5, it is detected whether the frame is a confirmation frame. Here, if the frame is a confirmation frame, it is notified to the address counter 26. The address counter 26 receives this report and changes the read address of the memory 23 to the address at which the confirmation frame ACK was written. Therefore, confirmation frame ACK
Is read immediately. Thereafter, the read address is restored. The map of the memory 23 of the ATM / FC converter 2 and the operation status of the address counter 26 are the same as those shown in FIGS.

In this example, since the FC is faster than the ATM line, the data frame is not stored in the memory 23 because the reading speed is faster than the writing speed. However, both FC and ATM line speeds are defined in various types, and FC may be slow unlike the above example. It is possible to flexibly cope with the memory control of the address counter by the configuration.

Next, an example in which full-duplex communication is performed between N ports will be described with reference to the sequence diagram of FIG.
In this example, the FC is faster than the ATM line, and the transmission time interval for each data frame is FC
This is an example in which a frame is narrower than an ATM cell transmission interval. FIG. 4 shows a case where two N ports A and E are separated from each other via an ATM network C. Both N ports A and E are connected to an ATM network C via converters B and D, respectively. Here, in FIG. 4, the horizontal direction indicates the distance, and the vertical axis indicates the time, and it is assumed that the time elapses from the upper direction to the lower direction in the figure.

First, it is assumed that a series of data frames indicated by a dotted line from the opposite N port (N port E) is transmitted to the N port A via the conversion device D → the ATM network C → the conversion device B. In this case, the conversion device D sets the FC frame to A
The data is converted into a TM cell, and the conversion device B converts the data back into an FC frame again. When a series of data frames reaches N port A, a confirmation frame ACK_N is returned from N port A. Here, “N” of the confirmation frame ACK_N is N
It represents the number of data frames received by port A. In this example, N = 4. However, in this case, since full-duplex communication is performed, N port A transmits a series of data frames indicated by solid lines in the figure independently to the opposite N port E at this time. The order in which the conversion device B receives the acknowledgment frame ACK_N is the sixth in the data frame. At this time, in the conversion device B, the second and subsequent data frames are still left in the memory 12 as a queue when the transmission of the first data frame is completed.

As described above, this confirmation frame A
CK_N is transmitted to the ATM network immediately after the first data frame. Thereafter, the second and subsequent data frames are sequentially transmitted. In other words, the acknowledgment frame ACK_N received sixth by the converter B is carried up secondly and transmitted from the converter B to the ATM network C. Here, when the confirmation frame ACK_N is received by the conversion device D, it is assumed that the first data frame has not been transferred yet. As described above, also in this direction, the acknowledgment frame ACK_N has priority, and is immediately transferred to the opposite N port E before the first data frame is transferred. Therefore, the acknowledgment frame ACK_N is transferred from the second to the first on this transmission path. Therefore,
FC / ATM conversion and ATM / FC with two converters B and D
By receiving the inverse conversion, the confirmation frame ACK_N
Arrives at the opposite N-port E, where the sixth order transmitted from N-port A goes up to the first.

Here, an example in which the transfer control of the confirmation frame is not performed will be described with reference to FIG. 6 in comparison with the example of the transfer control of the confirmation frame ACK at the time of the full duplex communication. In the example shown in FIG. 6, only the handling of the confirmation frame is different from FIG. 4, and the other conditions are the same. Where N
Before transmitting the confirmation frame ACK_N on the port A,
It is assumed that five data frames have already been transmitted to the converter B side. In this case, the conversion device B receives these five data frames and transmits them to the ATM network 3 side, and then transfers the confirmation frame ACK_N to the ATM network C. When the acknowledgment frame ACK_N arrives at the conversion device D, the conversion device D queues the acknowledgment frame ACK_N in the memory 12 until the transfer is completed because there is a transfer remainder of the data frame received up to that time. And accumulate it. As a result, the arrival of the confirmation frame ACK_N at the opposite N port E is delayed.

That is, in this example, since the confirmation frame is treated in the same manner as a normal data frame, a transmission delay occurs, and the two converters B and E accumulate the delay. In the above example, one arrow is described as one data frame for the sake of simplicity, but this is not always necessary. For example, even if one arrow represents hundreds to tens of thousands of data frames, The operation is the same.

Next, referring to FIG. 5, how much the throughput depends on the case where the transfer control of the confirmation frame is performed (case of FIG. 4) and the case where the transfer control of the confirmation frame is not performed (case of FIG. 6). The improvement will be described. In FIG. 5, some assumptions are made to verify the effect of the method of the present invention. First, it is assumed that the arrangement intervals of the two N ports A and E are close, and there is no transmission delay of the ATM network C, and the N frames A and E also receive an acknowledgment frame ACK_N immediately after receiving N data frames. It is assumed that there is no internal processing delay as a return. In addition, it is assumed that the transfer delays of the confirmation frames ACK_N are also sufficiently small for the conversion devices B and D.

It is also assumed that full duplex communication is being performed between the two N ports A and E, and that the FC speed is faster than the ATM speed. Under such conditions, assuming that the time length of one frame formed into cells in the ATM network C is T seconds, the time length of a series of N frames as a whole is T × N seconds. The occurrence time position of the acknowledgment frame ACK_N for this series of data frames is the first position preceding the N data frames transmitted in the reverse direction because full-duplex communication in which transmission and reception are performed independently; This is some point between the N + 1th position immediately after the transmission of the N data frames. Therefore, if these are averaged, the confirmation frame ACK
_N can be considered to occur N / 2th in each data frame.

Therefore, when the transfer control of the confirmation frame shown in FIG. 6 is not performed, the confirmation frame ACK_N is kept waiting in the queue for N / 2 × T seconds on average. In contrast, in the example of FIG. 4, no waiting time occurs. Therefore, the time required from the start of transmission of the first N data frames to the reception of the acknowledgment frame ACK_N and the transmission of the next N data frames is the sum of the above-described respective times. In the case of, N × T + (N / 2) × T = (3N / 2) × T [sec] (3), and in the case of FIG. 4, N × T [sec] (4).

Here, when the throughput (the number of packets that can be transmitted per second) on the ATM line is expressed in terms of the number of frames, in the case of FIG. 6, N frames / {(3N / 2) × T} = 2 / 3T [frame / second] (5), and in the case of FIG. 4, N frame / N × T = 1 / T [frame / second] (6) Then, based on the case of FIG. 6, (1 / T) / (2 / 3T) = 1.5 times (7), and the throughput is improved by 1.5 times on average.

Thus, at the opposite N port E,
The time interval between the transmission of a series of data frames and the transmission of the next series of data frames is reduced, and the transfer time of the entire data frame can be reduced.
The reason is that the conversion device E transfers the confirmation frame addressed to the opposite N port E without passing through the queue of data frames waiting for transmission.

Also, since the N-port A can immediately receive the confirmation frame restored from the ATM cell, the time interval between the end of the transmission of a series of data frames and the transmission of the next series of data frames is also narrowed. Can reduce the transfer time of the data frame. The reason is that the conversion frame B can immediately transfer the confirmation frame arriving from the opposite N port E via the ATM network C to the N port A without passing through the queue of data frames addressed to the N port A. . As described above, in the full-duplex communication, the transmission of the confirmation frame in both directions does not pass through the queue, so that the transmission efficiency in both directions is improved. Therefore, ATM network C
Throughput is improved 1.5 times on average.

[0034]

As described above, according to the present invention, N
An FC / ATM converter for inputting an FC frame from a port and converting it to an ATM cell and transmitting it to the ATM network; and an ATM / FC converter for inputting an ATM cell from the ATM network and converting it to an FC frame and transmitting it to the N port. Either, FC
Control means for detecting a confirmation frame included in the frame, and control such that a write address and a read address of one of the first and second memories match according to a detection result of the confirmation frame detection means. Since the confirmation frame written in the memory is immediately read out and transferred, for example, at the opposite N port receiving the ATM cell data via the ATM network, The time interval between the transmission of a series of data frames and the transmission of the next series of data frames is reduced, and the transfer time of the entire data frame can be reduced.

Further, the FC / ATM conversion section writes first confirmation frame detecting means for detecting a confirmation frame included in the FC frame, and writes the first memory into the first memory in accordance with the detection result of the first confirmation frame detecting means. First address control means for controlling an address and a read address to be coincident with each other, and a second confirmation frame detection means for detecting a confirmation frame included in the FC frame in the ATM / FC converter; The second address control means for controlling the write address and the read address of the second memory so as to match according to the detection result of the confirmation frame detection means of No. 2 is provided. The confirmation frame transmitted from the current N port to the opposite N port is a data frame stored in the first memory and waiting for transfer to the opposite N port. Data that is immediately converted to an ATM cell and transmitted to the ATM network prior to the network, and the confirmation frame in the ATM cell input from the ATM network is stored in the second memory and is waiting to be transferred to the N port. Since it is transferred to the N port immediately before the frame,
In full-duplex communication, the data transmission efficiency in both directions is dramatically improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an FC / ATM network conversion device to which the present invention is applied.

FIG. 2 is a diagram showing a map of a memory in the conversion device.

FIG. 3 is a timing chart showing write and read timings of the memory.

FIG. 4 is a timing chart showing data transmission / reception timing during full-duplex communication in a system including the conversion device.

FIG. 5 is a timing chart for explaining a state of transmission efficiency in the conversion device.

FIG. 6 is a timing chart showing a data transmission / reception timing during conventional full-duplex communication.

FIG. 7 is an explanatory diagram of an N port used in the present invention.

[Explanation of symbols]

11 ... FC frame receiver, 12, 23 ... Memory, 13
... segmentation device, 14 ... ATM cell transmitter, 1
5, 25: confirmation frame detector, 16, 26: address counter, 21: ATM cell receiver, 22: reassembler, 24: FC frame transmitter, ACK, ACK_N
… Confirmation frame.

Claims (2)

[Claims] 1. An FC frame receiver disposed between an N port having an FC interface which is a fiber channel interface and an ATM network which is an asynchronous transfer mode network, for receiving an FC frame from the N port, and an FC frame. A first memory into which the output of the receiver is written, a segmenter for reading out the frame data of the first memory and converting it into ATM cells,
FC / A consisting of an ATM cell transmitter for transmitting to the TM network
An ATM cell receiver having a TM converter, receiving an ATM cell from an ATM network, a reassembly unit converting an output of the ATM cell receiver into an FC frame, and a second output to which the output of the reassembly unit is written. A full-duplex communication is provided by the FC / ATM conversion unit and the ATM / FC conversion unit, which includes an ATM / FC conversion unit including a memory and an FC frame transmitter that reads the FC frame of the second memory and transmits the FC frame to the N port. An FC / ATM network conversion device for performing confirmation frame detection means for detecting a confirmation frame included in the FC frame in any one of the FC / ATM conversion unit and the ATM / FC conversion unit, and a confirmation frame detection unit. According to the detection result of the means, the write address and the read address of one of the first memory and the second memory may match. A confirmation frame transfer system in an FC / ATM network conversion device, characterized in that the confirmation frame is transferred at high speed. 2. An FC frame receiver disposed between an N port having an FC interface which is a fiber channel interface and an ATM network which is an asynchronous transfer mode network, for receiving an FC frame from the N port, and an FC frame. A first memory into which the output of the receiver is written, a segmenter for reading out the frame data of the first memory and converting it into ATM cells,
FC / A consisting of an ATM cell transmitter for transmitting to the TM network
An ATM cell receiver having a TM converter, receiving an ATM cell from an ATM network, a reassembly unit converting an output of the ATM cell receiver into an FC frame, and a second output to which the output of the reassembly unit is written. A full-duplex communication is provided by the FC / ATM conversion unit and the ATM / FC conversion unit, which includes an ATM / FC conversion unit including a memory and an FC frame transmitter that reads the FC frame of the second memory and transmits the FC frame to the N port. An FC / ATM network conversion device for performing the following, wherein the FC / ATM conversion unit includes a first confirmation frame detection unit for detecting a confirmation frame included in the FC frame, and a detection result of the first confirmation frame detection unit. A first address control means for controlling the write address and the read address of the first memory so as to coincide with each other. A second confirmation frame detecting unit for detecting a confirmation frame included in the FC frame in the ATM / FC conversion unit, and a write address and a read of the second memory according to a detection result of the second confirmation frame detecting unit. A confirmation frame transfer system in an FC / ATM network conversion device, comprising: a second address control unit for controlling the address so that the addresses coincide with each other, and transferring the confirmation frame at a high speed.