JPH0888470A - Ceramic multilayer substrate for mounting electronic parts and its manufacturing method - Google Patents

Ceramic multilayer substrate for mounting electronic parts and its manufacturing method

Info

Publication number
JPH0888470A
JPH0888470A JP6222188A JP22218894A JPH0888470A JP H0888470 A JPH0888470 A JP H0888470A JP 6222188 A JP6222188 A JP 6222188A JP 22218894 A JP22218894 A JP 22218894A JP H0888470 A JPH0888470 A JP H0888470A
Authority
JP
Japan
Prior art keywords
multilayer substrate
electrode
ceramic multilayer
mounting
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6222188A
Other languages
Japanese (ja)
Inventor
Kazutaka Suzuki
一高 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP6222188A priority Critical patent/JPH0888470A/en
Publication of JPH0888470A publication Critical patent/JPH0888470A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE: To provide a ceramic multilayer substrate for mounting electronic parts for easily mounting the electronic parts even if the terminal electrode for connecting electronic parts is formed with a narrow pitch and its manufacturing method. CONSTITUTION: A plurality of ceramic green sheets 11 where a conductor pattern 1c and a through hole 1b are formed are laminated and at the same time a through hole is formed on the surface of the lamination body corresponding to a terminal electrode 2a formed on the bottom surface of a semiconductor integrated circuit 2 for mounting, a resin sheet 4 which can be burnt down due to heat where an electrode 10 is formed by filling a material for conductive connection into the through hole, and these are contact-bonded. After that, they are baked at 150 deg.C and the resin sheet 4 is burnt down, thus obtaining a ceramic multilayer substrate 1 where a bump electrode 1a with a specific height is formed in one piece on the surface. The bump electrode 1a is used as a bump and the bump electrode 1a is connected to a terminal electrode 2a conductively, thus extremely simplifying the process for mounting electronic parts to the substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体集積回路等の電
子部品を表面にフェイスダウンボンディングによって実
装する電子部品実装用セラミック多層基板及びその製造
方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multilayer substrate for mounting electronic components such as semiconductor integrated circuits on the surface by face down bonding and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、半導体集積回路等の電子部品と電
子部品実装用セラミック多層基板との接続方法としてフ
ェイスダウンボンディングが知られている。フェイスダ
ウンボンディングとは、電子部品の底面に形成されたパ
ッド(接続用端子電極)或いは実装基板の電極上にバン
プを設け、このバンプを介して電子部品のパッドと基板
上の電極とを接合剤を用いて接合し、電子部品と基板上
の配線とを電気的に接続する方法である。
2. Description of the Related Art Conventionally, face-down bonding has been known as a method for connecting an electronic component such as a semiconductor integrated circuit and a ceramic multilayer substrate for mounting the electronic component. The face-down bonding is a method in which a bump is provided on a pad (connection terminal electrode) formed on the bottom surface of an electronic component or an electrode on a mounting substrate, and the pad of the electronic component and the electrode on the substrate are bonded via the bump. Is used to electrically connect the electronic component to the wiring on the substrate.

【0003】バンプ形成方法としては、実装基板の電極
上にメッキにより形成する方法、金属ボールを付ける方
法、ワイヤーボンダーによりバンプ形成するいわゆるス
タッドバンプ等の方法が用いられている。
As a method of forming bumps, there are used a method of forming on the electrodes of the mounting substrate by plating, a method of attaching a metal ball, and a so-called stud bump method of forming bumps by a wire bonder.

【0004】また、バンプと電極との接合方法として
は、導電性樹脂を塗布して硬化させる方法、異方導電性
樹脂を充填して電子部品を加圧しながら硬化させる方
法、基板電極上にクリーム半田印刷や半田ディップによ
り半田を供給し、リフローする方法などがある。
Further, as a method of joining the bumps and the electrodes, a method of applying a conductive resin and curing the resin, a method of filling an anisotropic conductive resin and curing the electronic component under pressure, and a cream on the substrate electrode. There is a method of supplying solder by solder printing or solder dipping, and then performing reflow.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、バンプ
形成方法のうち、メッキ金属ボールの半田付けは、電子
部品のアルミ(Al)パット上に幾層ものメタル層をメ
ッキ蒸着等により形成する必要があるため、工程が複雑
になる。また、ワイヤーボンダーによるスタッドバンプ
形成は、工程は簡略であるが、バンプ径が80μm程度
であるため、パッドのピッチを狭くすることが困難であ
るという問題点があった。
However, in the bump forming method, the soldering of the plated metal balls requires the formation of several metal layers on the aluminum (Al) pad of the electronic component by plating vapor deposition or the like. Therefore, the process becomes complicated. Further, although the stud bump formation by the wire bonder is simple in process, there is a problem that it is difficult to reduce the pad pitch because the bump diameter is about 80 μm.

【0006】本発明の目的は上記の問題点に鑑み、電子
部品の接続用端子電極のピッチを狭く形成しても容易に
実装できる電子部品実装用セラミック多層基板及びその
製造方法を提供することにある。
In view of the above problems, an object of the present invention is to provide a ceramic multilayer substrate for electronic component mounting which can be easily mounted even if the pitch of the connection terminal electrodes of the electronic component is formed narrow, and a method for manufacturing the same. is there.

【0007】[0007]

【課題を解決するための手段】本発明は上記の目的を達
成するために請求項1では、半導体集積回路等の電子部
品を表面に実装する電子部品実装用セラミック多層基板
において、前記電子部品の接続用端子電極に対応して表
面に形成された電極を有すると共に、前記電極には所定
の高さを有する凸部が一体形成されている電子部品実装
用セラミック多層基板を提案する。
In order to achieve the above-mentioned object, the present invention provides a ceramic multilayer substrate for mounting electronic components, such as a semiconductor integrated circuit, on a surface of the ceramic multilayer substrate according to claim 1, wherein There is proposed a ceramic multilayer substrate for mounting electronic parts, which has electrodes formed on the surface corresponding to the connection terminal electrodes, and the electrodes are integrally formed with convex portions having a predetermined height.

【0008】また、請求項2では、半導体集積回路等の
電子部品を表面に実装する電子部品実装用セラミック多
層基板において、前記電子部品の接続用端子電極に対応
して表面に一体形成された所定高さを有する突起電極を
有すると共に、該突起電極は内層部に形成された導体パ
ターンにスルーホールによって接続されている電子部品
実装用セラミック多層基板を提案する。
According to a second aspect of the present invention, in a ceramic multi-layer substrate for mounting electronic components, such as a semiconductor integrated circuit, on which electronic components are mounted, a predetermined surface integrally formed corresponding to the connecting terminal electrodes of the electronic components. We propose a ceramic multilayer substrate for mounting electronic parts, which has a protruding electrode having a height, and the protruding electrode is connected to a conductor pattern formed in an inner layer portion by a through hole.

【0009】また、請求項3では、半導体集積回路等の
電子部品を表面に実装する電子部品実装用セラミック多
層基板の製造方法であって、所定の導体パターン若しく
は導体パターン及びスルーホールが形成された複数のセ
ラミックグリーンシートを積層すると共に、該セラミッ
クグリーンシートの積層体の表面に、前記電子部品の底
面に形成された接続用端子電極に対応して貫通孔が形成
され、該貫通孔内に導電接続用材料が充填された熱焼失
性のシートを積層し、前記セラミックグリーンシート及
び熱焼失性シートを圧着した後、所定温度にて焼成し、
前記熱焼失性シートを焼失させることにより、表面に所
定高さの凸部が一体形成された電極を有するセラミック
多層基板を得る電子部品実装用セラミック多層基板の製
造方法を提案する。
According to a third aspect of the present invention, there is provided a method of manufacturing a ceramic multilayer substrate for mounting electronic components, such as a semiconductor integrated circuit, on the surface of which a predetermined conductor pattern or conductor pattern and through holes are formed. A plurality of ceramic green sheets are laminated, and through holes are formed on the surface of the laminated body of the ceramic green sheets corresponding to the connection terminal electrodes formed on the bottom surface of the electronic component, and the conductive holes are formed in the through holes. Laminating a heat-burnable sheet filled with a connecting material, after pressure bonding the ceramic green sheet and the heat-burnable sheet, fired at a predetermined temperature,
A method for manufacturing a ceramic multilayer substrate for electronic component mounting is proposed, in which a ceramic multilayer substrate having electrodes having integrally formed projections of a predetermined height on the surface is obtained by burning out the heat-burnable sheet.

【0010】また、請求項4では、半導体集積回路等の
電子部品を表面に実装する電子部品実装用セラミック多
層基板の製造方法であって、所定の導体パターン及びス
ルーホールが形成された複数のセラミックグリーンシー
トを積層すると共に、該セラミックグリーンシートの積
層体の表面に、前記電子部品の底面に形成された接続用
端子電極に対応して貫通孔が形成され、該貫通孔内に導
電接続用材料が充填された熱焼失性のシートを積層し、
前記セラミックグリーンシート及び熱焼失性シートを圧
着した後、所定温度にて焼成し、前記熱焼失性シートを
焼失させることにより、表面に所定高さの突起電極を有
するセラミック多層基板を得る電子部品実装用セラミッ
ク多層基板の製造方法を提案する。
According to a fourth aspect of the present invention, there is provided a method of manufacturing a ceramic multilayer substrate for mounting electronic components, such as a semiconductor integrated circuit, on the surface of which a plurality of ceramics having predetermined conductor patterns and through holes are formed. Along with stacking the green sheets, through holes are formed on the surface of the laminated body of the ceramic green sheets corresponding to the connecting terminal electrodes formed on the bottom surface of the electronic component, and the conductive connecting material is formed in the through holes. Laminated heat-burnable sheets filled with
The ceramic green sheet and the heat-burnout sheet are pressure-bonded and then fired at a predetermined temperature to burn off the heat-burnable sheet to obtain a ceramic multilayer substrate having protruding electrodes of a predetermined height on the surface Electronic component mounting A method of manufacturing a ceramic multilayer substrate is proposed.

【0011】[0011]

【作用】本発明の請求項1によれば、電子部品の接続用
端子電極に対応して表面に形成された電極には所定の高
さを有する凸部が一体形成されているので、該凸部をバ
ンプとして用い、該電極と前記電子部品の接続用端子電
極とが導電接続される。
According to the first aspect of the present invention, since the electrode formed on the surface corresponding to the connecting terminal electrode of the electronic component is integrally formed with the convex portion having a predetermined height, the convex portion is formed. The electrode is conductively connected to the connection terminal electrode of the electronic component by using the portion as a bump.

【0012】また、請求項2によれば、電子部品の接続
用端子電極に対応して基板表面には所定の高さを有する
突起電極が一体形成されているので、該突起電極をバン
プとして用い、該突起電極と前記電子部品の接続用端子
電極とが導電接続される。
According to the second aspect of the present invention, since the protruding electrode having a predetermined height is integrally formed on the substrate surface corresponding to the connecting terminal electrode of the electronic component, the protruding electrode is used as a bump. The protruding electrode and the connecting terminal electrode of the electronic component are conductively connected.

【0013】また、請求項3によれば、所定の導体パタ
ーン若しくは導体パターン及びスルーホールが形成され
た複数のセラミックグリーンシートが積層されると共
に、該セラミックグリーンシートの積層体の表面に、実
装対象となる電子部品の底面に形成された接続用端子電
極に対応して貫通孔が形成され、該貫通孔内に導電接続
用材料が充填された熱焼失性のシートが積層される。さ
らに、前記セラミックグリーンシート及び熱焼失性シー
トが圧着された後、所定温度にて焼成される。これによ
り、前記熱焼失性シートが焼失され、表面に所定高さの
凸部が一体形成された電極を有するセラミック多層基板
が得られる。このセラミック多層基板に前記電子部品を
実装する際には、前記電極に一体形成されている凸部が
バンプとして用いられ、前記電極と前記電子部品の接続
用端子電極とが導電接続される。
According to a third aspect of the present invention, a plurality of ceramic green sheets on which a predetermined conductor pattern or conductor pattern and through holes are formed are laminated, and a mounting object is mounted on the surface of the laminated body of the ceramic green sheets. Through holes are formed corresponding to the connecting terminal electrodes formed on the bottom surface of the electronic component, and a heat-burnable sheet filled with a conductive connecting material is stacked in the through holes. Further, the ceramic green sheet and the heat-disintegratable sheet are pressure-bonded and then fired at a predetermined temperature. As a result, the heat-burnable sheet is burned off, and a ceramic multilayer substrate having an electrode integrally formed with a convex portion having a predetermined height on the surface is obtained. When mounting the electronic component on the ceramic multilayer substrate, the convex portion integrally formed with the electrode is used as a bump, and the electrode and the connection terminal electrode of the electronic component are conductively connected.

【0014】また、請求項4によれば、所定の導体パタ
ーン及びスルーホールが形成された複数のセラミックグ
リーンシートが積層されると共に、該セラミックグリー
ンシートの積層体の表面に、実装対象となる電子部品の
底面に形成された接続用端子電極に対応して貫通孔が形
成され、該貫通孔内に導電接続用材料が充填された熱焼
失性のシートが積層される。さらに、前記セラミックグ
リーンシート及び熱焼失性シートが圧着された後、所定
温度にて焼成される。これにより、前記熱焼失性シート
が焼失され、表面に所定高さの突起電極が一体形成され
たセラミック多層基板が得られる。このセラミック多層
基板に前記電子部品を実装する際には、前記突起電極が
バンプとして用いられ、前記突起電極と前記電子部品の
接続用端子電極とが導電接続される。
According to a fourth aspect of the present invention, a plurality of ceramic green sheets each having a predetermined conductor pattern and through holes are laminated, and an electronic object to be mounted is mounted on the surface of the laminated body of the ceramic green sheets. Through holes are formed corresponding to the connecting terminal electrodes formed on the bottom surface of the component, and a heat-burnable sheet filled with a conductive connecting material is laminated in the through holes. Further, the ceramic green sheet and the heat-disintegratable sheet are pressure-bonded and then fired at a predetermined temperature. As a result, the heat-burnable sheet is burned off, and a ceramic multilayer substrate having a projection electrode of a predetermined height integrally formed on the surface is obtained. When mounting the electronic component on the ceramic multilayer substrate, the protruding electrode is used as a bump, and the protruding electrode and the connection terminal electrode of the electronic component are conductively connected.

【0015】[0015]

【実施例】以下、図面に基づいて本発明の一実施例を説
明する。図1は、本発明の第1の実施例のセラミック多
層基板を示す外観図、図2はその側面断面図である。図
において、1はセラミック多層基板で、その表面には、
実装対象となる半導体集積回路(IC)2の底面に形成
された接続用の端子電極(図示せず)に対応した位置に
複数の突起電極1aが一体形成されている。さらに、こ
れらの突起電極1aはセラミック多層基板1の内層部に
形成された導体パターン1cにスルーホール1bを介し
て接続されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is an external view showing a ceramic multilayer substrate of a first embodiment of the present invention, and FIG. 2 is a side sectional view thereof. In the figure, 1 is a ceramic multi-layer substrate, on the surface of which,
A plurality of protruding electrodes 1a are integrally formed at positions corresponding to terminal electrodes (not shown) for connection formed on the bottom surface of a semiconductor integrated circuit (IC) 2 to be mounted. Further, these protruding electrodes 1a are connected to the conductor pattern 1c formed on the inner layer portion of the ceramic multilayer substrate 1 through through holes 1b.

【0016】前述のセラミック多層基板1の製造方法は
次に述べるとおりである。まず、図3に示すように、光
吸収率の悪いベースフィルム3上にエチルセルロース溶
剤を混練してシート化した厚さ30μmの樹脂シート4
と、光吸収率の良いフィルム5を順に重ねる。これにレ
ーザー光6を照射し、フィルム5及び樹脂シート4を貫
通する直径50μmの穴7をあける。
The method of manufacturing the above-mentioned ceramic multilayer substrate 1 is as follows. First, as shown in FIG. 3, a resin sheet 4 having a thickness of 30 μm formed by kneading an ethylcellulose solvent on a base film 3 having a poor light absorption rate to form a sheet.
Then, the films 5 having a good light absorption rate are sequentially stacked. This is irradiated with laser light 6 to form a hole 7 having a diameter of 50 μm that penetrates the film 5 and the resin sheet 4.

【0017】次に、この上にAg−Pd電極ペースト8
をのせ、スキージ9により穴7へAg−Pd電極ペース
ト8を充填して電極10を形成する。
Next, Ag-Pd electrode paste 8 is applied on top of this.
Then, the hole 7 is filled with the Ag—Pd electrode paste 8 with the squeegee 9 to form the electrode 10.

【0018】この後、図4に示すように、上下のフィル
ム3,5を剥した樹脂シート4と、スルーホール1b及
び内部導体パターン1cが形成されたセラミックグリー
ンシート11を積層した後、圧着して積層体を形成す
る。
Thereafter, as shown in FIG. 4, the resin sheet 4 from which the upper and lower films 3 and 5 are peeled off and the ceramic green sheet 11 having the through holes 1b and the internal conductor patterns 1c formed thereon are laminated and then pressure-bonded. To form a laminate.

【0019】次いで、この積層体を焼成することにより
セラミックグリーンシート11の絶縁セラミックス、及
びスルーホール1b、導体パターン1c、電極10のペ
ーストが焼結すると共に、樹脂シート4が焼失するた
め、表面に突起電極1aが一体形成されたセラミック多
層基板1ができあがる。
Then, by firing this laminated body, the insulating ceramics of the ceramic green sheet 11 and the paste of the through holes 1b, the conductor patterns 1c, and the electrodes 10 are sintered, and the resin sheet 4 is burned off. The ceramic multilayer substrate 1 integrally formed with the protruding electrodes 1a is completed.

【0020】このセラミック多層基板1に半導体集積回
路2を実装するときは、セラミック多層基板1の突起電
極1aに熱硬化型の導電性接着剤をピン転写し、突起電
極1aと半導体集積回路2の端子電極2aとを位置合わ
せした後、セラミック多層基板1上に半導体集積回路2
を搭載し、150℃の温度で焼き付けることにより、半
導体集積回路2の端子電極2aと突起電極1aとが導電
接続される。
When the semiconductor integrated circuit 2 is mounted on the ceramic multilayer substrate 1, a thermosetting conductive adhesive is pin-transferred to the protruding electrodes 1a of the ceramic multilayer substrate 1 so that the protruding electrodes 1a and the semiconductor integrated circuit 2 are connected to each other. After aligning with the terminal electrode 2a, the semiconductor integrated circuit 2 is formed on the ceramic multilayer substrate 1.
Is mounted and baked at a temperature of 150 ° C., so that the terminal electrode 2a of the semiconductor integrated circuit 2 and the protruding electrode 1a are conductively connected.

【0021】尚、セラミック多層基板1を作成する際の
表面の樹脂シート4は、セラミックグリーンシート11
に密着し、焼成時に焼失するものであれば良く、例えば
PETフィルム、紙等であっても良い。また、樹脂シー
ト4への電極10の形成は、メッキ、蒸着等の方法を用
いても良い。
The resin sheet 4 on the surface when the ceramic multilayer substrate 1 is formed is the ceramic green sheet 11
Any material can be used, as long as it is in close contact with, and burns off during firing, and may be, for example, PET film or paper. The electrode 10 may be formed on the resin sheet 4 by using a method such as plating or vapor deposition.

【0022】次に、本発明の第2の実施例を説明する。
図5は第2の実施例のセラミック多層基板を示す外観
図、図6はその側面断面図である。図において、20は
セラミック多層基板(以下、基板と称する)で、絶縁体
層20a,20b、磁性体層20c、及び誘電体層20
dを積層して構成されている。
Next, a second embodiment of the present invention will be described.
FIG. 5 is an external view showing a ceramic multilayer substrate of the second embodiment, and FIG. 6 is a side sectional view thereof. In the figure, reference numeral 20 denotes a ceramic multilayer substrate (hereinafter referred to as a substrate), which includes insulator layers 20a and 20b, a magnetic layer 20c, and a dielectric layer 20.
It is configured by laminating d.

【0023】磁性体層20c内部にはコイルパターン2
1が、また誘電体層20d内部にはコンデンサ対向電極
22がそれぞれ形成されていると共に、基板20の裏面
には表面電極23に導電接続された抵抗体24が実装さ
れている。さらに、基板20の表面には、コンデンサ対
向電極22等に接続されたスルーホール25上に一体形
成されたAu突起電極26a及び表面電極27上に一体
形成されたAu突起電極26b(凸部)が設けられてい
る。また、基板20の側面には表面電極23,27等に
導電接続された外部電極28が形成されている。
The coil pattern 2 is provided inside the magnetic layer 20c.
1, a capacitor counter electrode 22 is formed inside the dielectric layer 20d, and a resistor 24 conductively connected to a surface electrode 23 is mounted on the back surface of the substrate 20. Further, on the surface of the substrate 20, there are provided an Au protruding electrode 26a integrally formed on the through hole 25 connected to the capacitor counter electrode 22 and the like and an Au protruding electrode 26b (convex portion) integrally formed on the surface electrode 27. It is provided. Further, an external electrode 28 that is conductively connected to the surface electrodes 23, 27 and the like is formed on the side surface of the substrate 20.

【0024】前述のセラミック多層基板20の製造方法
は次に述べるとおりである。まず、図7に示すように、
第1の実施例と同様に光吸収率の悪いベースフィルム上
にエチルセルロース溶剤を混練してシート化した厚さ3
0μmの樹脂シートと、光吸収率の良いフィルムを順に
重ねる。これにレーザー光を照射し、光吸収率の良いフ
ィルム及び樹脂シートを貫通する直径50μmの穴7を
あける。次に、穴の内部にメッキによってAu電極31
aを形成する。
The method for manufacturing the above-mentioned ceramic multilayer substrate 20 is as follows. First, as shown in FIG.
As in the first embodiment, a base film having a poor light absorption rate was kneaded with an ethyl cellulose solvent to form a sheet having a thickness of 3
A 0 μm resin sheet and a film having a good light absorption rate are sequentially stacked. This is irradiated with a laser beam to form a hole 7 having a diameter of 50 μm that penetrates the film and the resin sheet having a good light absorption rate. Next, the Au electrode 31 is plated inside the hole.
a is formed.

【0025】この後、上下のフィルムを剥した樹脂シー
ト31と、スルーホール25、内部導体パターン20
e、表面電極23,27、コンデンサ対向電極22等が
導電ペーストにより形成された絶縁セラミックグリーン
シート32、スルーホール25及びコイルパターン21
等が導電ペーストにより形成されたフェライトセラミッ
クグリーンシート33、スルーホール25及びコンデン
サ対向電極22等が導電ペーストにより形成された誘電
体セラミックグリーンシート34を積層した後、圧着し
て積層体を形成する。
After that, the resin sheet 31 from which the upper and lower films are peeled off, the through hole 25, and the internal conductor pattern 20.
e, the surface electrodes 23 and 27, the capacitor counter electrode 22, and the like, an insulating ceramic green sheet 32 in which a conductive paste is formed, a through hole 25, and a coil pattern 21.
A ferrite ceramic green sheet 33 having a conductive paste and the like, a through hole 25, a dielectric ceramic green sheet 34 having a capacitor counter electrode 22 and the like formed of a conductive paste are laminated and then pressure-bonded to form a laminated body.

【0026】次いで、この積層体を焼成することにより
各セラミックグリーンシート32,33,34のセラミ
ックス、及びスルーホール25、内部導体パターン20
e、コイルパターン21、コンデンサ対向電極22等の
電極のペーストが焼結すると共に、樹脂シート31が焼
失するため、表面にAu突起電極26a,26bが一体
形成されたセラミック多層基板20ができあがる。
Next, by firing this laminated body, the ceramics of the respective ceramic green sheets 32, 33 and 34, the through holes 25, and the internal conductor patterns 20.
The resin paste 31 is burned off as the electrode pastes such as e, the coil pattern 21 and the capacitor counter electrode 22 are sintered, so that the ceramic multilayer substrate 20 having the Au protruding electrodes 26a and 26b integrally formed on the surface is completed.

【0027】このセラミック多層基板20に、図8に示
すように半導体集積回路2を実装するときは、セラミッ
ク多層基板20のAu突起電極26a,26bと半導体
集積回路2の端子電極2aとを位置合わせした後、セラ
ミック多層基板20上に半導体集積回路2を搭載し、圧
力を加えながらAu突起電極26a,26bを加熱す
る。また、場合によっては超音波をあてる。これによ
り、半導体集積回路2の端子電極2aとAu突起電極2
6a,26bとが導電接続される。
When mounting the semiconductor integrated circuit 2 on the ceramic multilayer substrate 20 as shown in FIG. 8, the Au protruding electrodes 26a and 26b of the ceramic multilayer substrate 20 and the terminal electrodes 2a of the semiconductor integrated circuit 2 are aligned with each other. After that, the semiconductor integrated circuit 2 is mounted on the ceramic multilayer substrate 20, and the Au protruding electrodes 26a and 26b are heated while applying pressure. Also, in some cases, ultrasonic waves are applied. As a result, the terminal electrode 2a of the semiconductor integrated circuit 2 and the Au protruding electrode 2 are
6a and 26b are conductively connected.

【0028】尚、セラミック多層基板20を作成する際
の表面の樹脂シート31は、絶縁セラミックグリーンシ
ート32に密着し、焼成時に焼失するものであれば良
く、例えばPETフィルム、紙等であっても良い。ま
た、樹脂シート31へのAu電極31aの形成は、蒸着
等の方法を用いても良い。
The resin sheet 31 on the surface when the ceramic multi-layer substrate 20 is manufactured may be one that adheres to the insulating ceramic green sheet 32 and burns off during firing, and may be, for example, PET film or paper. good. The Au electrode 31a may be formed on the resin sheet 31 by using a method such as vapor deposition.

【0029】[0029]

【発明の効果】以上説明したように本発明の請求項1に
よれば、基板表面の電極に一体形成された凸部をバンプ
として用い、該電極と電子部品の接続用端子電極とが導
電接続されるので、基板への電子部品の実装工程が非常
に簡略化されると共に、電子部品の接続用端子電極のピ
ッチを狭く形成することが可能となる。
As described above, according to the first aspect of the present invention, the convex portion integrally formed with the electrode on the surface of the substrate is used as the bump, and the electrode and the connecting terminal electrode for the electronic component are conductively connected. Therefore, the step of mounting the electronic component on the substrate is greatly simplified, and the pitch of the connecting terminal electrodes of the electronic component can be formed narrow.

【0030】また、請求項2によれば、基板表面に一体
形成された突起電極をバンプとして用い、該突起電極と
電子部品の接続用端子電極とが導電接続されるので、基
板への電子部品の実装工程が非常に簡略化される。さら
に、前記突起電極はスルーホールによって内層部の導体
パターンに接続されているので、前記突起電極の間隔を
狭く形成することができ、これにより電子部品の接続用
端子電極のピッチを狭く形成することが可能となり、電
子部品の高密度化を図ることができる。
According to the second aspect of the present invention, the bump electrode integrally formed on the surface of the substrate is used as a bump, and the bump electrode and the connection terminal electrode of the electronic component are conductively connected. The mounting process of is greatly simplified. Further, since the projecting electrodes are connected to the conductor pattern of the inner layer portion by the through holes, the intervals between the projecting electrodes can be narrowed, and thus the pitch of the connection terminal electrodes of the electronic component can be narrowed. It is possible to increase the density of electronic parts.

【0031】また、請求項3によれば、焼成時に熱焼失
性シートが焼失されるため、表面に所定高さの凸部が一
体形成された電極を有するセラミック多層基板を容易に
形成することができるので、製造工程を簡略化すること
ができ製造費用を安価に抑えることができる。
According to the third aspect of the present invention, since the heat-burnable sheet is burnt out during firing, it is possible to easily form a ceramic multilayer substrate having an electrode on the surface of which convex portions having a predetermined height are integrally formed. Therefore, the manufacturing process can be simplified and the manufacturing cost can be kept low.

【0032】また、請求項4によれば、焼成時に熱焼失
性シートが焼失されるため、表面に所定高さの突起電極
を有するセラミック多層基板を容易に形成することがで
きるので、製造工程を簡略化することができ製造費用を
安価に抑えることができる。
Further, according to the present invention, since the heat-burnable sheet is burned off during firing, it is possible to easily form a ceramic multilayer substrate having protruding electrodes of a predetermined height on the surface. It can be simplified and the manufacturing cost can be kept low.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例のセラミック多層基板を
示す外観図
FIG. 1 is an external view showing a ceramic multilayer substrate according to a first embodiment of the present invention.

【図2】第1の実施例のセラミック多層基板を示す側面
断面図
FIG. 2 is a side sectional view showing the ceramic multilayer substrate of the first embodiment.

【図3】第1の実施例における樹脂シートの製造手順を
説明する図
FIG. 3 is a diagram illustrating a procedure for manufacturing a resin sheet according to the first embodiment.

【図4】第1の実施例のセラミック多層基板の製造手順
を説明する図
FIG. 4 is a view for explaining the manufacturing procedure of the ceramic multilayer substrate of the first embodiment.

【図5】本発明の第2の実施例のセラミック多層基板を
示す外観図
FIG. 5 is an external view showing a ceramic multilayer substrate according to a second embodiment of the present invention.

【図6】第2の実施例のセラミック多層基板を示す側面
断面図
FIG. 6 is a side sectional view showing a ceramic multilayer substrate according to a second embodiment.

【図7】第2の実施例のセラミック多層基板の製造手順
を説明する図
FIG. 7 is a diagram illustrating a manufacturing procedure of the ceramic multilayer substrate according to the second embodiment.

【図8】第2の実施例における部品実装状態を示す図FIG. 8 is a diagram showing a component mounting state in the second embodiment.

【符号の説明】[Explanation of symbols]

1…セラミック多層基板、1a…突起電極、1b…スル
ーホール、1c…導体パターン、2…半導体集積回路、
2a…端子電極、3…ベースフィルム、4…樹脂シー
ト、5…フィルム、6…レーザ光、7…穴、8…電極ペ
ースト、9…スキージ、10…電極、11…セラミック
グリーンシート、12…導電性接着剤、20…セラミッ
ク多層基板、20a,20b…絶縁体層、20c…磁性
体層、20d…誘電体層、20e…内部導体パターン、
21…コイルパターン、22…コンデンサ対向電極、2
3…表面電極、24…抵抗体、25…スルーホール、2
6a,26b…Au突起電極、27…表面電極、28…
外部電極。
DESCRIPTION OF SYMBOLS 1 ... Ceramic multilayer substrate, 1a ... Projection electrode, 1b ... Through hole, 1c ... Conductor pattern, 2 ... Semiconductor integrated circuit,
2a ... Terminal electrode, 3 ... Base film, 4 ... Resin sheet, 5 ... Film, 6 ... Laser light, 7 ... Hole, 8 ... Electrode paste, 9 ... Squeegee, 10 ... Electrode, 11 ... Ceramic green sheet, 12 ... Conductivity Adhesive, 20 ... Ceramic multilayer substrate, 20a, 20b ... Insulator layer, 20c ... Magnetic layer, 20d ... Dielectric layer, 20e ... Internal conductor pattern,
21 ... Coil pattern, 22 ... Capacitor counter electrode, 2
3 ... Surface electrode, 24 ... Resistor, 25 ... Through hole, 2
6a, 26b ... Au bump electrode, 27 ... Surface electrode, 28 ...
External electrode.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 23/13 23/12 H05K 1/18 J 8718−4E ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H01L 23/13 23/12 H05K 1/18 J 8718-4E

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 半導体集積回路等の電子部品を表面に実
装する電子部品実装用セラミック多層基板において、 前記電子部品の接続用端子電極に対応して表面に形成さ
れた電子部品接続用の電極を有すると共に、 前記電極には所定の高さを有する凸部が一体形成されて
いることを特徴とする電子部品実装用セラミック多層基
板。
1. A ceramic multi-layer substrate for mounting electronic components, such as a semiconductor integrated circuit, on a surface of which an electrode for connecting electronic components formed on the surface corresponding to a connecting terminal electrode of the electronic component is provided. A ceramic multilayer substrate for electronic component mounting, wherein the electrode is integrally formed with a protrusion having a predetermined height.
【請求項2】 半導体集積回路等の電子部品を表面に実
装する電子部品実装用セラミック多層基板において、 前記電子部品の接続用端子電極に対応して表面に一体形
成された所定高さを有する突起電極を有すると共に、 該突起電極は内層部に形成された導体パターンにスルー
ホールによって接続されていることを特徴とする電子部
品実装用セラミック多層基板。
2. A ceramic multilayer substrate for mounting an electronic component, such as a semiconductor integrated circuit, on a surface of which a protrusion having a predetermined height is integrally formed on the surface corresponding to a connecting terminal electrode of the electronic component. A ceramic multilayer substrate for mounting electronic parts, comprising an electrode, and the protruding electrode is connected to a conductor pattern formed in an inner layer portion by a through hole.
【請求項3】 半導体集積回路等の電子部品を表面に実
装する電子部品実装用セラミック多層基板の製造方法で
あって、 所定の導体パターン若しくは導体パターン及びスルーホ
ールが形成された複数のセラミックグリーンシートを積
層すると共に、 該セラミックグリーンシートの積層体の表面に、前記電
子部品の底面に形成された接続用端子電極に対応して貫
通孔が形成され、該貫通孔内に導電接続用材料が充填さ
れた熱焼失性のシートを積層し、 前記セラミックグリーンシート及び熱焼失性シートを圧
着した後、所定温度にて焼成し、 前記熱焼失性シートを焼失させることにより、表面に所
定高さの凸部が一体形成された電極を有するセラミック
多層基板を得ることを特徴とする電子部品実装用セラミ
ック多層基板の製造方法。
3. A method for manufacturing a ceramic multilayer substrate for mounting electronic components, which mounts electronic components such as semiconductor integrated circuits on a surface thereof, comprising a plurality of ceramic green sheets having predetermined conductor patterns or conductor patterns and through holes. And through-holes are formed on the surface of the laminated body of the ceramic green sheets corresponding to the connection terminal electrodes formed on the bottom surface of the electronic component, and the through-holes are filled with the conductive connection material. The heat-burnable sheet is laminated, the ceramic green sheet and the heat-burnable sheet are pressure-bonded, and then fired at a predetermined temperature, and the heat-burnable sheet is burned to form a convex surface having a predetermined height. A method of manufacturing a ceramic multilayer substrate for mounting electronic components, comprising: obtaining a ceramic multilayer substrate having electrodes integrally formed with a portion.
【請求項4】 半導体集積回路等の電子部品を表面に実
装する電子部品実装用セラミック多層基板の製造方法で
あって、 所定の導体パターン及びスルーホールが形成された複数
のセラミックグリーンシートを積層すると共に、 該セラミックグリーンシートの積層体の表面に、前記電
子部品の底面に形成された接続用端子電極に対応して貫
通孔が形成され、該貫通孔内に導電接続用材料が充填さ
れた熱焼失性のシートを積層し、 前記セラミックグリーンシート及び熱焼失性シートを圧
着した後、所定温度にて焼成し、 前記熱焼失性シートを焼失させることにより、表面に所
定高さの突起電極を有するセラミック多層基板を得るこ
とを特徴とする電子部品実装用セラミック多層基板の製
造方法。
4. A method of manufacturing a ceramic multilayer substrate for mounting electronic parts, such as mounting an electronic part such as a semiconductor integrated circuit on a surface, comprising laminating a plurality of ceramic green sheets having predetermined conductor patterns and through holes. At the same time, a through hole is formed on the surface of the laminated body of the ceramic green sheets corresponding to the connecting terminal electrode formed on the bottom surface of the electronic component, and the through hole is filled with a conductive connecting material. By stacking burn-off sheets, press-bonding the ceramic green sheet and the heat-burn out sheet, and then firing at a predetermined temperature to burn out the heat-burnable sheet, thereby providing a protruding electrode with a predetermined height on the surface. A method for manufacturing a ceramic multilayer substrate for mounting electronic components, which comprises obtaining a ceramic multilayer substrate.
JP6222188A 1994-09-16 1994-09-16 Ceramic multilayer substrate for mounting electronic parts and its manufacturing method Withdrawn JPH0888470A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6222188A JPH0888470A (en) 1994-09-16 1994-09-16 Ceramic multilayer substrate for mounting electronic parts and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6222188A JPH0888470A (en) 1994-09-16 1994-09-16 Ceramic multilayer substrate for mounting electronic parts and its manufacturing method

Publications (1)

Publication Number Publication Date
JPH0888470A true JPH0888470A (en) 1996-04-02

Family

ID=16778539

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH0888470A (en)

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