JPH08313869A - Active matrix display device and driving method therefor - Google Patents

Abstract

PURPOSE: To suppress the contrast of an active matrix liquid crystal panel from being lowered without generating a flicker. CONSTITUTION: A panel 2 is provided with pixels 1 arranged in a matrix shape and discharge channels (K, A) as switching means selecting the pixels. A row driving circuit 3 performs scannings of pixel rows by sequentially driving discharge channels over one field period and by selecting pixels every row. A column driving circuit 4 writes a picture signal in selected pixel rows in synchrinization with line scannings. At this time, one field period is time-divided into plural subfield periods, an interlaced scanning in which pixels arc selected every plural lines is performed in one subfield period, the interlaced scanning is performed by shifting one line in the next subfield period and the selections of all subficlds are completed in plural subfield periods. In respective subfield periods, the picture signal having the same polarity is written in selected lines in accordance with interlaced scannings, the picture signal having opposite polarities each other is written in two successive subfield periods and the picutre signal having opposite phases each other is written in two successive field periods.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix display device using liquid crystal or the like as an electro-optical material and a driving method thereof. More specifically, it relates to an AC drive technology for liquid crystals.

[0002]

2. Description of the Related Art A conventional active matrix display device uses a panel having pixels arranged in rows and columns and switching means for selecting the pixels. Each pixel uses, for example, liquid crystal as an electro-optical material. Further, as a switch means, one using a thin film transistor element or a discharge channel has been developed. A panel having such a configuration is driven in an active matrix by a row driving circuit and a column driving circuit. The row driving circuit sequentially drives the switch means over one field period to select pixels for each row to select pixel rows (lines).
Scan. The column driving circuit writes the image signal in the selected line in synchronization with this scanning.

[0003]

When a liquid crystal is used as the electro-optical material, AC drive is generally used to prevent deterioration of the liquid crystal. Field inversion drive is known as an AC drive system and is shown in FIG. For example, when displaying an image of NTSC standard, the polarity of the image signal is inverted for each field and written in each line. As shown in (A),
In the first field, a positive image signal is written in all lines. As shown in (B), in the second field, negative-polarity image signals are written in all lines. In the NTSC standard, the field period is 1/60 sec. However, in the case of field inversion drive, when the symmetry of the polarity of the AC image signal is disturbed, a difference in luminance occurs between the odd field and the even field, and a flicker (flicker) of 1/30 sec cycle appears on the screen.

Therefore, line inversion drive is widely adopted instead of field inversion drive, and this is shown in FIG.
As shown in (A), each line is line-sequentially scanned and
In synchronization with this, an image signal whose polarity is alternately inverted is written in each line. For example, a positive polarity image signal is written in the odd line and a negative polarity image signal is written in the even line. As shown in (B), when moving to the second field, the negative image signal is written in the odd line and the positive image signal is written in the even line. In this case, if the polar symmetry of the alternating-current image signal is disturbed, a difference in luminance occurs between the lines adjacent to each other. However,
Since each line has a fine line width, the above-mentioned difference in luminance is not substantially visually recognized due to the visual integration effect. As described above, in the line inversion drive, subtle variations in brightness due to the asymmetry of the AC signal are spatially dispersed so as to be substantially inconspicuous.

By the way, in the case of line inversion drive, if there is a time delay in the switch means due to operational characteristics, image signals are mixed between adjacent lines, which causes major problems such as deterioration of contrast and unevenness. Become. That is, HDTV
When displaying a standard image, the line scanning speed is increased.
On the other hand, if the response speed of the switch means is delayed, it becomes difficult to separate the image signals between the lines. For example,
When a thin film transistor provided for each pixel is used as the switch means, if the operating speed is slow, it may not be completely turned off during the selection period (for example, 30 μs) assigned to one line. If the line inversion drive is performed in this state, the image signal of the opposite polarity assigned to the next line is partially overwritten on the previous line, which causes deterioration of contrast and unevenness. Similarly, when a plasma discharge channel provided corresponding to each line is used as the switch means, if the response speed is slow, it is possible to partially overwrite the image signal of the opposite polarity of the next line with respect to the previous line. Become.

[0006]

Means for Solving the Problems In order to solve the above-mentioned problems of the conventional technique, the following means were taken. That is, the active matrix display device according to the present invention has a panel, a row drive circuit, and a column drive circuit as a basic configuration.
The panel includes pixels arranged in rows and columns and a switch means for selecting the pixels. The pixel uses liquid crystal as an electro-optical material, for example. The row driving circuit sequentially drives the switch means over one field period to select the pixels row by row to scan a pixel row (line). The column driving circuit writes the image signal to the selected pixel row in synchronization with the scanning.
As a characteristic feature, the row driving circuit time-divisions one field period into a plurality of subfield periods, and performs interlaced scanning for selecting pixels every other row in one subfield period. Interlaced scanning is performed by shifting by one line in the next subfield period, and selection of all pixel rows is completed in a plurality of subfield periods included in one field period. On the other hand, the column driving circuit writes the image signal of the same polarity in the pixel row selected according to the interlaced scanning within each subfield period. Image signals of opposite polarities are written in two consecutive subfield periods. Image signals having opposite phases are written in two consecutive field periods.

Specifically, the panel may be a plasma addressed liquid crystal panel. This panel has a laminated structure in which plasma cells having switch means composed of discharge channels arranged in rows and liquid crystal cells having signal electrodes arranged in columns are stacked on each other. A matrix of pixels is defined at the intersection of the discharge channel and the signal electrode. In this case, the row driving circuit scans the discharge channel, and the column driving circuit applies an image signal to the signal electrode in response to the scanning. The active matrix display device includes a frame memory for rearranging the arrangement of the display data included in the original image signal and generating an image signal having the arrangement of the display data according to the interlaced scanning. The present invention includes not only the above active matrix display device but also a driving method thereof.

[0008]

When the active matrix type panel is driven as described above, the polarity of the image signal is not inverted in each subfield on the time axis. Therefore, even if there is some delay in the switch means, the deterioration of the contrast is not caused. Strictly speaking, in this case, image signals of the same polarity are mixed to some extent between lines that are temporally adjacent to each other, so that the resolution in the vertical direction is lowered, but this is a level that does not pose a problem. For flicker,
Even if the symmetry of the AC image signal is disturbed and an offset occurs, the flicker frequency is increased because the inversion cycle is not in field units but in subfield units. Therefore, the visual characteristics of human beings do not follow each other, so that the flicker is not actually visible.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1A is a schematic block diagram showing the basic configuration of an active matrix display device according to the present invention. As shown in the figure, this device uses pixels 1 arranged in rows and columns and a panel 2 provided with switch means for selecting the pixels. It also has a row drive circuit 3,
Sequentially driving the switch means over one field period,
Pixel 1 is selected for each row to scan a pixel row (line). Further, the column driving circuit 4 is provided, and the image signal is written in the selected pixel row in synchronization with the line scanning. In this example, the panel 2 uses a plasma addressed liquid crystal panel, and a plasma cell provided with a switch means composed of discharge channels arranged in rows and signal electrodes D arranged in columns.
It has a laminated structure in which liquid crystal cells having Each discharge channel has a pair of cathode electrode K and anode electrode A.
Consists of a pair of. The cathode electrode K is connected to the row drive circuit 3, while the anode electrode A is commonly grounded. The matrix-shaped pixels 1 described above are defined at the intersections of the discharge channels (K, A) and the signal electrodes D. In such a configuration,
The row drive circuit 3 sequentially passes through the buffer to the cathode electrode K.
Line scanning is performed by applying a selection pulse to 1, K2, K3, ..., Kn to generate plasma discharge in the discharge channel. On the other hand, the column drive circuit 4 is also connected to the respective signal electrodes D1, D2, ..., Dm via the buffer, and is synchronized with the line scanning of the discharge channel.
The image signal is applied to. This causes the selected pixel 1
The image signal is written in the row. The row drive circuit 3 and the column drive circuit 4 are controlled in synchronization with each other via a control circuit 5.

Next, the driving method of the active matrix display device according to the present invention will be described in detail with reference to FIG. The row drive circuit 3 time-divides one field period into a plurality of subfield periods, and performs interlaced scanning for selecting pixels every other line in one subfield period.
In this example, one field is time-divided into three subfields. For example, in the first subfield 0 of field 1, interlaced scanning is performed in which pixels are selected every three lines in the order of line 1, line 4, line 7, .... Interlaced scanning is performed by shifting one line in the next subfield period. For example, in the second subfield 1 of the field 1, interlaced scanning is performed by shifting by one line such as line 2, line 5, line 8, .... Similarly, the last subfield 2 is also shifted by one line and interlaced scanning is performed as in line 3, line 6, line 9, .... As a result, selection of all lines is completed in the three subfield periods included in one field period. On the other hand, the column drive circuit 4
Writes an image signal of the same polarity in the line selected in accordance with the interlaced scanning within each subfield period. For example, in subfield 0, the positive image signal is written in all the lines selected by the interlaced scanning. or,
Image signals of opposite polarities are written in two consecutive subfield periods. For example, in subfield 0, a positive polarity image signal is written in the selected line, while in the next subfield 1, a negative polarity image signal is written in the selected line. Further, in two consecutive field periods, image signals having opposite phases are written in each line. For example, as is clear from a comparison between the field 1 and the field 2, the image signals are in a phase opposite to each other. That is, while the positive polarity image signal is written in the subfield 0 of the field 1, the negative polarity image signal is written in the subfield 0 of the field 2. Similarly, a negative image signal is written in subfield 1 of field 1, whereas a positive image signal is written in subfield 1 of field 2. As described above, if one field period is time-divided into a plurality of sub-field periods and inversion driving is performed, image signals having mutually opposite polarities are held in a time-divisional manner when one line is focused. . For example, focusing on field 1, line 1 holds all positive image signals through the three subfields, while line 2 holds positive image signals previously written in subfield 0. The subfields 1 and 2 hold the rewritten negative image signal. In addition, line 3
In the subfields 0 and 1, the negative image signal previously written is held, and in the subfield 2, the positive image signal is written. The control circuit 5 shown in FIG. 1A includes, for example, a frame memory, and rearranges the array of the display data included in the original image signal input from the outside to display in accordance with the interlaced scanning. An image signal having a data array is generated and supplied to the column drive circuit 4. Further, although the plasma addressed liquid crystal panel is used as the panel in this embodiment, the present invention is not limited to this. For example, an active matrix liquid crystal panel in which a thin film transistor is provided for each pixel as the switch means may be used. In addition, in the present embodiment, one field period is divided into three subfield periods, but the present invention is not limited to this, and the number of subfield divisions can be appropriately selected.

FIG. 2 schematically shows the polarity reversal of the image signal on the time axis. Both the first field and the second field are divided into three subfields. A positive image signal is written in the first subfield of the first field, a negative image signal is written in the second subfield, and a positive image signal is written in the third subfield. The second field has the opposite polarity, the negative image signal is written in the first subfield, the positive image signal is written in the second subfield, and the negative image signal is written in the third subfield. Written. When the number of subfield divisions is set to an odd number, the polarity inversion of the image signal becomes regular in each field when viewed on the time axis. Further, as described above, interlaced scanning is performed in each subfield, and image signals of the same polarity are written in all selected lines. By performing the interlace scanning with the same polarity in this way, the polarity in each subfield is not reversed on the time axis, so that the contrast is reduced even if there is a response delay in the discharge channel that serves as the switch means. There is nothing to invite. Strictly speaking, in this case, the resolution is lowered in the vertical direction, but this is a level at which there is practically no problem. Regarding the flicker, even if an offset occurs in the AC image signal, the frequency of polarity reversal becomes three times. For example, if one field is 60Hz,
Since the subfield is 180Hz, even if there is an offset, it will be a flicker of 90Hz and will not be visible.
Also, the amount is 2 / time as shown in FIG. 1 (B).
Since the image signal whose polarity is inverted with respect to the adjacent line with the probability of 3 is applied, it is difficult to be visually recognized like a normal line inversion drive due to a visual integration effect. Therefore, flicker is sufficiently suppressed for these two reasons. For example, FIG.
Focusing on the lines 1, 2, and 3 in the field 1 of (B), a signal voltage whose polarity is inverted with respect to an adjacent line with a probability of 2/3 in time is applied. Therefore, in terms of time, it is equivalent to performing the line inversion drive for at least 2/3 of the field period.

FIG. 3 schematically shows the polarities of the image signals written in each line. (A) shows the state at the time when the last third subfield in the first field is completed. In the first subfield, a positive image signal is written in line 1, line 4, line 7, line 10, .... In the second subfield, the negative image signal is written in the line 2, line 5, line 8, line 11, .... In the third subfield, a positive image signal is written in line 3, line 6, line 9, line 12, .... (B) shows the state at the time when the third subfield of the second field is completed. In the first subfield, the negative image signal is written in the line 1, the line 4, the line 7, the line 10, .... In the second subfield, a positive image signal is written in line 2, line 5, line 8, line 11, .... In the third subfield, the negative image signal is written in line 3, line 6, line 9, line 12, .... Thus, in the present invention, interlaced scanning of lines is performed in each subfield. In this case, it is necessary to output the image signal in synchronization with the interlaced scanning. Actually, the order of the display data may be switched line by line by a frame memory or other means, and the display data of the position of the line selected by the interlaced scanning may be output.

FIG. 4 shows an image signal writing state when one field is divided into four. It shows the polarity distribution of the image signal at the time when the final subfield is completed. In the first subfield, lines 1, 5, 9,
The image signal of positive polarity is written in ..., The image signal of negative polarity is written in lines 2, 6, 10, ... In the next subfield, and the lines 3, 7, 1 in the third subfield.
A positive image signal is written in 1, ..., And a negative image signal is written in the lines 4, 8, 12, ... In the last subfield.

FIG. 5 shows a specific configuration example of the plasma addressed liquid crystal panel 2 shown in FIG. In this panel, a liquid crystal layer 101 and a discharge channel 102 are arranged adjacent to each other with a thin dielectric sheet 103 made of glass or the like interposed therebetween. The discharge channel 102 is formed by forming a plurality of grooves 105 parallel to each other on the glass substrate 104. The glass substrate 104 and the dielectric sheet 10 are formed.
3 is hermetically sealed, and an ionizable gas is enclosed therein. Each groove 105 is provided with a pair of electrodes 106 and 107 which are parallel to each other.
06 and 107 function as an anode A and a cathode K for ionizing the gas in the discharge channel 102 to generate discharge plasma. For example, the electrode 106 functions as a cathode and is connected to the row driving circuit via a buffer. The electrode 107 also functions as an anode and is commonly grounded. On the other hand, the liquid crystal layer 101 is the dielectric sheet 10
3 and the transparent substrate 108, the signal electrode D is formed on the surface of the transparent substrate 108 on the liquid crystal layer 101 side. The transparent signal electrode D is orthogonal to the discharge channel 102 formed by the groove 105, and the intersection of the signal electrode and the discharge channel corresponds to each pixel. As described above, the plasma addressed liquid crystal panel has a laminated structure in which plasma cells having the discharge channels 102 arranged in rows and liquid crystal cells having the signal electrodes D arranged in columns are overlapped with each other through the dielectric sheet 103. .

FIG. 6 is a schematic view showing only two pixels cut out. In this figure, for ease of understanding, only two signal electrodes D1 and D2, one cathode electrode K1 and one anode electrode A1 are shown. Each pixel 204 includes a signal electrode (D1, D2) and a liquid crystal layer 301.
And a dielectric layer 303 and a discharge channel. The liquid crystal layer 301 and the dielectric layer 303 correspond to the liquid crystal layer 101 and the dielectric sheet 103 of FIG. 5, respectively. The discharge channel is substantially connected to the anode potential during plasma discharge. When an image signal is applied to the signal electrode D in this state, charges are injected into the liquid crystal layer 301 and the dielectric layer 303. On the other hand, when the plasma discharge ends, the discharge channel returns to the insulating state, so that a floating potential is obtained and the injected charges are held in each pixel 204. A so-called sampling hold operation is performed. Where each pixel 2
Since the signal electrodes (D1, D2) are not provided between 04, the pixels 204 are in a substantially insulating state even during plasma discharge, so that the independence of the pixels 204 is maintained. Therefore,
The discharge channel functions as an individual switch means provided in each pixel 204, and is therefore schematically represented as a plasma switch S1. On the other hand, the signal electrode (D1,
Liquid crystal layer 301 sandwiched between D2) and the discharge channel
The dielectric layer 303 functions as a sampling pasta. According to the present invention, when the plasma switch S1 is turned on by the interlaced scanning, the image signal is held in the sampling capacitor, and the brightness of each pixel can be controlled according to the signal voltage level. The signal voltage is held in the sampling capacitor even after the plasma switch S1 is turned off, and the active matrix operation of the display device is performed.

Finally, FIG. 7 shows another example of the active matrix liquid crystal panel, which uses thin film transistors as switch means. As shown, this panel has a flat structure including a transparent substrate 501, a counter substrate 502, and a liquid crystal layer 503 held between them. A pixel portion 504 and a driving circuit portion are integrally formed on the transparent substrate 501. The drive circuit portion is divided into a row drive circuit 505 and a column drive circuit 506. Further, a terminal portion 507 for external connection is formed on the upper end of the peripheral portion of the transparent substrate 501.
The terminal portion 507 is connected to the row driving circuit 505 and the column driving circuit 506 via a wiring 508. A gate wiring 509 and a signal wiring 510 which intersect with each other are formed in the pixel portion 504. The gate wiring 509 is a row driver circuit 505.
, And the signal wiring 510 is connected to the column driving circuit 506. A pixel electrode 511 and a thin film transistor 512 for switching and driving the pixel electrode 511 are formed at the intersection of the gate line 509 and the signal line 510. The drain of the thin film transistor 512 is connected to the corresponding pixel electrode 511, the source is connected to the corresponding signal wiring 510, and the gate is connected to the corresponding gate wiring 509. The row driving circuit 505 makes each thin film transistor 512 conductive by line by interlaced scanning via the gate wiring 509. The column driving circuit 508 is synchronized with this interlaced scanning.
Applies an image signal to each signal line 510 and writes a signal charge to the pixel electrode 511 through the thin film transistor 512 which is in a conductive state. A counter electrode is entirely formed on the counter substrate 502 side.

[0017]

As described above, according to the present invention, one field period is divided into a plurality of subfield periods,
Within each sub-feed period, interlaced scanning of lines is performed according to the number of divisions. Image signals of the same polarity are written in each subfield period, and image signals of opposite polarities are written in two consecutive subfield periods. With such a configuration, even when there is a response delay in the discharge channel that performs line scanning or the switch means such as a thin film transistor, it is possible to remove contrast and unevenness without causing flicker. On the contrary, when the response delay of the switch means is given, the line scanning can be speeded up, and the high resolution of the display device such as high-definition television can be achieved.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a configuration and a driving method of an active matrix display device according to the present invention.

FIG. 2 is a waveform diagram showing a change in polarity of an image signal on a time axis.

FIG. 3 is a schematic plan view showing a spatial distribution of polarities of image signals written in an active matrix liquid crystal panel.

FIG. 4 is a schematic plan view showing another example of interlaced scanning.

5 is a schematic perspective view showing an example of a plasma addressed liquid crystal panel incorporated in the active matrix display device shown in FIG.

FIG. 6 is a schematic diagram for explaining the operation of the plasma addressed liquid crystal panel shown in FIG.

FIG. 7 is a schematic perspective view showing an example of an active matrix liquid crystal panel using thin film transistors as switch means.

[Explanation of symbols]

 1 pixel 2 panel 3 row drive circuit 4 column drive circuit 5 control circuit

[Procedure amendment]

[Submission date] September 22, 1995

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a configuration and a driving method of an active matrix display device according to the present invention.

FIG. 2 is a waveform diagram showing a change in polarity of an image signal on a time axis.

FIG. 3 is a schematic plan view showing a spatial distribution of polarities of image signals written in an active matrix liquid crystal panel.

FIG. 4 is a schematic plan view showing another example of interlaced scanning.

5 is a schematic perspective view showing an example of a plasma addressed liquid crystal panel incorporated in the active matrix display device shown in FIG.

FIG. 6 is a schematic diagram for explaining the operation of the plasma addressed liquid crystal panel shown in FIG.

FIG. 7 is a schematic perspective view showing an example of an active matrix liquid crystal panel using thin film transistors as switch means.

FIG. 8 is a schematic diagram showing a conventional field inversion driving method.

FIG. 9 is a schematic diagram showing a conventional line inversion driving method.

[Explanation of symbols] 1 pixel 2 panel 3 row drive circuit 4 column drive circuit 5 control circuit

Claims (4)

[Claims] 1. A panel provided with pixels arranged in rows and columns and a switch means for selecting the pixels, and the switch means are sequentially driven over one field period to select the pixels row by row to scan a pixel row. In an active matrix display device comprising a row driving circuit for performing a scanning operation and a column driving circuit for writing an image signal to a selected pixel row in synchronization with the scanning, the row driving circuit has one field period for a plurality of subfield periods. Time-division, interlace scanning is performed by selecting pixels every other row in one subfield period, interlace scanning is performed by shifting one line in the next subfield period, and multiple subfield periods included in one field period Then, the selection of all pixel rows is completed, and the column driving circuit causes the pixel rows selected in accordance with the interlaced scanning in each subfield period to have an image of the same polarity. No. writing, writing opposite polarity video signals each other in two subfields consecutive periods, an active matrix display device, characterized in that writing the reversed-phase image signals to each other in two fields successive periods. 2. The panel has a laminated structure in which plasma cells having switch means composed of discharge channels arranged in rows and liquid crystal cells having signal electrodes arranged in columns are stacked on each other. 2. The active matrix display device according to claim 1, which is a plasma addressed liquid crystal panel having pixels arranged in a matrix at intersections of the signal electrodes with the signal electrodes. 3. A frame memory for rearranging an array of display data included in an original image signal to generate an image signal having an array of display data according to the interlaced scanning. The active matrix display device according to claim 1. 4. A panel provided with pixels arranged in rows and columns and a switch means for selecting the pixels, and the switch means are sequentially driven over one field period to select the pixels row by row to scan a pixel row. In the driving method of the active matrix display device, the row driving circuit includes a row driving circuit for performing the above-mentioned operation and a column driving circuit for writing an image signal to a selected pixel row in synchronization with the scanning. Time-division into sub-field periods, interlace scanning is performed to select pixels every other row in one sub-field period, interlace scanning is performed by shifting one line in the next sub-field period, and The selection of all pixel rows is completed in the sub-field period, and the column driving circuit has the same polarities in the pixel rows selected according to the interlaced scanning in each sub-field period. Driving method for an active matrix display device, characterized in that image signals of opposite polarities are written in two consecutive subfield periods, and image signals of opposite phases are written in two consecutive field periods. .