JPH0830402A - Parity storing method - Google Patents

Abstract

PURPOSE:To provide a device which maintain reliability to a user by providing a mechanism which exclusively ORs old data and new data at a request to write the data and outputs the result to the outside. CONSTITUTION:Data 201 transferred from a host processor 101 are temporarily stored in a disk array device 102, and data 202 before update are read in the device 102 and exclusively ORed 203 with the data 201. The resulting data are transferred to a different disk array device 102 through a bus 104. In this device 102, the data obtained by the exclusive OR operation and last parity 207 are exclusively ORed 205. Through this operation, parity data can be stored fast in the disk array device of the different systems. Namely, only the parity data are stored in the disk array device of the different system to eliminate the need to hold the parity in all the devices 102, and consequently the disk device which is good in data storing efficiency can be constituted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system, and more particularly to a high speed and highly reliable disk file system.

[0002]

2. Description of the Related Art A general computer system comprises a processor and a secondary storage device. Although the secondary storage device mainly used is a magnetic disk device, the capacity growth rate thereof is extremely high at present, but the performance of the magnetic disk device accompanied by mechanical operation is not so high as that of the processor performance. A disk array has been proposed as a method for solving the problem. Representative papers include "A Case for Redundant Arrays of Ine Discs, AMC M Sigmod Conference, Chicago Eye (A Case for Redundant Arrays of Ine
xpensive Disks (RAID), in ACM SIGMOD Conference, Chic
ago, IL), June 1988 ”).

RAID is a technique that shortens access time by arranging data in a plurality of disk drives in a distributed manner, and also improves reliability by storing redundant data called parity or ECC. . In other words, I / O can be performed in parallel to multiple disk drives in parallel, and even if a disk drive fails, data on the failed disk drive can be recovered from parity and data other than the failed disk drive. It is a technology that can.

As one of the conventional techniques for realizing this technique, there is JP-A-4-230512. This conventional example speeds up the update of parity, which is one of the problems in the disk array. The disk array must update data and parity when outputting data.
In order to update the parity, there are cases where the pre-update data and parity are necessary. Therefore, the overhead of pre-reading the data and parity and the new data and parity are written at the original data and parity positions. It takes overhead. This is called a write penalty, but new data or parity is not recorded at the original position,
Write by storing in the free space of the disk drive.
It is an invention that reduces the overhead due to a penalty.

[0005]

In the conventional disk array device, a plurality of disk drives are connected to a single control device, and parity generation is performed in the range of data stored in the disk drive connected to the control device. Is limited to. Therefore, when a plurality of disk arrays are connected to the host processor, the parity is independently generated in each disk array, so that the data storage efficiency of the entire system decreases.

For example, 5 per disk array controller
In a computer system in which two disk drives are connected and eight disk arrays are connected, eight drives are used for storing parity.

As one method for solving this,
It is possible to simulate the disk array with software running on the host processor. However, updating the parity requires the old data, the new data, and the old parity. Normally, the old data and the old parity are stored in the disk drive. It is necessary to write the updated data to the disk drive. When a plurality of disk arrays are connected to a single bus, data will flow through the bus four times for updating the parity, which causes a bus neck.

[0008]

In order to solve the above problems, according to the present invention, at least one disk array device among a plurality of disk arrays is provided with a function of storing only parity, and the other disk array devices are written. A mechanism is provided for generating an exclusive OR of old data and new data for a request and outputting it to the outside.

[0009]

According to the present invention, in response to a data write request, a mechanism for generating an exclusive OR of old data and new data and outputting the same to the outside is required to generate new parity.
The data of one kind can be made into one kind, and the result of the exclusive OR is issued to the disk array which has the function of storing only the parity, so that only the parity is stored. Disk arrays other than disk arrays do not need to store parity.

[0010]

【Example】

(Embodiment 1) FIG. 1 shows an overall view of an embodiment of the present invention. The host processor 101 is connected to a plurality of disk array devices 102 via a bus 104. The disk array device 102 includes an I / F control 105, a cache control 106, a parity control 107, a disk path control 108, a CPU 109, and a memory 110.

The I / F control 105 comprises a communication control 111 and an interface control 112, and controls communication with the host processor 101 and other disk array devices 102. The cache control 106 is the host processor 10
It is a memory that temporarily stores data read and written from 1, and realizes high speed by reducing disk access. The parity control 107 calculates the exclusive OR of a plurality of data. The disk path control 108 includes a disk input / output control 113 and a disk interface control 1
14 is selected, and one of the plurality of disk devices 117 is selected and a command for the disk is executed. CP
The U 109 controls a plurality of constituent elements, and a microprogram for that purpose is stored in the memory 110.

The detailed operation of this embodiment will be described below.

FIG. 2 briefly illustrates one operation of the present invention. The operation of replacing the data 202 with the data 201 from the host processor 101 is illustrated. The data 201 transferred from the host processor 101 is temporarily stored in the disk array device 102. The data 202 before update is read into the disk array device 102,
The exclusive OR 203 with the data 201 is calculated. The data obtained by this exclusive OR is the bus 104
Are transferred to different disk array devices 102 via. In the disk array device 102, the data obtained by the exclusive OR and the exclusive logical sum 205 of the previous parity 207 are calculated. By the above operation, the parity data can be stored at high speed in the disk array devices of different systems. That is, the number of times of passing through the bus 104 is as small as two. This is the disk array device 102.
By performing exclusive OR in advance, the old data 2
This is because it is not necessary to transfer two types of data, 02 and new data 201, to the disk array device 102 that is the storage destination of the parity.

FIG. 3 shows a storage format of data in the logical drive 301 and the disk devices 302 to 316 recognized by the host processor 101. As shown in this figure, according to the present invention, when data is stored over a plurality of disk arrays, the disk array device in which the parity is stored can be freely set. That is, as shown in FIG. 2, storing only parity data in disk array devices of different systems eliminates the need for all disk array devices to hold parity. Therefore, it becomes possible to construct a disk device with good data storage efficiency.

FIG. 4 shows the host processor 1 similar to FIG.
The storage format of data in the logical drive 301 and each disk device 302 to 316 recognized from 01 is shown. Although FIG. 3 shows an example in which the logical drives are configured across a plurality of disk arrays, one logical drive 401, 402, 40 is provided in each disk array device in FIG.
3 shows the case where 3 is set.

In the present invention, two logical drives 401,
As indicated by 402, the host processor 101 does not see that parity, which is redundant data, is stored. Even in such a case, since parity data is stored in the logical drive 403 in the present invention, even if any of the drives 404 to 418 fails, the data in the logical drives 401, 402, 403 and You will be able to recover from parity.

FIG. 5 shows the microprograms 501 to 505 stored in the memory 110. The microprogram is a data READ processing 501 that controls reading of data from the disk drive, and a data WRIT that controls writing of data to the disk drive.
E processing 502, parity generation processing 503 for generating parity, inter-device communication processing 504 for performing parity transfer between each disk array, and RAID configuration table 50.
5, the microprograms 501 to 504 refer to the RAID configuration table 505 in which the configuration of each disk array device is stored as needed. These micro programs 501 to 505 are executed / controlled by the CPU.

Next, the microprograms 501 to 50
5 will be described. FIG. 6 shows the data READ processing 501.
The flowchart of FIG. In step 601, command analysis is performed, and the data length and read position of the READ command transferred from the host processor 101 are analyzed. In step 602, which disk drive the READ request is for is calculated based on the analysis result of step 601. In step 603,
Which data of the drive calculated in step 602 is requested is calculated. In step 604,
Reserve an area for storing read data in the cache. In step 605, the input request for the drive selected in step 602 is converted into a command format. In step 606, the command generated in step 605 is transferred to the disk path control 606.

When the command is transferred, the disk path control 606 temporarily holds the data in the disk input / output control 113, the path between the disk device and the cache control 106 is established by the instruction from the CPU 109, and the disk interface control 114. Command is sent to. The disk interface control 114 performs basic input / output operations for the disk device 115. As a result, the target data is read into the cache. In step 607, the process waits until the input processing of the disk device 115 is completed, and the completion of the input is known from the completion notification from the disk device 115. In step 608, the data stored in the cache is transferred to the host processor 101, and the process ends.

FIG. 7 shows a flowchart of the data WRITE process. In step 701, the command analysis is performed and the WRI transferred from the host processor 101.
The data length and writing position of the TE command are analyzed. In step 702, a cache area having a required capacity is secured based on the analysis result of step 701. W
It is calculated which disk drive the RITE request is for. In step 705, it is checked whether the old data at the write position exists in the cache. As a result, if it does not exist in the cache, the process proceeds to step 706, and if it exists, the process proceeds to step 709.

In step 706, a read command for the old data is generated in order to read the old data. In step 707, the disk path control 108
In response, the command generated in step 706 is transferred. Disk path control 606 when command is transferred
Then, the command is temporarily held in the disk input / output control 113, a path between the disk device 115 and the cache control 106 is established by an instruction from the CPU 109, and the command is sent to the disk interface control 114. The disk interface control 114 performs basic input / output operations for the disk device 115. As a result, the reading of the old data is executed. Step 708
Then, it will wait until the reading of the old data is completed.

In step 709, parity generation processing is performed. This process will be described in detail later. In step 710, a command for writing new data is generated. In step 711, the command generated in step 710 is transferred to the disk path control 108, and writing is executed. In step 712, the process waits until the writing is completed. In step 713, inter-device communication processing is executed. This process will be described in detail later.

FIG. 8 shows a flow of parity generation processing. In step 801, old data is fetched from the cache. In step 802, similarly, new data is read from the cache. Step 80
In 3, the exclusive OR of the two data fetched in steps 801 and 802 is calculated. In step 804, the result of step 803 is stored in the cache. Then, in step 805, an interrupt indicating the end of parity generation is generated.

FIG. 9 shows a flowchart of inter-device communication processing. In this processing, parity generation processing 5
The data generated by 03 is transferred to another disk array device together with a parity write request. In step 901, the communication destination device is calculated from the write block number and the RAID configuration table 505. The RAID configuration table 505 will be described in detail later. In step 902, a parity storage request command is generated. In step 903, the command generated in step 902 is transferred to the communication control 111. The communication control 111
According to the transferred command, the command and data are transferred to the communication destination via the bus 104. In step 904, the communication destination waits until the storage of the parity is completed. After that, in step 905, an interrupt is generated to the CPU 109 to indicate that the storage of the parity is completed.

FIG. 10 shows an example of the RAID configuration table 505. 1001 to 1005 are buses 104
The information about each device is stored in 1006 to 1008. 10
The RAID level of the disk array of each device is stored in 06, the device capacity is stored in 1007, and the number of drives in the disk array is stored in 1008. In this example,
Five disk arrays are connected to the bus 104, and RAID 0 having no parity is set from the device 1 (1001) to the device 4 (1004).
Only (1005) has a parity. The parity of the device 5 (1005) is the device 1 (10
01) to all data of the device 5 (1005). Reference numeral 1009 is an identifier of the own device, and in this example, it is shown that it is the RAID configuration table 505 held by the device 2 (1002). The RAID configuration table 505 is held in all devices, and the own device identifier 1009 is set so as not to overlap.

FIG. 11 shows what kind of command interface controls the above operation.
The write request from the host processor 101 is 110
1 to 1104. Reference numeral 1101 is update data, 1102 is a data length, 1103 is a block number indicating a writing position, 1104 is a command, and in this example, a WRITE command. This command is transferred to the disk array device 102 which is the storage destination of the update data 201. By executing the command, the data 201 transferred from the host processor 101 is temporarily stored in the disk array device 102. The data 202 before update is read into the disk array device 102, and the exclusive OR 203 with the data 201 is calculated.

This calculation result is used as another disk array device 1
Command 1105 to 1 to transfer to
108 is generated. Reference numeral 1105 denotes the data of the calculation result, 1106 denotes the data length, and 1107.
Is the block number in which the update data is stored, and 110
8 means that it is a parity storage request. Since it is a storage request for only parity, no data is written to the data area in the transfer destination disk array device. In the disk array device 102 to which the parity storage request is transferred, the exclusive logical sum 205 of the data obtained by the exclusive OR and the previous parity 207 is calculated,
The new parity is written in the area 207.
The operation of the disk array device that has received the parity storage request will be described in detail.

FIG. 12 is a flowchart showing the operation of the disk array device which has received the parity storage request. In step 1201, command analysis is performed to analyze the data length and write position of the parity storage command. In step 1202, a cache area is reserved for storing the transferred parity storage command.
In step 1203, the parity write drive number is calculated. In Step 1204, Step 120
The block position in the drive calculated in 3 is calculated. In step 1205, the cache is searched to see if the old parity is in the cache. As a result, if it exists, the procedure proceeds to step 1209, and if it does not exist, the procedure proceeds to 1206.

In step 1206, an input request command for the old parity is generated. At step 1207, the disk path control 108 is performed at step 1206.
The execution of reading the old parity is started by transferring the command generated in. In step 1208, the process waits until the reading of the old parity is completed.

At step 1209, parity generation processing is performed. The operation here is the same as in FIG. That is,
The exclusive OR of the transferred data and the old parity is calculated. In step 1210, a command for storing the new parity calculated in step 1209 is generated. In step 1211, the command generated in step 1210 is transferred to the disk path control 108. As a result, the writing of the new parity is executed.
In step 1212, the process waits until the writing of the new parity to the disk device is completed. Step 12
At 13, the fact that the writing of the parity is completed is notified to the requesting disk array.

By the above processing, in an environment in which a plurality of disk arrays can communicate with each other, it is possible to reduce the number of disk array devices that store parity and provide a user with a device that maintains reliability. Further, it becomes possible to reduce the amount of data passing through the bus 104.

(Second Embodiment) FIG. 13 is a block diagram of a second embodiment according to the present invention. Host processor 1
01 is a plurality of single disk devices 1 via the bus 104.
301 and the disk array device 102 are connected.
The disk array device 102 includes an I / F control 105, a cache control 106, a parity control 107, a disk path control 108, a CPU 109, and a memory 110.

The I / F control 105 includes a communication control 111 and an interface control 112, and controls communication with the host processor 101 and other disk array devices 102. The cache control 106 is the host processor 10
It is a memory that temporarily stores data read and written from 1, and realizes high speed by reducing disk access.

The parity control 107 calculates the exclusive OR of a plurality of data. The disk path control 108 is a disk input / output control 113 and a disk interface control.
It is composed of 114 and selects one of the plurality of disk devices 117 and executes a command for the disk.

The CPU 109 controls a plurality of constituent elements, and a microprogram for controlling is stored in the memory 110. Disk device 13
The control of 01 is performed by the I / F control 105 and the cache control 10.
6, parity control 107, disk path control 108, C
It is composed of a PU 109 and a memory 110. I / F
The control 105 includes a communication control 111 and an interface control 1
12 and controls communication with the host processor 101 and other disk array devices 102. The cache control 106 is a memory that temporarily stores data read and written by the host processor 101, and realizes high speed by reducing disk access.

The parity control 107 calculates the exclusive OR of a plurality of data. The disk path control 1302
It is composed of a disk input / output control 113 and a disk interface control 114, and executes a command for a single disk device 1301. The CPU 109 controls a plurality of constituent elements, and a microprogram for controlling is stored in the memory 110.

The detailed operation of this embodiment will be described below. The second embodiment differs from the first embodiment in that it is composed of a plurality of single disk devices 1301 and the disk array device 102. This configuration can be considered that the single disk device 1301 is equivalent to RAID level 0 in the disk array. In this embodiment, the reliability that cannot be ensured by a single disk device can be made highly reliable by using the disk array 102.

FIG. 14 shows the contents of the RAID configuration table 505 required to realize the above effects. 1
This can be achieved by setting the RAID levels of devices 401 to 1404 to 0 and changing the number of drives to 1.

(Third Embodiment) FIG. 15 shows a block diagram of a third embodiment of the present invention. Host processor 1
01 is connected to a plurality of disk array devices 102 via a bus 104. Disk array device 102
Is composed of an I / F control 105, a cache control 106, a parity control 107, a disk path control 108, a CPU 109, and a memory 110. The I / F control 105 is
The interface controller 112 controls communication with the host processor 101 and other disk array devices 102. The cache control 106 is the host processor 1
This is a memory that temporarily stores data read and written from 01, and realizes high speed by reducing disk access. The parity control 107 calculates the exclusive OR of a plurality of data. The disk path control 108 is composed of a disk input / output control 113 and a disk interface control 114, selects one of the plurality of disk devices 117, and executes a command for the disk.

The CPU 109 controls a plurality of components, so that the microprogram is stored in the memory 110. 1504 is the host processor 10
1 is an operating system that operates on the system 1, and 1505 is composed of a WRITE process and 1506 is composed of a RAMID configuration table. Disk controller 10
2 generates a parity for the output request, and transfers the generated parity together with the output completion notification to the host processor 101 which is the source of the output request.

FIG. 16 shows the flow of the WRITE processing 1505. In step 1601, command analysis is performed, and the data length, read position, etc. of the output request issued to the OS 1504 are analyzed. Step 160
At 2, the device is selected. In step 1603,
An output request (WRITE command) is issued to the device selected in step 1602. Step 1604
Then, it waits until the output process is completed. In step 1605, the result of the exclusive OR of the output data and the old data is received. In step 1606, the device that stores the parity is calculated. In step 1607,
Issue a parity store command to the selected device.

FIG. 17 shows the RAID configuration table 1506.
Is shown. Buses 1001 to 1005
4 shows devices connected to the device No. 4 and information about each device is stored in 1006 to 1008. 1
006 stores the RAID level of the disk array of each device, 1007 stores the device capacity, and 1008 stores the number of drives in the disk array. In this example, five disk arrays are connected to the bus 104,
From device 1 (1001) to device 4 (1004), RAID 0 having no parity is set, and only device 5 (1005) has a parity. The parity of device 5 (1005) is device 1
It is shared by all data from (1001) to device 5 (1005).

The above-mentioned processing is parity control by the OS, but since the parity is generated by the disk array device 120, the load on the OS 1504 can be reduced.

[0044]

In an environment in which a plurality of disk arrays can communicate with each other, it is possible to increase the data storage area by reducing the number of disk array devices that store parity, and to provide a user with a device that maintains reliability. Become.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of a disk array parity storage method according to the present invention.

FIG. 2 is an explanatory diagram showing an operation outline of the first embodiment according to the present invention.

FIG. 3 is an explanatory diagram showing an example of a data storage format.

FIG. 4 is an explanatory diagram showing an example of a data storage format.

FIG. 5 is a block diagram showing a list of microprograms.

FIG. 6 is a data READ processing flowchart.

FIG. 7 is a data WRITE processing flowchart.

FIG. 8 is a parity generation processing flowchart.

FIG. 9 is an inter-device communication processing flowchart.

FIG. 10 is an explanatory diagram showing an example of a RAID configuration table.

FIG. 11 is a block diagram showing the format of a command.

FIG. 12 is a parity update processing flowchart.

FIG. 13 is a block diagram of a second embodiment of a disk array parity storage method according to the present invention.

FIG. 14 is an explanatory diagram illustrating an example of a RAID configuration table according to the second embodiment.

FIG. 15 is a block diagram of a third embodiment of a disk array parity storage method according to the present invention.

FIG. 16 is a WRITE processing flowchart of the OS.

FIG. 17 is an explanatory diagram showing an example of a RAID configuration table according to the third embodiment.

[Explanation of symbols]

101 ... Host processor, 104 ... Bus, 102 ... Disk array device, 105 ... I / F control, 106 ... Cache control, 107 ... Parity control, 108 ... Disk path control, 111 ... Communication control.

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Claims (4)

[Claims] 1. An exclusive of data 1 and data 2 which replaces data 1 in a disk array device comprising a plurality of disk drives, in which data and parity corresponding to the data are stored in the plurality of disk drives. The result of the logical OR and the storage address of the data 1 are input to the disk array device, and the disk array device performs the exclusive OR of the result of the exclusive OR and the parity data corresponding to the storage address of the data 1. A parity storage method, characterized in that a result of a logical sum is replaced with the parity data. 2. The exclusive OR of the data 1 and the data 2 is calculated in a plurality of disk control devices other than the disk array device according to claim 1,
A parity storage method for transferring the calculation result and the storage address of the data 1 to the disk array device. 3. The disk array according to claim 2, wherein the plurality of disk arrays can communicate with each other, and at least one of the plurality of disk arrays stores parity, and the other does not store parity. If it is a disk array device that stores parity, and if it is a disk array device that does not store parity, the operation result of the exclusive OR of the data 1 and the data 2 is set to the disk array that stores the parity. A parity storage method for transferring a result of the exclusive OR operation and a write address to a device. 4. The exclusive OR of the data 1 and the data 2 is calculated in a plurality of disk control devices other than the disk array device, and the calculation result is the data 2 as described above. Is transmitted to the host processor that has requested writing, and the host processor transfers the storage address of the data 2 and the operation result of the exclusive OR to the disk array device.