JPH08298271A - Mounting method of semiconductor device - Google Patents

Mounting method of semiconductor device

Info

Publication number
JPH08298271A
JPH08298271A JP7102759A JP10275995A JPH08298271A JP H08298271 A JPH08298271 A JP H08298271A JP 7102759 A JP7102759 A JP 7102759A JP 10275995 A JP10275995 A JP 10275995A JP H08298271 A JPH08298271 A JP H08298271A
Authority
JP
Japan
Prior art keywords
electrode
semiconductor device
gold wire
protrusion
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7102759A
Other languages
Japanese (ja)
Other versions
JP3347911B2 (en
Inventor
Kazuhiro Nobori
一博 登
Kazuto Nishida
一人 西田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10275995A priority Critical patent/JP3347911B2/en
Publication of JPH08298271A publication Critical patent/JPH08298271A/en
Application granted granted Critical
Publication of JP3347911B2 publication Critical patent/JP3347911B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
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    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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Abstract

PURPOSE: To provide a method of mounting a semiconductor device on a circuit board, wherein the semiconductor device is kept free from an electrical connection failure and capable of being replaced with a new one when it becomes defective. CONSTITUTION: A golden ball formed on the tip of a gold wire is pressed against the electrode 2 of a semiconductor device 1 by a capillary and electrically and mechanically bonded to it by heating and ultrasonic vibrations, and then a golden wire protrudent electrode 3 possessed of a protrudent top formed by moving the capillary in loops is formed. An anisotropic conductive film 7 composed of an insulating adhesive resin layer 7a and a mall amount of conductive fine particles 6 so dispersed in the resin layer 7a as not to deteriorate it in insulating properties is pasted on a circuit board 9, recesses 5 which are so recessed smaller than the diameter of the fine particle 6 and capable of trapping the conductive fine particles 6 are provided to the nearly flattened surface of the protrudent top of the golden wire protrudent electrode 3 when the protrudent top of the protrudent electrode 3 is flattened by a leveling plate, and the semiconductor device 1 is pressed against the circuit board 9, and the anisotropically conductive film 7 is cured by heating.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、半導体装置と回路基板
とを電気的機械的に接続する半導体装置の実装方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting method for electrically and mechanically connecting a semiconductor device and a circuit board.

【０００２】[0002]

【従来の技術】従来から、公知のメッキ技術によって電
極上に突起電極（以下、バンプという）を形成した半導
体装置を回路基板に電気的機械的に接続する方法とし
て、エレクトロニクス実装技術１９９４年１月号の６６
頁に記載のように、異方性導電膜を使用する方法が知ら
れている。この方法は、図１０に示すように、先ず、絶
縁性接着樹脂７ａに導電性微粒子６を絶縁性を損なわな
い程度に少量分散させたものからなる異方性導電膜７を
入出力電極８を有する回路基板９の上に貼り付ける。こ
の場合、導電性微粒子６の直径は５μｍ程度であり、１
００μｍ3 に２５個程度が混入されており、又、導電性
微粒子６には、外面に絶縁被覆が施されたものもある。
次いで、半導体装置１のアルミ電極２上に公知のメッキ
技術によってメッキバンプ１８を形成し、次いで、前記
メッキバンプ１８を形成した半導体装置１を前記の回路
基板９上に位置決めして重ね合わせ、最後に、加熱と加
圧とを同時に行って、前記メッキバンプ１８と入出力電
極８との間の距離を前記導電性微粒子６の直径以下に維
持した状態にして前記異方性導電膜７を硬化する。この
ようにすると、前記メッキバンプ１８と前記入出力電極
８との間は、前記メッキバンプ１８と前記入出力電極８
との間の直接接触と、両者間で押しつぶされた前記導電
性微粒子６ａを介しての接触とによって、電気的に接続
することになる。2. Description of the Related Art Conventionally, as a method of electrically and mechanically connecting a semiconductor device having a bump electrode (hereinafter referred to as a bump) formed on an electrode by a known plating technique to a circuit board, an electronic mounting technique, January 1994. Issue 66
As described on the page, a method using an anisotropic conductive film is known. In this method, as shown in FIG. 10, first, an input / output electrode 8 is provided with an anisotropic conductive film 7 made of a small amount of conductive fine particles 6 dispersed in an insulating adhesive resin 7a to such an extent that the insulating property is not impaired. It is attached on the circuit board 9 that it has. In this case, the diameter of the conductive fine particles 6 is about 5 μm, and
About 25 particles are mixed in 00 μm 3 , and some of the conductive fine particles 6 have an outer surface coated with an insulating coating.
Next, a plating bump 18 is formed on the aluminum electrode 2 of the semiconductor device 1 by a known plating technique, and then the semiconductor device 1 on which the plating bump 18 is formed is positioned and superposed on the circuit board 9, and finally. Then, the anisotropic conductive film 7 is cured by simultaneously performing heating and pressurizing so that the distance between the plating bump 18 and the input / output electrode 8 is maintained at the diameter of the conductive fine particles 6 or less. To do. By doing so, the plating bump 18 and the input / output electrode 8 are provided between the plating bump 18 and the input / output electrode 8.
An electrical connection is established by the direct contact between the two and the contact through the conductive fine particles 6a crushed between the two.

【０００３】ところで、前記メッキバンプ１８と前記入
出力電極８との間の直接接触は、前記接着樹脂による機
械的接着保持力で維持されるものであり、メッキバンプ
１８には弾力性が無いので電気的接続を維持する能動的
な加圧力が存在せず、ヒートサイクルを加えた場合に電
気的接続の信頼性が低い。しかし、両者間で押しつぶさ
れた前記導電性微粒子６ａを介する電気的接触には、前
記の押しつぶされた導電性微粒子６ａの弾力性による能
動的な加圧力が存在するので、ヒートサイクルを加えて
も電気的接続の信頼性を維持できるとされている。By the way, the direct contact between the plating bump 18 and the input / output electrode 8 is maintained by the mechanical adhesive holding force of the adhesive resin, and the plating bump 18 has no elasticity. There is no active pressure to maintain the electrical connection and the electrical connection is less reliable when heat cycled. However, since there is an active pressing force due to the elasticity of the crushed conductive fine particles 6a in the electrical contact between the crushed conductive fine particles 6a, even if a heat cycle is applied. It is said that the reliability of electrical connection can be maintained.

【０００４】[0004]

【発明が解決しようとする課題】しかし、上記の従来例
では、メッキバンプ１８は、平面部が広いので、メッキ
バンプ１８の平面部と入出力電極８との間に多くの押し
つぶされた導電性微粒子６ａが存在するように思われる
が、実際には、メッキバンプ１８の角が図１０に示すよ
うな曲面になっていること等にもより、絶縁性接着樹脂
７ａと導電性微粒子６とが、メッキバンプ１８の平面部
と入出力電極８との間から共に流れ出てしまい、メッキ
バンプ１８の平面部と入出力電極８との間には、僅かの
導電性微粒子６しか残らず、導電性微粒子６が全く残ら
ない入出力電極８も発生する。この場合には、ヒートサ
イクルには耐えられず、電気的接続不良になるという問
題点がある。However, in the above-mentioned conventional example, since the plated bump 18 has a wide flat portion, a large amount of crushed conductivity is present between the flat portion of the plated bump 18 and the input / output electrode 8. Although the fine particles 6a seem to exist, the insulating adhesive resin 7a and the conductive fine particles 6 are actually separated by the fact that the corners of the plating bumps 18 are curved as shown in FIG. , Both flow out from between the flat portion of the plating bump 18 and the input / output electrode 8, and only a small amount of the conductive fine particles 6 remain between the flat portion of the plating bump 18 and the input / output electrode 8 to reduce the conductivity. An input / output electrode 8 where no fine particles 6 remain is also generated. In this case, there is a problem that it cannot withstand the heat cycle, resulting in poor electrical connection.

【０００５】又、半導体装置１を実装し、実装後の検査
でその半導体装置１が不良と判明した場合、その不良半
導体装置１を良品に取替えようとしても、入出力電極８
上には、導電性微粒子６が存在しないか、存在していて
も押しつぶされ過ぎて、半導体装置１を取り外した後に
は弾力性を失っているので、取り替えた半導体装置１が
電気的接続不良になるという問題点がある。Further, when the semiconductor device 1 is mounted and the semiconductor device 1 is found to be defective in the inspection after mounting, even if the defective semiconductor device 1 is replaced with a good product, the input / output electrode 8
The conductive fine particles 6 do not exist on the upper side, or even if they exist, they are crushed too much and lose elasticity after the semiconductor device 1 is removed. Therefore, the replaced semiconductor device 1 has a poor electrical connection. There is a problem that

【０００６】又、位置決めして重ね合わせた後に、加熱
と加圧とを行う工程が必要なので、工程に時間がかか
り、生産性向上に限界があるという問題点がある。Further, since a step of heating and pressurizing after positioning and superimposing is required, there is a problem that the step is time consuming and there is a limit to improvement in productivity.

【０００７】本発明は、上記の問題点を解決し、電気的
接続不良が起きることが無く、不良半導体装置の取替え
が可能であり、更には、加圧・加熱工程が不要である半
導体装置の実装方法を提供することを課題としている。The present invention solves the above-mentioned problems, allows defective semiconductor devices to be replaced without causing electrical connection failure, and further eliminates the need for pressurizing / heating steps. The challenge is to provide an implementation method.

【０００８】[0008]

【課題を解決するための手段】本願第１発明の半導体装
置の実装方法は、上記の課題を解決するために、金線の
先端に熱エネルギにより金ボールを形成し、前記金ボー
ルをキャピラリーにより半導体装置の電極上に接合した
後、前記キャピラリーをループ移動させて突起形状頂部
を有する金線突起電極を形成する金線突起電極形成工程
と、回路基板上に、絶縁性接着樹脂に導電性微粒子を絶
縁性を損なわない程度に少量分散させたものからなる異
方性導電膜を貼り付ける異方性導電膜貼付工程と、レベ
リング板を前記半導体装置の金線突起電極の突起形状頂
部に押し当て、前記突起形状頂部を略平坦化する際に、
前記の略平坦化された面に対して前記導電性微粒子の直
径より少し小さい段差を有する凹部を前記略平坦化され
た面に残すレベリング工程と、前記金線突起電極と前記
回路基板の入出力電極とを位置合わせした後、前記半導
体装置を前記回路基板に押圧し加熱して前記異方性導電
膜を硬化させる押圧加熱工程とを有することを特徴とす
る。 又、本願第１発明の半導体装置の実装方法は、上
記の課題を解決するために、導電性微粒子の直径より少
し小さい段差を有する凹部は、金線突起電極上に残った
キャピラリーの先端跡からなることが好適である。In order to solve the above-mentioned problems, a semiconductor device mounting method according to the first invention of the present application forms a gold ball at the tip of a gold wire by thermal energy, and the gold ball is formed by a capillary. A gold wire protrusion electrode forming step of forming a gold wire protrusion electrode having a protrusion-shaped top by loop-moving the capillary after bonding on the electrode of a semiconductor device, and a conductive fine particle on an insulating adhesive resin on a circuit board. A step of sticking an anisotropic conductive film consisting of a small amount of dispersed in an amount that does not impair the insulating property, and pressing a leveling plate on the top of the projection shape of the gold wire projection electrode of the semiconductor device. When flattening the protrusion-shaped top,
A leveling step of leaving a concave portion having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface on the substantially flattened surface; input / output of the gold wire protruding electrode and the circuit board; After aligning with the electrodes, the semiconductor device is pressed against the circuit board and heated to cure the anisotropic conductive film. In order to solve the above-mentioned problems, the semiconductor device mounting method according to the first invention of the present application is such that the recess having a step slightly smaller than the diameter of the conductive fine particles is removed from the tip of the capillary remaining on the gold wire protruding electrode. Is preferred.

【０００９】又、本願第１発明の半導体装置の実装方法
は、上記の課題を解決するために、導電性微粒子の直径
より少し小さい段差を有する凹部は、レベリング板に設
けた円柱状の凸部により形成されることが好適である。In order to solve the above-mentioned problems, the semiconductor device mounting method of the first invention of the present application is such that the concave portion having a step slightly smaller than the diameter of the conductive fine particles is a cylindrical convex portion provided on the leveling plate. Is preferably formed by

【００１０】本願第２発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の電極上に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板上
に、絶縁性接着樹脂に導電性微粒子を絶縁性を損なわな
い程度に少量分散させたものからなる異方性導電膜を貼
り付ける異方性導電膜貼付工程と、レベリング板を前記
半導体装置の金線突起電極の突起形状頂部に押し当て、
前記突起形状頂部を略平坦化する際に、前記の略平坦化
された面に対して前記導電性微粒子の直径より少し小さ
い段差を有する凹部を前記略平坦化された面に残すレベ
リング工程と、前記金線突起電極と前記回路基板の入出
力電極とを位置合わせした後、仮加圧仮硬化する仮加圧
硬化工程と、電気特性を検査する検査工程と、検査結果
が良の場合に本加圧本硬化する本加圧硬化工程と、検査
結果が不良の場合に不良半導体装置を取り替える取替え
工程とを有することを特徴とする。A semiconductor device mounting method according to the second invention of the present application is
In order to solve the above problems, a gold ball is formed at the tip of a gold wire by thermal energy, the gold ball is bonded onto an electrode of a semiconductor device by a capillary, and then the capillary is moved in a loop to form a protrusion-shaped top. A gold wire protrusion electrode forming step of forming a gold wire protrusion electrode having, and an anisotropic conductive film formed on a circuit board by dispersing a small amount of conductive fine particles in an insulating adhesive resin so as not to impair the insulating property. Anisotropic conductive film pasting step of pasting, pressing the leveling plate against the protrusion-shaped top portion of the gold wire protrusion electrode of the semiconductor device,
When substantially flattening the protrusion-shaped top portion, a leveling step of leaving a recess having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface on the substantially flattened surface, After aligning the gold wire projecting electrodes with the input / output electrodes of the circuit board, a temporary pressure curing step of temporary pressure temporary curing, an inspection step of inspecting electrical characteristics, and a test when the inspection result is good The present invention is characterized by having a main pressure curing step of performing pressure main curing and a replacement step of replacing a defective semiconductor device when the inspection result is defective.

【００１１】本願第３発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の電極上に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板上
に、絶縁性接着樹脂からなる絶縁性接着樹脂膜を貼り付
ける絶縁性接着樹脂膜貼付工程と、前記金線突起電極と
前記回路基板の入出力電極とを位置合わせした後、前記
半導体装置を前記回路基板に押圧し加熱又は光線により
前記絶縁性接着樹脂膜を硬化させる押圧硬化工程とを有
することを特徴とする。A method of mounting a semiconductor device according to the third invention of the present application is
In order to solve the above problems, a gold ball is formed at the tip of a gold wire by thermal energy, the gold ball is bonded onto an electrode of a semiconductor device by a capillary, and then the capillary is moved in a loop to form a protrusion-shaped top. A gold wire protrusion electrode forming step of forming a gold wire protrusion electrode having, an insulating adhesive resin film attaching step of attaching an insulating adhesive resin film made of an insulating adhesive resin on a circuit board, and the gold wire protrusion electrode After aligning the input / output electrodes of the circuit board, the semiconductor device is pressed against the circuit board, and a pressure curing step of curing the insulating adhesive resin film by heating or light rays is included.

【００１２】本願第４発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の全電極上にそれぞれ押圧し、加圧と
加熱と超音波振動とにより前記金ボールと前記電極とを
金属間結合で電気的機械的に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板の入
出力電極上にアルミ電極を形成するアルミ電極形成工程
と、前記金線突起電極と前記回路基板の入出力電極とを
位置合わせした後、前記半導体装置を前記回路基板に押
圧し加熱と超音波振動とにより前記金線突起電極と前記
入出力電極上のアルミ電極とを金属間結合で電気的機械
的に接合する接合工程とを有することを特徴とする。A method of mounting a semiconductor device according to the fourth invention of the present application is
In order to solve the above problems, a gold ball is formed at the tip of a gold wire by thermal energy, and the gold ball is pressed on all electrodes of a semiconductor device by a capillary, respectively, by pressurization, heating and ultrasonic vibration. A gold wire protrusion electrode forming step of forming a gold wire protrusion electrode having a protrusion-shaped top by loop-moving the capillary after electromechanically bonding the gold ball and the electrode by metal-to-metal bonding, and a circuit board After the aluminum electrode forming step of forming an aluminum electrode on the input / output electrode and the gold wire protruding electrode and the input / output electrode of the circuit board are aligned, the semiconductor device is pressed against the circuit board to heat and A bonding step of electrically and mechanically bonding the gold wire protruding electrode and the aluminum electrode on the input / output electrode by metal-to-metal bonding by sonic vibration.

【００１３】[0013]

【作用】本願第１〜第３発明は、半導体装置の電極と回
路基板の入出力電極間に接触による電気的接合を得よう
とする場合に、接触し合う導電材の少なくとも一方に弾
力性を持たせると、ヒートサイクルが加えられても高い
信頼性を維持できるということを利用している。According to the first to third inventions of the present application, at least one of the conductive materials that come into contact with each other has elasticity when an electrical connection is to be made between the electrodes of the semiconductor device and the input / output electrodes of the circuit board by contact. Taking advantage of this, it is possible to maintain high reliability even if a heat cycle is applied.

【００１４】本願第１発明の半導体装置の実装方法は、
絶縁性接着樹脂に導電性微粒子を絶縁性を損なわない程
度に少量分散させたものからなる異方性導電膜を回路基
板の入出力電極上に貼付し、半導体装置の電極上に突起
形状頂部を有する金線突起電極を形成し、レベリング工
程において、前記の突起形状頂部を略平坦化し、その際
に、略平坦化した面に対して前記導電性微粒子の直径よ
り少し小さい段差を有する凹部を前記の略平坦化された
面に残しているので、前記半導体装置を前記回路基板に
対して加圧し同時に加熱し前記異方性導電膜を硬化させ
て前記金線突起電極と前記入出力電極とを接触させて電
気的に接合する場合に、前記導電性微粒子が、少し圧縮
されただけで弾力性を維持している状態で、前記凹部に
捕捉されて、前記金線突起電極と前記入出力電極との間
を電気的に接合する。このように、前記導電性微粒子が
弾力性を維持していることにより、ヒートサイクルが加
えられても、前記金線突起電極と前記入出力電極間の電
気的接合が低下せず、電気的接合の信頼性が高い半導体
装置の実装が可能になる。The semiconductor device mounting method of the first invention of the present application is
Anisotropic conductive film consisting of a small amount of conductive fine particles dispersed in an insulating adhesive resin so as not to impair the insulating property is attached to the input / output electrodes of the circuit board, and the protrusion-shaped tops are placed on the electrodes of the semiconductor device. Forming a gold wire protrusion electrode having, in the leveling step, the protrusion-shaped top portion is substantially flattened, and at that time, a concave portion having a step slightly smaller than the diameter of the conductive fine particles with respect to the substantially flattened surface is formed. Since it is left on the substantially flattened surface, the semiconductor device is pressed against the circuit board and simultaneously heated to cure the anisotropic conductive film, so that the gold wire protruding electrode and the input / output electrode are separated. When brought into contact with each other to be electrically connected, the conductive fine particles are trapped in the recesses in a state in which the conductive fine particles are slightly compressed and maintain elasticity, and the gold wire protruding electrode and the input / output electrode To electrically connect . As described above, since the conductive fine particles maintain elasticity, the electrical connection between the gold wire protruding electrode and the input / output electrode does not deteriorate even when a heat cycle is applied, and the electrical connection is maintained. It is possible to mount a highly reliable semiconductor device.

【００１５】又、本願第１発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、金線突起電極上に残ったキャピラリーの先端跡に
よって形成すると、形成が簡単、容易である。Further, the semiconductor device mounting method of the first invention of the present application is easy to form by forming the recess having the step slightly smaller than the diameter of the conductive fine particles by the trace of the tip of the capillary remaining on the gold wire protruding electrode. , Easy.

【００１６】又、本願第１発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、レベリング板に設けた円柱状の凸部により形成す
ると、前記凹部に捕捉される導電性微粒子の数が多くな
り、電気的接合の信頼性が、更に、向上する。Further, in the method for mounting a semiconductor device according to the first aspect of the present invention, when the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by the cylindrical convex portion provided on the leveling plate, the concave portion is captured by the concave portion. The number of conductive fine particles is increased, and the reliability of electrical connection is further improved.

【００１７】本願第２発明の半導体装置の実装方法は、
本願第１発明の作用に加えて、導電性微粒子の直径より
少し小さい段差を有する凹部に捕捉されている導電性微
粒子が、少し圧縮されただけで弾力性を維持している状
態であることを利用し、仮加圧仮硬化する仮加圧硬化工
程を加えて、実装された半導体装置の電気特性を検査
し、良品のみを本加圧本硬化し、不良品を取り替えるこ
とができる。A semiconductor device mounting method according to the second invention of the present application is
In addition to the action of the first invention of the present application, the conductive fine particles captured in the recess having a step slightly smaller than the diameter of the conductive fine particles are in a state of maintaining elasticity by being slightly compressed. By using this, a temporary pressure curing step of temporary pressure temporary curing is added to inspect the electrical characteristics of the mounted semiconductor device, and only non-defective products are subjected to main pressure main curing, and defective products can be replaced.

【００１８】本願第３発明の半導体装置の実装方法は、
半導体装置の電極上に突起形状頂部を有する金線突起電
極を形成し、金線によって構成される前記突起形状頂部
が有する弾力性を利用して、前記金線突起電極と回路基
板の入出力電極間に接触による電気的接合を構成するも
のであり、絶縁性接着樹脂膜貼付工程において、回路基
板上に、絶縁性接着樹脂からなる絶縁性接着樹脂膜を貼
り付け、押圧硬化工程において、前記金線突起電極と前
記回路基板の入出力電極とを位置合わせした後、前記半
導体装置を前記回路基板に押圧すると同時に加熱又は光
線により前記絶縁性接着樹脂膜を硬化させるので、金線
によって構成される前記突起形状頂部が有する弾力性
が、半導体装置の電極と回路基板の入出力電極間の接触
による電気的接合を維持し、ヒートサイクルが加えられ
ても高い信頼性を維持する電気的接合が得られる。又、
絶縁性接着樹脂膜は混入微粒子が無いので光線の透過率
が維持され、光線等によって硬化する樹脂を接着樹脂膜
に使用し、且つ、電極に透明なＩＴＯを使用すれば光線
による硬化が可能で、耐熱性が無い回路基板にも適用で
きる。A method of mounting a semiconductor device according to the third invention of the present application,
A gold wire protrusion electrode having a protrusion-shaped top portion is formed on an electrode of a semiconductor device, and the elasticity of the protrusion-shaped top portion formed of a gold wire is used to make use of the elasticity of the gold wire protrusion electrode and an input / output electrode of a circuit board. In the insulating adhesive resin film attaching step, an insulating adhesive resin film made of an insulating adhesive resin is attached on the circuit board in the insulating adhesive resin film attaching step. After aligning the wire protrusion electrodes with the input / output electrodes of the circuit board, the semiconductor device is pressed against the circuit board, and at the same time, the insulating adhesive resin film is cured by heating or light rays. The elasticity of the protrusion-shaped top maintains electrical contact due to contact between the electrodes of the semiconductor device and the input / output electrodes of the circuit board, and maintains high reliability even when a heat cycle is applied. Electrical connection to be obtained. or,
Since the insulating adhesive resin film does not contain mixed particles, the transmittance of light rays is maintained, and if a resin that cures by light rays is used for the adhesive resin film and transparent ITO is used for the electrodes, it can be cured by light rays. It can also be applied to circuit boards that do not have heat resistance.

【００１９】本願第４発明の半導体装置の実装方法は、
超音波振動を利用して、従来例では必要な別工程におけ
る加熱硬化時間を不要にするものである。A method of mounting a semiconductor device according to the fourth invention of the present application is
By utilizing ultrasonic vibration, the heating and curing time in another step which is required in the conventional example is made unnecessary.

【００２０】加圧と加熱と超音波振動とによって、多点
で接触している金属間に金属間結合を発生させ均一で良
好な電気的機械的接合を得るには、多点の各接触圧が均
一であることが必要である。このためには、多点が弾力
性圧力で接触していると都合が良い。本願第４発明はこ
のことを利用している。In order to generate a metal-to-metal bond between metals that are in contact with each other at multiple points by pressurization, heating, and ultrasonic vibration, and to obtain a uniform and good electromechanical joining, the contact pressure at each of the multiple points Must be uniform. For this purpose, it is convenient that multiple points are in contact with each other with elastic pressure. The fourth invention of the present application utilizes this fact.

【００２１】半導体装置の電極上に突起形状頂部を有す
る金線突起電極を形成する。金線によって構成された前
記突起形状頂部は弾力性を有している。そして、アルミ
電極形成工程において回路基板の入出力電極上にアルミ
電極を形成し、接合工程において、前記半導体装置の金
線突起電極と前記回路基板の入出力電極とを位置合わせ
した後、前記半導体装置を前記回路基板に押圧し加熱と
超音波振動とを加えて、前記金線突起電極と前記入出力
電極上のアルミ電極との間に金属間結合を形成する。こ
の場合、前記半導体装置は多数の電極を有するので、多
数の金線突起電極が多数の入出力電極に押圧されること
になる。しかし、前記金線突起電極の頂部に設けられた
突起形状頂部が弾力性を有するので、前記半導体装置と
前記回路基板との平行度に多少の狂いがあっても、又、
各電極の高さに多少の不揃いがあっても、前記弾力性が
前記の多数の電極間の各接触圧を均一に調整する作用を
果たし、接合すべき電極が多数であっても、必要容量が
ある超音波発振子と増幅ホーンとを使用しさえすれば、
加圧と加熱と超音波振動とによって前記金線突起電極と
前記入出力電極上のアルミ電極との間に均一で良好な金
属間結合を形成することができる。A gold wire protrusion electrode having a protrusion-shaped top is formed on the electrode of the semiconductor device. The protrusion-shaped top made of a gold wire has elasticity. Then, in the aluminum electrode forming step, an aluminum electrode is formed on the input / output electrode of the circuit board, and in the joining step, the gold wire protruding electrode of the semiconductor device and the input / output electrode of the circuit board are aligned, and then the semiconductor The device is pressed against the circuit board, heated and subjected to ultrasonic vibration to form an intermetallic bond between the gold wire protruding electrode and the aluminum electrode on the input / output electrode. In this case, since the semiconductor device has many electrodes, many gold wire protruding electrodes are pressed by many input / output electrodes. However, since the protrusion-shaped top portion provided on the top portion of the gold wire protrusion electrode has elasticity, even if there is some deviation in the parallelism between the semiconductor device and the circuit board,
Even if there is some unevenness in the height of each electrode, the elasticity acts to evenly adjust each contact pressure between the multiple electrodes, and even if there are multiple electrodes to be joined, the required capacitance As long as you use an ultrasonic oscillator and an amplification horn
By applying pressure, heating, and ultrasonic vibration, it is possible to form a uniform and good intermetallic bond between the gold wire protruding electrode and the aluminum electrode on the input / output electrode.

【００２２】[0022]

【実施例】本発明の半導体装置の実装方法の第１実施例
を図１〜図６に基づいて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a semiconductor device mounting method according to the present invention will be described with reference to FIGS.

【００２３】本実施例は、図１に示すように、金線突起
電極３と異方性導電膜７とを使用し、金線突起電極３の
凹部５によって、異方性導電膜７に混入されている導電
性微粒子６をその弾力性を維持させながら使用して、電
気的接続不良の発生を防止する半導体装置の実装方法で
ある。In this embodiment, as shown in FIG. 1, the gold wire protrusion electrode 3 and the anisotropic conductive film 7 are used, and the recess 5 of the gold wire protrusion electrode 3 mixes with the anisotropic conductive film 7. This is a method for mounting a semiconductor device, in which the generated conductive fine particles 6 are used while maintaining the elasticity thereof to prevent the occurrence of defective electrical connection.

【００２４】本実施例は、先ず、絶縁性接着樹脂７ａに
導電性微粒子６を絶縁性を損なわない程度に少量分散さ
せたものからなる異方性導電膜７（図１参照）を入出力
電極８を有する回路基板９の上に貼り付ける。In this embodiment, first, an anisotropic conductive film 7 (see FIG. 1) is formed by dispersing conductive fine particles 6 in a small amount in an insulating adhesive resin 7a to such an extent that the insulating property is not impaired. It is pasted on the circuit board 9 having 8.

【００２５】他方、図２に示すように、１５０°Ｃ〜３
００°Ｃに加熱したステージ１９上に半導体装置１を真
空吸着により固定し、キャピラリー１０により、公知の
ワイヤボンディング方式の１ｓｔ工程と同じ方法で、金
線１１の先端に形成した金ボールをアルミ電極２上に押
し当て、押し当てると同時に超音波振動をキャピラリー
１０に加え、金ボールをアルミ電極２に金属間接合して
金線突起電極３を形成する。これによって、図２に示す
ように、金線突起電極３上にキャピラリー１０の先端形
状により凹部５が形成される。勿論、必要であれば、以
下に説明する目的に合わせて、キャピラリー１０の先端
形状を望ましい形状にすれば良い。On the other hand, as shown in FIG.
The semiconductor device 1 is fixed on the stage 19 heated to 00 ° C. by vacuum suction, and the capillary 10 is used to attach the gold ball formed at the tip of the gold wire 11 to the aluminum electrode by the same method as the first step of the known wire bonding method. Then, ultrasonic vibration is applied to the capillary 10 at the same time as the pressing, and gold balls are metal-metal bonded to the aluminum electrode 2 to form the gold wire protruding electrode 3. As a result, as shown in FIG. 2, the concave portion 5 is formed on the gold wire protruding electrode 3 by the tip shape of the capillary 10. Of course, if necessary, the tip shape of the capillary 10 may be set to a desired shape in accordance with the purpose described below.

【００２６】次いで、図３に示すように、一般に行われ
ているようにして、キャピラリー１０を、少し上昇させ
少し横に移動し再び下降させて、前記の金線突起電極３
に接触させる。金線１１は、上記の接触した部分で切断
され、図４に示す形状の金線突起電極３が形成される。
この時点では、金線突起電極３は図４に示すように、底
部３ａでアルミ電極に接続し、凹部５と、突起形状頂部
４ａとを有する。前記の凹部５があると、異方性導電膜
７に混入されている導電性微粒子６を前記凹部に捕捉し
てその弾力性を維持させながら使用することができ、電
気的接続不良の発生を防止し、且つ、不良半導体装置の
取替えを可能にする。Then, as shown in FIG. 3, the capillary 10 is moved up a little, moved a little sideways, and moved down again, as is generally done, and the gold wire protruding electrode 3 is removed.
Contact. The gold wire 11 is cut at the above-mentioned contact portion, and the gold wire protruding electrode 3 having the shape shown in FIG. 4 is formed.
At this point, the gold wire projecting electrode 3 is connected to the aluminum electrode at the bottom 3a and has the recess 5 and the projecting shape top 4a, as shown in FIG. When the concave portion 5 is provided, the conductive fine particles 6 mixed in the anisotropic conductive film 7 can be used while being trapped in the concave portion and maintaining its elasticity, so that a poor electrical connection may occur. It is possible to prevent and replace a defective semiconductor device.

【００２７】次いで、図５に示すようにして、突起形状
頂部４ａを略平坦化した平坦化頂部４ｂに形成する。図
４に示す金線突起電極３を、半導体装置１の個々のアル
ミ電極２上に形成すると、各金線突起電極３の夫々の高
さがある許容範囲内で微妙に異なる。この状態では回路
基板に信頼性良く接合出来ないので、図５に示すよう
に、レベリング板１２を使用して、一つの半導体装置内
の全ての金線突起電極３を同時に押さえつけ、全ての金
線突起電極３の高さをレベリングして揃える。このレベ
リングの際に、本実施例では、レベリングされた金線突
起電極３に、凹部５を残し、且つ、平坦化頂部４ｂと凹
部５の底との距離を、異方性導電膜７に混入されている
導電性微粒子６の直径よりも小さくする。そして、小さ
くする程度は、前記導電性微粒子６が押さえられて、金
線突起電極３と入出力電極８との間の電気的接続を維持
し、且つ、前記導電性微粒子６の弾力性が維持される程
度とする。Then, as shown in FIG. 5, the protrusion-shaped top portion 4a is formed into a substantially flattened top portion 4b. When the gold wire protrusion electrodes 3 shown in FIG. 4 are formed on the individual aluminum electrodes 2 of the semiconductor device 1, the respective heights of the gold wire protrusion electrodes 3 are slightly different within a certain allowable range. In this state, the circuit board cannot be reliably joined, so that as shown in FIG. 5, by using the leveling plate 12, all the gold wire projecting electrodes 3 in one semiconductor device are pressed simultaneously, and all the gold wires are pressed. The heights of the protruding electrodes 3 are leveled and aligned. At the time of this leveling, in the present embodiment, the recess 5 is left in the leveled gold wire protruding electrode 3, and the distance between the flattened top 4b and the bottom of the recess 5 is mixed in the anisotropic conductive film 7. The diameter is smaller than the diameter of the conductive fine particles 6 that are formed. The degree of reduction is such that the conductive fine particles 6 are pressed down to maintain the electrical connection between the gold wire protruding electrode 3 and the input / output electrode 8 and maintain the elasticity of the conductive fine particles 6. To the extent that

【００２８】次いで、図１に示すように、図５のレベリ
ングを行った半導体装置１を、先に処理済みの、前記異
方性導電膜７を貼り付けた回路基板９の上に位置決めし
て重ね合わせる。Next, as shown in FIG. 1, the leveled semiconductor device 1 shown in FIG. 5 is positioned on the circuit board 9 to which the anisotropic conductive film 7 is pasted, which has been previously processed. Overlap.

【００２９】最後に、加熱と加圧とを同時に行って、金
線突起電極３の平坦化頂部４ｂと入出力電極８との間の
距離を前記導電性微粒子６の直径以下に維持した状態で
前記異方性導電膜７を硬化する。このようにすると、前
記金線突起電極３の平坦化頂部４ｂと入出力電極８との
間では、前記導電性微粒子６の大部分が外に流れ出し、
残った僅かの前記導電性微粒子６は押しつぶされた導電
性微粒子６ａになって弾力性を失っているが、前記の流
れ出ようとした導電性微粒子６が前記凹部５と入出力電
極８との間に捕捉され、樹脂の硬化によってそこに弾力
性を維持して固定され、金線突起電極３と入出力電極８
との間に、ヒートサイクルを受けても、信頼性が高い電
気的接続を維持する。Finally, heating and pressurizing are performed simultaneously, and the distance between the flattened top portion 4b of the gold wire protruding electrode 3 and the input / output electrode 8 is maintained below the diameter of the conductive fine particles 6. The anisotropic conductive film 7 is cured. By doing so, most of the conductive fine particles 6 flow out between the flattened top portion 4b of the gold wire protruding electrode 3 and the input / output electrode 8,
The remaining small amount of the conductive fine particles 6 becomes crushed conductive fine particles 6a and loses elasticity, but the conductive fine particles 6 that are about to flow out between the recess 5 and the input / output electrode 8. Are fixed to the gold wire protruding electrode 3 and the input / output electrode 8 by being cured by the resin and maintaining elasticity.
Maintains a highly reliable electrical connection during and after heat cycling.

【００３０】尚、本実施例においては、金線突起電極３
の平坦化頂部４ｂを形成する際に、図６に示すように、
金線突起電極３の平坦化頂部４ｂにも、導電性微粒子６
を弾力性を捕捉して存在させるために、レベリング板１
２の、前記各金線突起電極３に対向する位置に、薄い円
柱状凸部１３を設ける。これらの円柱状凸部１３を設け
たレベリング板１２を使用すると、図６に示すように、
金線突起電極３に凹部付平坦化頂部４ｃが得られる。こ
の凹部付平坦化頂部４ｃの深さを、前記導電性微粒子６
が押さえられて、金線突起電極３と入出力電極８との間
に接触による電気的接続を維持し、且つ、前記導電性微
粒子６の弾力性が維持される程度とすれば、図１に示す
ようにした場合に、凹部付平坦化頂部４ｃ内に導電性微
粒子６が捕捉され、樹脂の硬化によってそこに弾力性を
維持して固定され、金線突起電極３と入出力電極８との
間に、ヒートサイクルを受けても、信頼性が高い電気的
接続を維持する。尚、本実施例では、レベリング板１２
にはガラス板を使用し、薄い円柱状凸部１３はインジュ
ム・錫・鉛からなり透明電極に使用されるＩＴＯで形成
した。In this embodiment, the gold wire protruding electrode 3
When forming the flattened top portion 4b of, as shown in FIG.
The conductive fine particles 6 are also formed on the flattened top portion 4b of the gold wire protruding electrode 3.
Leveling plate 1 in order to capture the elasticity and make it exist.
A thin columnar convex portion 13 is provided at a position of 2 facing each of the gold wire protruding electrodes 3. When the leveling plate 12 provided with these columnar protrusions 13 is used, as shown in FIG.
A flattened top 4c with a recess is obtained in the gold wire protruding electrode 3. The depth of the flattened top portion 4c with concave portions is set to the above-mentioned conductive fine particles 6
1 is set so that the electrical connection by the contact between the gold wire protruding electrode 3 and the input / output electrode 8 is maintained and the elasticity of the conductive fine particles 6 is maintained. In the case shown in the drawing, the conductive fine particles 6 are captured in the flattened top portion 4c with concave portions, and are fixed there by maintaining the elasticity by hardening of the resin, so that the gold wire protruding electrode 3 and the input / output electrode 8 are In the meantime, it maintains a reliable electrical connection even when subjected to heat cycles. In this embodiment, the leveling plate 12
A glass plate is used for the thin columnar convex portion 13 made of indium, tin, and lead and formed of ITO used for a transparent electrode.

【００３１】本発明の半導体装置の実装方法の第２実施
例を図１〜図６に基づいて説明する。A second embodiment of the semiconductor device mounting method according to the present invention will be described with reference to FIGS.

【００３２】本実施例は、第１実施例と同様にして半導
体装置１を回路基板９に実装し、実装後の検査でその半
導体装置１が不良と判明した場合、その不良半導体装置
１を良品に取替えることができる半導体装置の実装方法
である。In this embodiment, the semiconductor device 1 is mounted on the circuit board 9 in the same manner as in the first embodiment, and when the semiconductor device 1 is found to be defective in the inspection after mounting, the defective semiconductor device 1 is regarded as a non-defective product. It is a method of mounting a semiconductor device that can be replaced with.

【００３３】本実施例では、先ず、第１実施例と同様に
して、図１に示すようにして全体の位置決めを行った後
に、絶縁性接着樹脂７ａが仮硬化する程度の低い温度
と、金線突起電極３と入出力電極８との間に検査ができ
る程度の電気的接続が得られる程度の弱い圧力で加圧す
る。この状態では、絶縁性接着樹脂７ａは仮硬化の状態
にあり、導電性微粒子６は、金線突起電極３の凹部５、
又は、凹部付平坦化頂部４ｃにおいて、半導体装置の特
性検査ができる程度の導通が得られる程度に加圧されて
いるが、未だ充分な弾力性を有する状態にある。In this embodiment, first, similarly to the first embodiment, after the entire positioning is performed as shown in FIG. 1, the insulating adhesive resin 7a is subjected to a low temperature such that the insulating adhesive resin 7a is temporarily hardened, and gold is used. Pressure is applied with a weak pressure between the wire protrusion electrode 3 and the input / output electrode 8 so that an electrical connection that can be inspected is obtained. In this state, the insulating adhesive resin 7a is in a pre-cured state, and the conductive fine particles 6 are formed in the concave portions 5 of the gold wire protruding electrode 3,
Alternatively, the flattened top portion 4c with recesses is pressurized to such an extent that the semiconductor device can be inspected for its characteristics, but still has sufficient elasticity.

【００３４】次いで、上記のように仮実装された半導体
装置１の特性検査を行う。この結果、良との結果が出れ
ば、本硬化して実装を完了する。検査結果が不良であれ
ば、不良の半導体装置１を垂直方向に引っ張って取り外
す。この状態では、絶縁性接着樹脂７ａは仮硬化の状態
にあり、導電性微粒子６は、未だ充分な弾力性を有する
状態にある。Next, the characteristics of the semiconductor device 1 temporarily mounted as described above is inspected. As a result, if the result is good, the main curing is performed and the mounting is completed. If the inspection result is defective, the defective semiconductor device 1 is pulled in the vertical direction and removed. In this state, the insulating adhesive resin 7a is in a temporarily cured state, and the conductive fine particles 6 are still in a state of having sufficient elasticity.

【００３５】従って、次いで、上記と同様に処理した半
導体装置１を、上記と同様にして、仮実装する。Therefore, next, the semiconductor device 1 processed as described above is temporarily mounted in the same manner as described above.

【００３６】次いで、上記のように再度仮実装された半
導体装置１の特性検査を再度行い、良好な検査結果がで
るまで、上記を繰り返す。Next, the characteristic inspection of the semiconductor device 1 temporarily mounted again as described above is performed again, and the above is repeated until a good inspection result is obtained.

【００３７】本発明の半導体装置の実装方法の第３実施
例を図２〜図４と図７とに基づいて説明する。A third embodiment of the semiconductor device mounting method according to the present invention will be described with reference to FIGS. 2 to 4 and 7.

【００３８】本実施例は、第１、第２実施例が、異方性
導電膜７に混入されている導電性微粒子６をその弾力性
を維持させながら使用して、電気的接続不良の発生を防
止し、更に、不良半導体装置の取替えを可能にしている
のとは異なり、金線突起電極３そのものの弾力性を利用
して、電気的接続不良の発生を防止する半導体装置の実
装方法である。In the present embodiment, the first and second embodiments use the conductive fine particles 6 mixed in the anisotropic conductive film 7 while maintaining the elasticity thereof, and the occurrence of the electrical connection failure. In addition to preventing the defective semiconductor device from being replaced, it is possible to use the elasticity of the gold wire protruding electrode 3 itself to prevent the occurrence of a defective electrical connection. is there.

【００３９】先ず、図７に示すように、絶縁性接着樹脂
７ａからなる絶縁性接着樹脂膜７ｂを入出力電極８を有
する回路基板９の上に張り付ける。First, as shown in FIG. 7, the insulating adhesive resin film 7b made of the insulating adhesive resin 7a is attached onto the circuit board 9 having the input / output electrodes 8.

【００４０】次いで、図２〜図４において、第１、第２
実施例と同様にして、図４に示す突起形状頂部４ａを有
する金線突起電極３を半導体装置１のアルミ電極２上に
形成する。この状態においては、突起形状頂部４ａは、
突起形状を有すると共に、金線としての弾力性を持って
いる。Next, referring to FIG. 2 to FIG.
Similar to the embodiment, the gold wire protruding electrode 3 having the protruding shape top portion 4a shown in FIG. 4 is formed on the aluminum electrode 2 of the semiconductor device 1. In this state, the protrusion-shaped top 4a is
In addition to having a protrusion shape, it has elasticity as a gold wire.

【００４１】次いで、図４に示す突起形状頂部４ａを有
する金線突起電極３をアルミ電極２上に形成した半導体
装置１を、前記の絶縁性接着樹脂膜７ｂを貼り付けた回
路基板９の上に位置決めして重ね合わせる。Next, the semiconductor device 1 in which the gold wire projecting electrode 3 having the projecting shape top portion 4a shown in FIG. 4 is formed on the aluminum electrode 2 is mounted on the circuit board 9 to which the insulating adhesive resin film 7b is attached. Position and stack.

【００４２】最後に、加熱と加圧とを同時に行って、図
７に示すように、前記の突起形状頂部４ａを有する金線
突起電極３を押しつぶし、押しつぶされた金線突起電極
４ｄの形状にして、前記の絶縁性接着樹脂膜７ｂを硬化
する。この状態では、前記の突起形状頂部４ａが押しつ
ぶされる際に、前記の硬化する前の絶縁性接着樹脂膜７
ｂを貫通して入出力電極８上に達し、金線突起電極３の
突起形状頂部４ａは、その形状に固有の弾力性を保持し
て、前記入出力電極８に押しつぶされた金線突起電極４
ｄとなって固定される。従って、金線突起電極３と入出
力電極８との間に、ヒートサイクルを受けても、信頼性
が高い電気的接続が維持される。電極に透明なＩＴＯを
使用し、且つ、紫外線等によって硬化する樹脂を接着樹
脂膜７ｂに使用すれば、耐熱性が無い回路基板への実装
が可能である。Finally, heating and pressurization are simultaneously performed to crush the gold wire protrusion electrode 3 having the protrusion-shaped top portion 4a into a shape of the crushed gold wire protrusion electrode 4d as shown in FIG. Then, the insulating adhesive resin film 7b is cured. In this state, when the protrusion-shaped top portion 4a is crushed, the insulating adhesive resin film 7 before being hardened is set.
The protrusion 4a of the gold wire protrusion electrode 3 penetrating b and reaching the input / output electrode 8 retains elasticity peculiar to the shape and is crushed by the input / output electrode 8 Four
It becomes d and is fixed. Therefore, even if a heat cycle is performed, a highly reliable electrical connection is maintained between the gold wire protruding electrode 3 and the input / output electrode 8. If transparent ITO is used for the electrodes and a resin that is cured by ultraviolet rays or the like is used for the adhesive resin film 7b, it is possible to mount it on a circuit board having no heat resistance.

【００４３】本発明の半導体装置の実装方法の第４実施
例を図２〜図４、図８、図９に基づいて説明する。A fourth embodiment of the semiconductor device mounting method of the present invention will be described with reference to FIGS. 2 to 4, 8 and 9.

【００４４】本実施例は、第１〜第３実施例が、金線突
起電極３と入出力電極８とを弾力的に接触させて、ヒー
トサイクルを受けても、信頼性が高い電気的接続を維持
しているのに対して、金線突起電極３と入出力電極８と
の間に金属間化合物を形成することによって、信頼性が
高い電気的機械的接続を構成すると共に、第１〜第３実
施例が必要な樹脂硬化時間を不要にする半導体装置の実
装方法である。In the present embodiment, in the first to third embodiments, the gold wire protruding electrode 3 and the input / output electrode 8 are elastically brought into contact with each other, and the electrical connection is highly reliable even when subjected to a heat cycle. In contrast to this, by forming an intermetallic compound between the gold wire protruding electrode 3 and the input / output electrode 8, a highly reliable electromechanical connection is formed, and The third embodiment is a semiconductor device mounting method that eliminates the required resin curing time.

【００４５】先ず、図８に示すように、回路基板９の入
出力電極８上にアルミ電極１５を形成する。First, as shown in FIG. 8, an aluminum electrode 15 is formed on the input / output electrode 8 of the circuit board 9.

【００４６】次いで、図２〜図４において、第１、第
２、第３実施例と同様にして、図４に示す突起形状頂部
４ａを有する金線突起電極３を半導体装置１のアルミ電
極２上に形成する。この状態においては、突起形状頂部
４ａは、突起形状を有すると共に、その形状に固有の弾
力性を持っている。2 to 4, the gold wire protrusion electrode 3 having the protrusion-shaped top portion 4a shown in FIG. 4 is replaced with the aluminum electrode 2 of the semiconductor device 1 in the same manner as in the first, second and third embodiments. Form on top. In this state, the protrusion-shaped top portion 4a has a protrusion shape and also has elasticity peculiar to the shape.

【００４７】次いで、回路基板９を加熱されたステージ
１９上に真空吸着によって固定する。Next, the circuit board 9 is fixed onto the heated stage 19 by vacuum suction.

【００４８】次いで、半導体装置１の突起形状頂部４ａ
を有する金線突起電極３と回路基板９のアルミ電極１５
とを位置合わせし、大きな容量の超音波振動子と増幅ホ
ーンとによる超音波振動を矢印１７の方向に加えながら
半導体装置１を回路基板９に加圧して、温度と超音波振
動と加圧とによって金とアルミニウムとの間に金属間結
合を発生させ、金属間結合した金線突起電極４ｅと入出
力電極８との間の電気的機械的結合を得る。１６は上記
の増幅ホーンに取付けられている吸着手段である。Next, the protrusion-shaped top portion 4a of the semiconductor device 1
Gold wire protruding electrode 3 and aluminum electrode 15 of circuit board 9
Are aligned, and the semiconductor device 1 is pressed against the circuit board 9 while applying ultrasonic vibration by a large-capacity ultrasonic vibrator and an amplification horn in the direction of arrow 17, and temperature, ultrasonic vibration, and pressure are applied. Thus, an intermetallic bond is generated between gold and aluminum, and an electromechanical bond between the gold wire protruding electrode 4e and the input / output electrode 8 which is intermetallic bonded is obtained. Reference numeral 16 is a suction means attached to the amplification horn.

【００４９】この場合、加圧と加熱と超音波振動とによ
って、接触している多数の電極間に金属間結合を発生さ
せ均一で良好な電気的機械的接合を得るには、多数の電
極間の各接触圧が均一に調整できることが必要である。
そのためには、多数の電極間が弾力性圧力によって接触
していることが都合が良い。In this case, in order to obtain a uniform and good electromechanical bonding between the many electrodes in contact with each other by applying pressure, heating and ultrasonic vibration, in order to obtain uniform and good electromechanical bonding, It is necessary that each contact pressure can be adjusted uniformly.
For that purpose, it is convenient that a large number of electrodes are in contact with each other by elastic pressure.

【００５０】本実施例では、金線によって構成された前
記突起形状頂部４ａはその形状に固有の弾力性を有して
いる。前記半導体装置１と前記回路基板９との平行度に
多少の狂いがあり、各電極の高さに多少の不揃いがあっ
ても、この弾力性が、多数の電極間の各接触圧を均一に
調整する作用を果たすので、必要な容量がある超音波発
振子と増幅ホーンとを使用すれば、前記突起形状頂部４
ａと前記入出力電極８上のアルミ電極１５との間に均一
で良好な金属間結合を形成することができる。In this embodiment, the protrusion-shaped top portion 4a made of a gold wire has elasticity peculiar to its shape. Even if there is some deviation in the parallelism between the semiconductor device 1 and the circuit board 9 and there is some unevenness in the height of the electrodes, this elasticity makes the contact pressures among the multiple electrodes uniform. Since the adjustment function is achieved, if the ultrasonic oscillator and the amplification horn having a necessary capacity are used, the protrusion-shaped top portion 4 can be obtained.
A uniform and good intermetallic bond can be formed between a and the aluminum electrode 15 on the input / output electrode 8.

【００５１】[0051]

【発明の効果】本願第１発明の半導体装置の実装方法
は、レベリング工程において、前記の突起形状頂部を略
平坦化する際に、前記略平坦化された面に対して前記導
電性微粒子の直径より少し小さい段差を有する凹部を前
記略平坦化された面に残しているので、前記半導体装置
を前記回路基板に対して加圧した場合に、前記導電性微
粒子が、前記凹部に確実に捕捉され、且つ、少し圧縮さ
れて弾力性を保持している状態で、前記金線突起電極と
前記入出力電極とに挟持される。このようにして、前記
導電性微粒子が弾力性を有していることにより、ヒート
サイクルが加えられても、電気的接合の高い信頼性を維
持できる半導体装置の実装が可能になるという効果を奏
する。According to the semiconductor device mounting method of the first invention of the present application, in the leveling step, when the projection-shaped top portion is substantially flattened, the diameter of the conductive fine particles with respect to the substantially flattened surface is set. Since the recess having a slightly smaller step is left on the substantially flattened surface, the conductive fine particles are reliably captured in the recess when the semiconductor device is pressed against the circuit board. Further, it is sandwiched between the gold wire protruding electrode and the input / output electrode in a state where it is slightly compressed and retains elasticity. In this way, since the conductive fine particles have elasticity, it is possible to mount a semiconductor device capable of maintaining high reliability of electrical connection even when a heat cycle is applied. .

【００５２】又、本願第１発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、金線突起電極上に残ったキャピラリーの先端跡に
よって形成すると、形成が簡単、容易であるという効果
を奏する。Further, the semiconductor device mounting method according to the first invention of the present application is easy to form by forming the recess having the step slightly smaller than the diameter of the conductive fine particles by the tip mark of the capillary remaining on the gold wire protruding electrode. The effect is that it is easy.

【００５３】又、本願第１発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、レベリング板に設けた円柱状の凸部により形成す
ると、前記凹部に捕捉される導電性微粒子の数が多くな
り、電気的接合の信頼性が、更に、向上するという効果
を奏する。Further, in the semiconductor device mounting method of the first invention of the present application, when the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by the cylindrical convex portion provided on the leveling plate, it is captured in the concave portion. The number of conductive fine particles is increased, and the reliability of electrical connection is further improved.

【００５４】本願第２発明の半導体装置の実装方法は、
本願第１発明の効果に加えて、導電性微粒子が少し圧縮
された状態で弾力性を維持していることを利用し仮加圧
仮硬化して半導体装置の電気特性を検査し、良品のみを
本加圧本硬化し、不良品を取り替えることができるとい
う効果を奏する。A method of mounting a semiconductor device according to the second invention of the present application,
In addition to the effect of the first invention of the present application, by utilizing the fact that the conductive fine particles maintain elasticity in a slightly compressed state, temporary pressure temporary curing is performed to inspect the electrical characteristics of the semiconductor device, and only good products are obtained. Main pressurization The main curing has an effect that a defective product can be replaced.

【００５５】本願第３発明の半導体装置の実装方法は、
金線によって構成される前記突起形状頂部が有する弾力
性を利用して、絶縁性接着樹脂膜を貫通して前記金線突
起電極と回路基板の入出力電極間に接触による電気的接
合を構成できるという効果を奏する。又、絶縁性接着樹
脂膜は光線の透過率が良いので、ＩＴＯ等の透明電極を
使用すれば、光線による硬化が可能であり、耐熱性が無
い回路基板への実装が可能になるという効果を奏する。A method of mounting a semiconductor device according to the third invention of the present application is
By utilizing the elasticity of the protrusion-shaped top portion formed of the gold wire, it is possible to form an electrical connection by penetrating the insulating adhesive resin film and contacting between the gold wire protrusion electrode and the input / output electrode of the circuit board. Has the effect. In addition, since the insulating adhesive resin film has a good light transmittance, it is possible to cure by light if a transparent electrode such as ITO is used, and it is possible to mount it on a circuit board that does not have heat resistance. Play.

【００５６】本願第４発明の半導体装置の実装方法は、
金線によって構成される前記突起形状頂部が有する弾力
性と超音波振動とを利用して、従来例では必要な別工程
における加熱硬化時間を不要にして、生産性を向上でき
るという効果を奏する。A method of mounting a semiconductor device according to the fourth invention of the present application is
Utilizing the elasticity and ultrasonic vibration of the protrusion-shaped top formed of a gold wire, the effect of improving the productivity by eliminating the heat-curing time in another step which is required in the conventional example is obtained.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の半導体装置の実装方法の第１、第２実
施例を使用して実装された半導体装置の断面図である。FIG. 1 is a cross-sectional view of a semiconductor device mounted by using first and second embodiments of a semiconductor device mounting method of the present invention.

【図２】本発明の半導体装置の実装方法の金線突起電極
形成工程を示す断面図である。FIG. 2 is a cross-sectional view showing a gold wire protrusion electrode forming step of the semiconductor device mounting method of the present invention.

【図３】本発明の半導体装置の実装方法の金線突起電極
形成工程を示す断面図である。FIG. 3 is a cross-sectional view showing a gold wire protruding electrode forming step of the method for mounting a semiconductor device of the present invention.

【図４】本発明の半導体装置の実装方法の金線突起電極
の正面図である。FIG. 4 is a front view of a gold wire protruding electrode in a method for mounting a semiconductor device according to the present invention.

【図５】本発明の半導体装置の実装方法のレベリング工
程の一例を示す正面図である。FIG. 5 is a front view showing an example of a leveling step of the semiconductor device mounting method of the present invention.

【図６】本発明の半導体装置の実装方法のレベリング工
程の他の例を示す正面図である。FIG. 6 is a front view showing another example of the leveling step of the semiconductor device mounting method of the present invention.

【図７】本発明の半導体装置の実装方法の第３実施例を
使用して実装された半導体装置の正面図である。FIG. 7 is a front view of a semiconductor device mounted by using a third embodiment of the semiconductor device mounting method of the present invention.

【図８】本発明の半導体装置の実装方法の第４実施例の
動作を示す正面図である。FIG. 8 is a front view showing the operation of the fourth embodiment of the semiconductor device mounting method of the present invention.

【図９】本発明の半導体装置の実装方法の第４実施例を
使用して実装された半導体装置の正面図である。FIG. 9 is a front view of a semiconductor device mounted using a fourth embodiment of the semiconductor device mounting method of the present invention.

【図１０】従来例の半導体装置の実装方法を使用して実
装された半導体装置の正面図である。FIG. 10 is a front view of a semiconductor device mounted using a conventional semiconductor device mounting method.

【符号の説明】[Explanation of symbols]

１ 半導体装置 ２ アルミ電極 ３ 金線突起電極 ４ａ 突起状頂部 ４ｂ 平坦化頂部 ４ｃ 凹部付平坦化頂部 ４ｄ 押しつぶされた金線突起電極 ４ｅ 金属間結合した金線突起電極 ５ 凹部 ６ 導電性微粒子 ６ａ 押しつぶされた導電性微粒子 ７ 異方性導電膜 ７ａ 絶縁性接着樹脂 ７ｂ 接着樹脂膜 ８ 入出力電極 ９ 回路基板 １０ キャピラリー １１ 金線 １２ レベリング板 １３ 円柱状凸部 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Aluminum electrode 3 Gold wire projection electrode 4a Projection top 4b Flattening top 4c Flattening top with recess 4d Crushed gold wire projection electrode 4e Metal wire-bonded gold wire projection electrode 5 Recess 6 Conductive particle 6a Crushed Conductive fine particles 7 Anisotropic conductive film 7a Insulating adhesive resin 7b Adhesive resin film 8 Input / output electrodes 9 Circuit board 10 Capillary 11 Gold wire 12 Leveling plate 13 Cylindrical convex part

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂に導電性微粒子を絶縁性を損なわない程度に少量分散
させたものからなる異方性導電膜を貼り付ける異方性導
電膜貼付工程と、レベリング板を前記半導体装置の金線
突起電極の突起形状頂部に押し当て、前記突起形状頂部
を略平坦化する際に、前記の略平坦化された面に対して
前記導電性微粒子の直径より少し小さい段差を有する凹
部を前記略平坦化された面に残すレベリング工程と、前
記金線突起電極と前記回路基板の入出力電極とを位置合
わせした後、前記半導体装置を前記回路基板に押圧し加
熱して前記異方性導電膜を硬化させる押圧加熱工程とを
有することを特徴とする半導体装置の実装方法。1. A gold wire protrusion having a protrusion-shaped top by forming a gold ball on the tip of a gold wire by thermal energy, bonding the gold ball onto an electrode of a semiconductor device by a capillary, and then loop-moving the capillary. Anisotropic process of forming gold wire protrusion electrodes to form electrodes and an anisotropic conductive film consisting of insulating adhesive resin with conductive fine particles dispersed in a small amount to the extent that insulation is not impaired Step of attaching a conductive conductive film, pressing a leveling plate against the protrusion-shaped top portion of the gold wire protrusion electrode of the semiconductor device, and substantially flattening the protrusion-shaped top portion, with respect to the substantially flattened surface, After the leveling step of leaving a recess having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface and aligning the gold wire protruding electrode with the input / output electrode of the circuit board, And a heating step of pressing a conductor device against the circuit board to heat the anisotropic conductive film to cure the anisotropic conductive film. 【請求項２】 導電性微粒子の直径より少し小さい段差
を有する凹部は、金線突起電極上に残ったキャピラリー
の先端跡からなる請求項１に記載の半導体装置の実装方
法。2. The method for mounting a semiconductor device according to claim 1, wherein the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by a trace of the tip of the capillary remaining on the gold wire protruding electrode. 【請求項３】 導電性微粒子の直径より少し小さい段差
を有する凹部は、レベリング板に設けた円柱状の凸部に
より形成される請求項１に記載の半導体装置の実装方
法。3. The method for mounting a semiconductor device according to claim 1, wherein the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by a cylindrical convex portion provided on the leveling plate. 【請求項４】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂に導電性微粒子を絶縁性を損なわない程度に少量分散
させたものからなる異方性導電膜を貼り付ける異方性導
電膜貼付工程と、レベリング板を前記半導体装置の金線
突起電極の突起形状頂部に押し当て、前記突起形状頂部
を略平坦化する際に、前記の略平坦化された面に対して
前記導電性微粒子の直径より少し小さい段差を有する凹
部を前記略平坦化された面に残すレベリング工程と、前
記金線突起電極と前記回路基板の入出力電極とを位置合
わせした後、仮加圧仮硬化する仮加圧硬化工程と、電気
特性を検査する検査工程と、検査結果が良の場合に本加
圧本硬化する本加圧硬化工程と、検査結果が不良の場合
に不良半導体装置を取り替える取替え工程とを有するこ
とを特徴とする半導体装置の実装方法。4. A gold wire protrusion having a protrusion-shaped top by forming a gold ball at the tip of a gold wire by thermal energy, bonding the gold ball onto an electrode of a semiconductor device by a capillary, and then loop-moving the capillary. Anisotropic process of forming gold wire protrusion electrodes to form electrodes and an anisotropic conductive film consisting of insulating adhesive resin with conductive fine particles dispersed in a small amount to the extent that insulation is not impaired Step of attaching a conductive conductive film, pressing a leveling plate against the protrusion-shaped top portion of the gold wire protrusion electrode of the semiconductor device, and substantially flattening the protrusion-shaped top portion, with respect to the substantially flattened surface, Temporary pressing after aligning the gold wire protruding electrode and the input / output electrode of the circuit board with a leveling step of leaving a concave portion having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface A temporary pressure curing step of temporary curing, an inspection step of inspecting electrical characteristics, a main pressure curing step of main pressure main curing when the inspection result is good, and a defective semiconductor device when the inspection result is defective A method for mounting a semiconductor device, comprising: a step of replacing the semiconductor device. 【請求項５】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂からなる絶縁性接着樹脂膜を貼り付ける絶縁性接着樹
脂膜貼付工程と、前記金線突起電極と前記回路基板の入
出力電極とを位置合わせ後、前記半導体装置を前記回路
基板に押圧し加熱又は光線により前記絶縁性接着樹脂膜
を硬化させる押圧硬化工程とを有することを特徴とする
半導体装置の実装方法。5. A gold ball having a projection-shaped top portion is formed by forming a gold ball on the tip of a gold wire by thermal energy, bonding the gold ball onto an electrode of a semiconductor device by a capillary, and then loop-moving the capillary. Gold wire protruding electrode forming step of forming an electrode, an insulating adhesive resin film sticking step of sticking an insulating adhesive resin film made of an insulating adhesive resin on a circuit board, the gold wire protruding electrode and the circuit board A pressure-setting step of pressing the semiconductor device against the circuit board after the alignment with the input / output electrodes and hardening the insulating adhesive resin film by heating or light rays. 【請求項６】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の全電極上にそれぞれ押圧し、加圧と加熱と超音波振
動とにより前記金ボールと前記電極とを金属間結合で電
気的機械的に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板の入出力電極上にア
ルミ電極を形成するアルミ電極形成工程と、前記金線突
起電極と前記回路基板の入出力電極とを位置合わせした
後、前記半導体装置を前記回路基板に押圧し加熱と超音
波振動とにより前記金線突起電極と前記入出力電極上の
アルミ電極とを金属間結合で電気的機械的に接合する接
合工程とを有することを特徴とする半導体装置の実装方
法。6. A gold ball is formed on the tip of a gold wire by thermal energy, and the gold ball is pressed against all electrodes of a semiconductor device by a capillary, and the gold ball is pressed by heating, heating and ultrasonic vibration. A gold wire protrusion electrode forming step of forming a gold wire protrusion electrode having a protrusion-shaped top by loop-moving the capillary after electro-mechanically bonding the electrode to each other by metal bonding, and an input / output electrode of a circuit board. After the aluminum electrode forming step of forming an aluminum electrode on the upper surface and the gold wire protruding electrode and the input / output electrodes of the circuit board are aligned, the semiconductor device is pressed against the circuit board by heating and ultrasonic vibration. A method of mounting a semiconductor device, comprising: a bonding step of electrically and mechanically bonding the gold wire protruding electrode and the aluminum electrode on the input / output electrode by intermetallic bonding.
JP10275995A 1995-04-26 1995-04-26 Semiconductor device mounting method Expired - Fee Related JP3347911B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10275995A JP3347911B2 (en) 1995-04-26 1995-04-26 Semiconductor device mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10275995A JP3347911B2 (en) 1995-04-26 1995-04-26 Semiconductor device mounting method

Publications (2)

Publication Number Publication Date
JPH08298271A true JPH08298271A (en) 1996-11-12
JP3347911B2 JP3347911B2 (en) 2002-11-20

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100357757B1 (en) * 1997-11-21 2003-01-24 로무 가부시키가이샤 Semiconductor device and its manufacturing method
EP1156520A4 (en) * 1999-01-29 2004-08-25 Matsushita Electric Ind Co Ltd Electronic parts mounting method and device therefor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100357757B1 (en) * 1997-11-21 2003-01-24 로무 가부시키가이샤 Semiconductor device and its manufacturing method
EP1156520A4 (en) * 1999-01-29 2004-08-25 Matsushita Electric Ind Co Ltd Electronic parts mounting method and device therefor
US6926796B1 (en) 1999-01-29 2005-08-09 Matsushita Electric Industrial Co., Ltd. Electronic parts mounting method and device therefor
US7683482B2 (en) 1999-01-29 2010-03-23 Panasonic Corporation Electronic component unit
US8007627B2 (en) 1999-01-29 2011-08-30 Panasonic Corporation Electronic component mounting method and apparatus

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