JPH08289325A - Video signal processor - Google Patents

Abstract

PURPOSE: To provide a video signal processor of a simple constitution which can eliminate the disturbance caused by the interpolation processing of a color difference signal and also can attain the high image resolution when the color difference signal that undergone its band compression through the offset subsampling is restored. CONSTITUTION: A field difference detection circuit 21 detects a field difference by securing matching of phases for the color difference signals of MUSE signals that undergone the offset subsampling. A correlation decision circuit 22 decides the correlation between the fields based on its output. Then a selection circuit 14 performs the switching of outputs between an inter-field interpolation circuit 12 and an intra-field interpolation circuit 13 by means of a control signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing apparatus for restoring a video signal band-compressed by an offset sub-sampling technique, for example, a video signal processing apparatus for restoring a moving area process of a color difference signal of a MUSE signal.

[0002]

2. Description of the Related Art In recent years, high-definition test broadcasting by the MUSE method has been carried out, and high-definition is becoming a familiar existence. In the current MUSE transmission system, the amount of image information is band-compressed by the offset sub-sampling technology and the image is transmitted. At this time, different processing is performed in a still area (still area) and a moving area (moving area) of the image. In the still area, the video signal is 4
Video is reproduced by dividing the data into fields and transmitting them, and interpolating them (interpolation between fields) using a frame memory on the decoder side. On the other hand, in the moving area, the video is reproduced on the decoder side using only the pixels in the field (field interpolation). Therefore, in principle, the moving area has a lower resolution than the stationary area. Further, in the color difference signal processing, the processing is simplified in order to reduce the hardware of the decoder, which promotes the deterioration of the resolution of the color difference signal in the moving area in the current method.

On the other hand, in order to obtain a beautiful image, it is necessary to improve the color difference signal in the moving image area. As one method, inter-field interpolation is performed instead of field interpolation to reduce the moving area of the color difference signal. There are suggestions to improve the resolution.

As an example of the above-mentioned video signal processing device, "study on color difference signal processing of MUSE system" (IEICE Transactions BI, vol.J76-BI, No.3, pp.290-29)
8, March 1993).

According to this conventional example, a field memory is used on the encoder side to perform a filtering process between fields so as to be completed within a frame to compress a band in the time axis direction. Further, by offset sub-sampling, information of one frame is divided into two fields and transmitted. On the decoder side, a field memory is used to interpolate between two fields to reproduce a video.

As a result, the bandwidth in the time axis direction is reduced to half in the encoder and the decoder. Instead, when compared in the horizontal / vertical two-dimensional frequency space excluding the time axis in the above-mentioned conventional proposed method, a band twice as large as the current method (corresponding to the band of the color difference signal) can be transmitted and the resolution is improved. be able to.

[0007]

However, in the above-mentioned configuration, the current method extends the time-direction band up to 30 Hz. However, in the above-mentioned conventional proposed method, the time-direction band is compressed to subsample points. However, it is limited to 15 Hz because the video which is different is transmitted in two fields and the video is processed in frame units. Regarding the band in the time direction, there is no problem because the band is the same in the combination of the encoder and the decoder of the current system or the encoder and the decoder of the proposed system. However, the band in the time direction is different in the combination of the current encoder and the proposed decoder. For example, the current system encoder generates an image with a time band of 30 Hz, and the proposed system decoder handles a time band of 15 Hz. That is, although the current system encoder sends different video for each field, it is assumed that the decoder in the proposed system compresses the band in the time direction, and the field between the Nth field video and the N + 1th field video is assumed. Perform interpolation processing. As a result,
In the combination of the current system encoder and the proposed system decoder,
There is a problem that a double image is generated when a highly saturated image moves.

As an example, in inter-field interpolation in the proposed decoder, sampling phases are different as shown in FIG.
Signal 70 of N field and signal 71 of N + 1 field
By interpolating and interpolating with each other, the inter-field interpolated signal 73 is generated.

On the other hand, since the current encoder handles an image having a band of 30 Hz in the time direction, as shown in FIG. 8, the image 80 of the Nth field and the image 81 of the N + 1th field are
Strictly speaking, the images are different in terms of time. As a result, there is no problem if the object does not move very fast, but as shown in the figure, when reproducing the very fast motion of the object, after inter-field interpolation from two fields with different states, There is a problem in that the image 82 is reproduced, a double image is generated, and interference occurs such that a continuous line becomes a broken line.

In view of the above, the present invention focuses on the fact that the interpolated signal 72 does not cause any interference and the inter-field interpolated signal 73 has a high resolution.
This is obtained by considering inter-field interpolation and field interpolation in the moving region processing of the color difference signal and switching the interpolation method by the control signal to remove interference and simultaneously achieve high resolution. .

Therefore, in view of the above-mentioned problems of the prior art, the present invention can realize a higher resolution in the moving region processing of the color difference signal than the conventional one, and further can remove the interference more than the conventional one. The purpose is to provide a device.

[0012]

In order to solve the above problems, a video signal processing apparatus of the present invention comprises a field memory for delaying a video signal by one field, and a field memory for interpolating a video signal in the field. An interpolating circuit, an inter-field interpolating circuit for inter-field interpolating with an inter-field video signal, a field difference detecting circuit for outputting a difference between an input signal and an output signal of the field memory, and an output of the field difference detecting circuit. And a selection circuit that receives the output of the determination circuit and switches between the output of the field interpolation circuit and the output of the inter-field interpolation circuit.

Further, the video signal processing device of the present invention comprises a field memory for delaying the video signal by one field,
Outputs the field intensity of the output signal of the field interpolation circuit that interpolates the field with the video signal in the field, the inter-field interpolation circuit that interpolates the field with the video signal between the fields, and the output signal of the inter-field interpolation circuit Frequency detecting circuit, a discriminating circuit for outputting a control signal using the output of the frequency detecting circuit, an output of the field interpolation circuit and an output of the inter-field interpolating circuit in response to the output of the discriminating circuit And a selection circuit for switching between and.

Further, the video signal processing device of the present invention comprises a field memory for delaying the video signal by one field,
A field interpolation circuit that interpolates a field with a video signal in a field, an inter-field interpolation circuit that interpolates a field with a video signal between fields, and a control signal that detects a switching signal convoluted with the signal. Discrimination circuit,
A selection circuit for receiving the output of the control signal discrimination circuit and switching the output of the field interpolation circuit and the output of the interfield interpolation circuit is provided.

[0015]

According to the first aspect of the present invention, when the video signal band-compressed by the offset sub-sampling is restored, the field memory delays the video signal by one field and the field interpolation circuit uses the video signal in the field. Field interpolation, inter-field interpolation circuit inter-field interpolation with field-to-field video signal, field difference detection circuit outputs difference between input signal and output signal of the field memory, discrimination circuit the field difference detection circuit The control circuit outputs the control signal by using the output of the above, and the selection circuit receives the output of the determination circuit and switches the output of the field interpolation circuit and the output of the interfield interpolation circuit.

Thereby, for example, the band in the time axis direction is 1
In the case of a 5 Hz video signal, the difference value between fields becomes small, and interfield interpolation is applied (for example, in frame units), so that the resolution can be improved. Also, the band is 30Hz
Field interpolation can be applied to the video signal of (e.g., frame by frame) to remove the occurrence of interference.

According to the present invention of claim 4, when the video signal band-compressed by the offset sub-sampling is restored, the field memory delays the video signal by one field, and the field interpolation circuit uses the video signal in the field. Inter-field interpolation, inter-field interpolation circuit inter-field interpolation with video signals between fields, frequency detection circuit outputs frequency strength of output signal of the inter-field interpolation circuit, and signal strength determination circuit detects the frequency. The output of the circuit is used to output a control signal, and the selection circuit receives the output of the signal strength determination circuit and switches the output of the field interpolation circuit and the output of the interfield interpolation circuit.

As a result, for example, inter-field interpolation can be applied to a video without interference to improve the resolution. In addition, field interpolation may be applied to the image in which interference has occurred to eliminate the occurrence of interference.

According to the present invention of claim 7, when the video signal band-compressed by the offset sub-sampling is restored, the field memory delays the video signal by one field and the field interpolation circuit uses the video signal within the field. Field interpolating, inter-field interpolating circuit inter-field interpolating with field-to-field video signal, control signal discriminating circuit detects switching signal convoluted with the signal, selection circuit outputs control signal discriminating circuit In response to this, the output of the field interpolation circuit and the output of the interfield interpolation circuit are switched.

Thus, for example, the band in the time axis direction is 15 based on the switching signal convoluted with the video signal.
Inter-field interpolation can be applied to the Hz video signal to improve the resolution. Also, field interpolation can be applied to a video signal having a band of 30 Hz to remove the occurrence of interference.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A video signal processing apparatus according to an embodiment of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram of moving area processing of a color difference signal of a video signal processing apparatus according to a first embodiment of the present invention. In FIG. 1, reference numeral 10 is an input terminal to which a video signal is input. A field memory 11 stores a video signal for one field. An inter-field interpolation circuit 12 performs inter-field interpolation. Reference numeral 13 is a field interpolation circuit for performing interpolation within the field. Reference numeral 14 is a selection circuit for switching the outputs from the inter-field interpolation circuit 12 and the field interpolation circuit 13. 1
An output terminal 5 outputs a high-definition television signal. 16
Is a switch for switching the video signal. Reference numeral 17 denotes a moving area detection circuit that detects a moving area. Reference numeral 21 is a field difference detection circuit for obtaining a field difference. Reference numeral 22 is a discriminating circuit which discriminates the correlation between the fields based on the output from the field difference detecting circuit 21.

FIG. 4 is a block diagram of the field difference detection circuit 21 in the first embodiment. Reference numeral 60 denotes an input terminal for inputting the Nth field video signal. 61
Is an input terminal for inputting the video signal of the (N + 1) th field. Reference numerals 51 and 52 are delay elements that delay the signal by one sampling time. 53 is an adder. 55 is a divider. 57 is a differentiator. Reference numeral 59 is a switch.
62 is an output terminal.

FIG. 5 is a block diagram of the discrimination circuit 22 in the first embodiment. In FIG. 5, 90 is an input terminal. 91 is an adder. Reference numeral 92 is a comparator, and 93 is a multiplier. 94 is a latch. Reference numeral 95 is an output terminal. Reference numeral 96 is a hold signal for controlling on / off of the signal taking operation of the latch 94.

The operation of the video signal processing apparatus configured as described above will be described below with reference to FIGS. 1, 4, and 5. The MUSE signal is band-compressed by offset subsampling. MUSE input from input terminal 10
The signal is output by the field memory 11 with a video signal delayed by an amount corresponding to the time of one field. That is, the video signal output from the field memory 11
Assuming an N field video signal, the video signal input to the field memory 11 at that time is an N + 1 field video signal. Two field memories 11 are used,
By switching the switch 16 for each field, it is possible to interpolate between two fields, that is, one frame, using the same video signal. That is, N
If the A field and the B field are used in the processing of the field field, the same A field and B field can be used in the N + 1 field by switching the switch 16. In addition, since the time-direction band of the image generated by the encoder of the proposed method is 15 Hz, when the encoder of the proposed method is used, the same image is switched by the switch 16 and two types of images having different sub-sampling points are used. The signal can be used for inter-field interpolation. The inter-field interpolation circuit 12 extracts video signals from the front and back of the field memory 11. Then, the video signal for two fields is interpolated and the video is output. On the other hand, the field interpolation circuit 13 receives only the output from the field memory 11 and interpolates a video signal of only one field to output a video. Here, since the N field and the N + 1 field are offset-sampled, the sampling phases are different. Therefore, the field difference detection circuit 2
In No. 1, the offset sub-sampled video signals of the N field and the N + 1 field are matched in sampling phase, and then the difference between the video signals between the fields is output.
The discriminating circuit 22 receives the difference value from the field difference detecting circuit 21, and the calculation using the difference value is performed only when the predetermined output from the moving area detecting circuit 17 is received.

That is, the discrimination circuit 22 is the moving area detection circuit 1
In response to the output of 7, the switching signal is output according to the magnitude of the average value of the difference in the moving area. That is, when the average value of the differences is larger than the set value, it is determined that there is no correlation, and when the average value is small, it is determined that there is correlation, and the selection circuit 14
The switching signal is output to.

Here, the average value of the differences is calculated so that the determination of the presence or absence of the correlation does not depend on the area of the moving region and that the switching signal to the selection circuit 14 is stabilized. is there.

The selection circuit 14 selects the output from the inter-field interpolation circuit 12 when there is a correlation by the switching signal from the correlation determination circuit 22, and selects the output from the field interpolation circuit 13 when there is no correlation. . Further, the selected signal is output terminal 1 as a reproduced high-definition television signal.
It is output to 5.

If it is not necessary to consider the above purpose, the discriminating circuit 22 determines that the field difference detecting circuit 21
Also, the configuration may be such that, when the difference value from 1 is received, it is simply judged that there is no correlation when the value is larger than the set value, and when there is a small value, there is a correlation and a switching signal is output to the selection circuit 14. Good.

Regarding the operation of the field difference detection circuit 21, the video signal before interpolation is offset-sampled, and as shown in FIG.
And the signal 71 in the (N + 1) th field have different horizontal sampling positions. In this case, the sampling time of the signal 71 in the (N + 1) th field is delayed by 0.5 sampling time. The field difference detection circuit 21 performs the following processing to obtain the difference between the signal 70 of the Nth field and the signal 71 of the N + 1th field. That is, N
With respect to the field signal, adjacent pixels are extracted using the delay element 51 that delays by one sampling time, and the average value of the extracted pixels is calculated by the adder 53 and the divider 55. Furthermore, the signal 70 of the Nth field and N + 1
The positional relationship with the signal 71 of the field is matched by the delay element 52 and the switch 59, and the difference is output. Further, the discrimination circuit 22 receives the difference value from the field difference detection circuit 21 at the input terminal 90. The adder 91 forms a cyclic filter that adds and averages K times the difference value up to the previous time and the difference value up to the previous time, and stabilizes the control. Further, the comparator 92 compares it with a threshold value to determine the correlation. Then, in the latch 94, the hold signal 96 from the moving area detection circuit 17 is used to average the difference values only in the moving area.

At this time, in the video from the encoder of the current system, the N field signal 70 and the N + 1 field signal 71 are different, the field difference becomes large, and the video signal 72 interpolated in the field is output. In this case, since the signals of the same field are interpolated and filtered, there is no problem that a double image is generated. Also, in the video from the proposed encoder, the field difference becomes small and the inter-field interpolated signal is output. As a result, 2
It is possible to improve the resolution by reproducing an image from the signal for the field.

As described above, according to the present embodiment, the field memory for delaying the video signal by one field, the field interpolation circuit for interpolating the field with the video signal within the field, and the field with the video signal between fields are used. An inter-field interpolating circuit for interpolating, a field difference detecting circuit for outputting a difference between an input signal and an output signal of the field memory, and a discriminating circuit for receiving an output of the field difference detecting circuit and outputting a control signal, By providing a selection circuit that switches between the output of the field interpolation circuit and the output of the inter-field interpolation circuit in response to the output of the discrimination circuit, in the video from the proposed encoder, inter-field interpolation is applied and the resolution is increased. Of the current encoder, field interpolation is applied to the video from the current encoder to eliminate the occurrence of interference. It is possible.

Further, the discrimination circuit 22 averages the field differences for one unit time or longer, and outputs a switching signal to the selection circuit 14 according to the magnitude of the average value, thereby improving the stability of switching control. .

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram of moving area processing of color difference signals of a video signal processing apparatus showing a second embodiment of the present invention. The difference from FIG. 1 is that a frequency detection circuit 31 for detecting the frequency of the output signal of the inter-field interpolation circuit 12 is provided. 2, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 6 is an internal block diagram of the frequency detection circuit 31 of the second embodiment. In FIG. 6, 63 is an input terminal and 64 is an output terminal. A delay element 65 delays the signal by one sampling time. 66 is a differentiator.

The operation of the video signal processing apparatus configured as described above will be described below with reference to FIGS. 2, 6, and 5. The MUSE signal input from the input terminal 10 is output by the field memory 11 with a video signal delayed by an amount corresponding to the time of one field. By using two field memories 11 and switching the switch 16 for each field, two fields, that is, one frame time,
Interpolation between fields can be performed using the same video signal. The inter-field interpolation circuit 12 interpolates a video signal of two fields, that is, the video signal of the current field output from the field memory 11 and the video signal of the next field input to the field memory 11, and outputs a video. . On the other hand, the field interpolation circuit 13 receives only the output from the field memory 11 and interpolates a video signal of only one field to output a video. Here, the frequency detection circuit 31 extracts a signal having a frequency equal to or higher than a specified value of the video signal from the inter-field interpolation circuit 12. Further, in the discriminating circuit 22, the frequency detecting circuit 31 and the moving area detecting circuit 17 select the signal from the field interpolating circuit 13 when the strength of the signal taken out in the moving area is equal to or more than the specified value, When the value is less than the value, a switching signal for selecting the signal from the inter-field interpolation circuit 12 is output to the selection circuit 14.

At this time, since the current field image and the next field image are different in the high-saturation image and the fast-moving image, the output from the inter-field interpolation circuit 12 is sampled like the inter-field interpolation signal 73 in FIG. 1/2 of frequency
The interference signal of the frequency of is output. Therefore, in the frequency detection circuit 31, in order to detect a signal having a frequency that is ½ of the sampling frequency, the difference element 66 subtracts signals that differ by one sample time in the delay element 65. The difference value becomes the intensity of a frequency that is ½ of the sampling frequency. If this value is large, it is determined that an interfering signal has occurred, and the video signal interpolated in the field is output. In this case, there is no problem that a double image is generated. Also, the video from the current encoder has less high frequency components, and the inter-field interpolated signal is output. As a result, it is possible to improve the resolution by reproducing an image from a signal for two fields.

Further, as in the first embodiment, the discrimination circuit 22
By averaging the signal intensities for one unit time or longer and outputting the switching signal to the selection circuit 14 according to the magnitude of the average value, the stability of the switching control can be improved.

As described above, according to this embodiment, the field memory for delaying the video signal by one field, the field interpolation circuit for interpolating the field with the video signal within the field, and the field with the video signal between fields are used. An inter-field interpolation circuit for interpolating, a frequency detection circuit for outputting the frequency intensity of the output signal of the inter-field interpolation circuit, a discrimination circuit for receiving the output of the frequency detection circuit and outputting a control signal, By providing a selection circuit that switches between the output of the field interpolation circuit and the output of the inter-field interpolation circuit in response to the output of the discrimination circuit, inter-field interpolation is applied to the video from the proposed encoder to determine the resolution. Improvements can be realized and field interpolation can be applied to the video from current encoders to eliminate the occurrence of jamming.

(Third Embodiment) A third embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram of moving area processing of color difference signals of a video signal processing apparatus showing a third embodiment of the present invention. The difference from FIG. 1 is that a control signal discriminating circuit 41 for detecting the control signal convoluted with the MUSE signal is provided.
In FIG. 3, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The operation of the video signal processing device configured as described above will be described below with reference to FIG. The MUSE signal input from the input terminal 10 is the field memory 1
By 1, the video signal is delayed by an amount corresponding to the time of one field and output. By using two field memories 11 and switching the switch 16 for each field,
Two fields, that is, one frame, can be interpolated between fields using the same video signal. The inter-field interpolation circuit 12 interpolates a video signal of two fields, that is, the video signal of the current field output from the field memory 11 and the video signal of the next field input to the field memory 11, and outputs a video. . on the other hand,
The field interpolation circuit 13 receives only the output from the field memory 11 and interpolates a video signal of only one field to output a video. Here, the control signal discriminating circuit 41 detects the control signal convoluted with the MUSE signal, and outputs the switching signal to the selecting circuit 14.

At this time, on the encoder side, the current system in which the time-direction band is 30 Hz and the time-direction band is 15 Hz
The control signal for discriminating the proposed method is convolved with the MUSE signal. As a result, in the video signal encoded by the current method, the video signal interpolated in the field is output.
In this case, there is no problem that a double image is generated,
It can support the current encoder and the proposed encoder.

As described above, according to this embodiment, the field memory for delaying the video signal by one field, the field interpolation circuit for interpolating the field with the video signal in the field, and the field with the video signal between the fields are used. Inter-field interpolation circuit for interpolating, control signal discrimination circuit for detecting a switching signal convoluted with the signal, output of the control signal discrimination circuit and output of the field interpolation circuit and the inter-field By providing a selection circuit that switches between the output of the interpolation circuit, inter-field interpolation can be applied to the proposed encoder to improve resolution, and field interpolation can be applied to the current encoder. The occurrence of interference can be eliminated.

[0046]

As is apparent from the above description, the present invention has an advantage that a higher resolution can be realized in the moving region processing of the color difference signals than in the prior art, and the interference can be further removed in comparison with the prior art. Have.

[Brief description of drawings]

FIG. 1 is a block diagram of moving region processing of a color difference signal in a video signal processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of moving region processing of color difference signals in a video signal processing device according to a second embodiment of the present invention.

FIG. 3 is a block diagram of moving region processing of color difference signals in a video signal processing device according to a third embodiment of the present invention.

FIG. 4 is a block diagram of a field difference detection circuit according to the first embodiment of the present invention.

FIG. 5 is a block diagram of a discrimination circuit in the first and second embodiments of the present invention.

FIG. 6 is a block diagram of a frequency detection circuit according to a second embodiment of the present invention.

FIG. 7 shows a video signal interpolated between fields and a video signal interpolated between fields in the conventional example and the present invention.

FIG. 8 is a conceptual diagram illustrating the occurrence of interference in the conventional example.

[Explanation of symbols]

 10 ... Input terminal 11 ... Field memory 12 ... Inter-field interpolation circuit 13 ... Field interpolation circuit 14 ... Selection circuit 21 ... Field difference detection circuit 22 ... Discrimination circuit 31 ... Frequency detection circuit 41 ..Control signal discrimination circuits

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Yuichi Ninomiya 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Institute of Broadcasting Technology, Japan Broadcasting Corporation (72) Koichi Yamaguchi 1-10-11 Kinuta, Setagaya-ku, Tokyo Broadcasting Technology Institute of Japan Broadcasting Corporation (72) Inventor Yoshinori Izumi 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside Broadcasting Technology Laboratory of Japan Broadcasting Association (72) Inventor Seiichi Koshi 1-chome Kinuta, Setagaya-ku, Tokyo No. 10-11 Broadcasting Technology Institute of Japan Broadcasting Corporation (72) Inventor Masahide Naemura 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside Broadcasting Technology Laboratory of Japan Broadcasting Association (72) Atsushi Fukuda Kinuta Setagaya-ku, Tokyo 1-10-11 Japan Broadcasting Corporation Broadcasting Technology Laboratory

Claims (7)

[Claims] 1. When restoring a video signal band-compressed by offset subsampling, the video signal is set to 1
A field memory for field delay, a field interpolation circuit for field interpolation with a video signal in the field, an interfield interpolation circuit for interfield interpolation with a video signal between fields, and an input signal of the field memory A field difference detection circuit that outputs a difference between output signals; a discrimination circuit that outputs a control signal using the output of the field difference detection circuit; and an output of the field interpolation circuit that receives the output of the discrimination circuit. And a selection circuit for switching between the output of the inter-field interpolation circuit and the video signal processing device. 2. When the discriminating circuit discriminates that the value based on the output of the field difference detecting circuit is larger than a predetermined reference, the discriminating circuit also outputs a control signal for switching to the output of the field interpolating circuit. The video signal processing device according to claim 1, wherein when the value based on the output is determined to be smaller, a control signal for switching to the output of the inter-field interpolation circuit is output. 3. The video signal according to claim 1, wherein the discrimination circuit averages the differences for one unit time or more and a plurality of hours and outputs a control signal according to the magnitude of the average. Processing equipment. 4. When restoring a video signal band-compressed by offset subsampling, the video signal is set to 1
A field memory for field delay, a field interpolation circuit for field interpolation with a video signal in the field, an inter-field interpolation circuit for inter-field interpolation with a video signal between fields, and the inter-field interpolation circuit A frequency detection circuit that outputs the frequency strength of the output signal, a signal strength determination circuit that outputs a control signal using the output of the frequency detection circuit, and a field interpolation circuit that receives the output of the signal strength determination circuit And a selection circuit that switches the output of the inter-field interpolation circuit and the output of the inter-field interpolation circuit. 5. The signal strength discriminating circuit, when the value based on the output of the frequency detecting circuit is discriminated to be larger than a predetermined reference, the control signal for switching to the output of the field interpolating circuit, The video signal processing device according to claim 4, wherein when it is determined that the value based on the output is smaller, a control signal for switching to the output of the inter-field interpolation circuit is output. 6. The signal strength discriminating circuit averages the intensities for one unit time or more and a plurality of hours, and outputs a control signal according to the magnitude of the average. Video signal processing device. 7. When restoring a video signal band-compressed by offset subsampling, the video signal is set to 1
Field memory for field delay, field interpolation circuit for field interpolation with video signal in field, inter-field interpolation circuit for inter-field interpolation with video signal between fields, A control signal discriminating circuit that detects a switching signal; and a selection circuit that receives an output of the control signal discriminating circuit and switches between an output of the field interpolation circuit and an output of the interfield interpolation circuit. Video signal processing device.