JPH08287117A - Compaction method for layout having multiple grid restriction - Google Patents

Abstract

PURPOSE: To provide a compaction method for constituting a macrocell from plural leaf cells as to layout design with multiple grid restrictions. CONSTITUTION: A restriction graph between layout elements of plural leaf cells constituting a macrocell is generated (22) and restrictions between ports connected between the respective leaf cells are generated in each leaf cell on the basis of the multiple grid restrictions (23); and restrictions between the ports in each leaf cell are coupled to generate restrictions of the whole macrocell (25), coordinates of the respective ports which satisfy the restrictions of the whole macrocell are found on the basis of the multiple grid restrictions (26), and the coordinates of the layout elements of each leaf cell are determined by using the coordinate values (28). Consequently, the pattern of the whole macrocell is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compaction method for converting a rough layout pattern into a tight layout pattern according to a designated design rule in the layout design of an LSI.

In particular, the compaction method of the present invention, when designing a macro cell (high-density cell) by combining leaf cells (relatively small cells), the corresponding ports of each leaf cell are connected, and the multi-grid constraint is imposed. The present invention relates to a compaction method that can generate a layout pattern that satisfies a minimum area.

[0003]

2. Description of the Related Art Compaction technology for the layout of LSIs uses design rules (LS
In accordance with changes in the geometrical rules determined from the manufacturing process of I), it occupies an important position as a technique for automatically converting layout patterns, and various methods have been proposed. Various compaction techniques are described in the following documents:

Cho, YE, "A subjective review of com
paction, "in Proc.22nd Design Automation Conf., pp.
396-404, June 1985.

Among the various compaction methods, the one-dimensional compaction method based on the "longest path method" is applicable because it can be applied to change various design rules, and various constraints set by the designer for layout patterns can be handled. Is superior to other methods and is widely used in practice. An improved one of such algorithms is described in the following documents:

Liao, YZand Wong, CK, "An algorithm
to compact a VLSI symbolic layout wiht mixd const
raints, "IEEE Trans. on Computer-Aid Design & Syst
ems, vol.2, no.2, pp.62-69, April 1983.

The concept of the compaction method based on the longest path method will be briefly described with reference to FIGS. 5, 6, 7, and 8 by taking the -y direction compaction in which the layout is packed downward.

FIG. 5 is a schematic diagram of a cell pattern before compaction. In FIG. 5, 1 is a cell outer frame, 2 is wiring,
3 represents blocks 3A, 3B, 3C. The block 3 may be a circuit element such as a transistor, but the following ideas are basically the same, and these figures do not limit the application range of this method. 100 is the lower side of the cell outer frame, 101 is the port on the left side of the block 3B, 10
2, 103 are ports on the left side of the block 3A, 104 is a partial horizontal line of the wiring 2, and 105 and 106 are blocks 3A.
The port on the right side of, and 107 is the upper side of the cell outer frame.

FIG. 6 shows a directed graph showing the relationship between the coordinates of the layout elements in this cell, which is called a constraint graph. The vertices 4 of this graph (represented by circles) represent layout elements, and the directed branches 5 between vertices (represented by solid arrows) represent constraints between corresponding layout elements. This constraint is imposed to maintain design rules or layout element physical connections between these layout elements.

That is, a positive or negative weight is given to the directed branch (constrained branch) 5, and the weight w (i, j) of the branch (i, j) from the vertex i to the vertex j is the vertex. y-coordinates [y (i), y of the layout element corresponding to i, j
(J)] constraint “y (j) ≧ y (i) + w (i,
j) ". Here, the coordinate value [y (•]) is limited to an integer value. This is because, in an actual layout, the size of a certain minimum unit, for example, 0.05 μm is determined, and the coordinate value is expressed by an integral multiple of this.

In FIG. 6, the numbers in the circles indicated by the vertices 4 correspond to the sides, ports, lines, etc. represented by the numbers in FIG. For example, the vertex 107 corresponds to the upper side 107 of the cell outer frame 1, and the vertex 100 corresponds to the lower side 100 of the cell outer frame 1.

Here, the y-coordinates of all the vertices have the lower and upper limits of the y-coordinates of the vertices 100 and 107 corresponding to the lower side 100 and the upper side 107 of the cell outer frame 1, respectively. It is assumed that there is a path from the vertex 100 corresponding to 100 to any vertex, and a path from any vertex to the vertex 107 corresponding to the upper side 107 of the cell outer frame 1.

Further, the shapes of the blocks 3A to 3C and the ports 101 to 103 connected to the blocks 3A to 3C,
The positions of 105 and 106 are fixed. In FIG. 6, vertices au and al correspond to the upper and lower sides of the block 3A, and the directional branch 5 from the vertex au to the vertex al is (= 6).
Has a weight represented by. The same applies to the other blocks 3B and 3C.

As shown in FIG. 7, the directional branches 5 having the weights represented by (= 6) have their directions opposite to each other.
Two directional branches 5 with the same absolute value of weight but different signs
It is equivalent to a pair of 1,52 and is a simplified representation of this. The directed branches 51 and 52 of this pair are the constraint "y (au)
≧ y (al) +6 ”and the constraint“ y (al) ≧ y (al) −
6 ", that is, the constraint" y (au) = y (al) +6 "
Is a fixed constraint that fixes the height (distance) of the block 3C to a value of "6". For example, if the minimum unit size is 0.05 μm, then “0.05 μm × 6
= 0.3 μm ”. The other directional branch having the weight represented by "1" indicates that "1" is the lowest value.

The "longest path method" is applied on the constraint graph of FIG. 6 to determine the coordinates after layout element compaction. In this method, first, the vertex 1 corresponding to the lower side 100 of the outer cell frame 1 which is the lowest layout element is selected.
The y-coordinate is initialized by setting y (100) ← 0 for 00 and y (i) ← −∞ for the other vertices i.

Next, regarding vertices i and j, "for all directional branches e = (i, j), if y (j) <y
If (i) + w (i, j), y (j) ← y (i) + w
Update the coordinates with (i, j). Is repeated until the coordinate value is not updated.

FIG. 8 shows a layout after compacting the cell pattern shown in FIG. 5 as described above. For example, the coordinate values of the vertex 105 are from the vertex 100 to the vertex 10
The length of the longest road to 5 is "8". This directed graph is created separately for each of the x-direction and the y-direction, and the compaction correspondingly is also created for the x-direction and the y-direction.
Alternating directionally and independently.

The compaction of a macro cell composed of a plurality of leaf cells using the compaction method described above has conventionally been performed by the flow shown in FIGS. 9, 10 and 11. Here, it is assumed that the macro cells are formed by arranging the leaf cells A and B in the horizontal direction.

First, as shown in FIG. 9, the leaf cell A,
Create a constraint graph for B. In those graphs, the vertices corresponding to the upper (lower) side of the outer frame, and both leaf cells A and B
Let Vp be the set of vertices corresponding to the ports that must be connected by matching the y-coordinates between them. This set Vp is a pair of vertices surrounded by broken lines in FIG.
It is a collection of 0s. However, the port on the left side of the outer frame of the leaf cell A and the port on the right side of the outer frame of the leaf cell B also belong to the set Vp, and the vertices of this set Vp are called ports again.

For each leaf cell A, B, the longest path length between the vertices corresponding to the port is calculated. Then, when there is a path that has a port as a vertex for each leaf cell A and B and a directional branch is traced between the ports in that direction, only when that is the directional path with the longest path length among those paths as the weight. Create a graph with branches. This is called a "port abstraction graph". The directed graph in the leaf cells A and B shown in FIG. 10 is a port abstraction graph corresponding to the leaf cells A and B.

Next, with respect to the vertex of Vp, the directional branch 11,
Attach 12, 13, 14, and 15. These directed edges have a fixed weight (= 0), and the y-coordinates of the ports of the pair are made to coincide with each other, as already described in FIG.

The y-coordinates [y (.)] Of all the ports can be obtained by solving the constraint graph of the entire macro cell created in this way using the longest path method. Using the obtained port coordinates, the coordinates of each pattern for each leaf cell A and B are obtained. This can be obtained by solving the constraint graph in which the coordinate values of the ports obtained as described above are added as fixed constraints to the constraint graph of each leaf cell A, B.

For example, ports 300, 303, 304, 3 of leaf cell A obtained by solving the constraint graph of FIG.
The y coordinate values of 05, 301, 302, and 306 are a,
For b, c, d, e, f, and g, as shown in FIG. 11, a constraint (directed branch 5) for fixing the coordinates of the port is added to the constraint graph of the leaf cell A. That is, port 3
00 and ports 303, 304, 305, 301, 30
2, 306, “= b”, “= c”, “= d”,
Directed branches 5 having weights of “= e”, “= f”, and “= g” are added.

Finally, by solving the constraint graph of each leaf cell A, B to which this fixed constraint is added by the longest path method, the coordinates of all patterns in the leaf cells A, B are determined. As a result, the pattern of the leaf cells A and B is obtained such that the port coordinates of the leaf cells A and B are the same. This process will be referred to as “pitch matching” below.
Call.

[0025]

By the way, the actual LS
In the I-layout design, the coordinate values of layout elements are often subject to a lattice constraint that is limited to the form of “a · n + b” using a certain integer n with respect to designated constants a and b. . Further, in this kind of constraint, many types of these constants a and b are often designated. For example, “5 × n” is required for a certain wiring and “10 × n + 5” is required for a certain wiring with respect to an integer n. As described above, in the actual layout, generally, lattice constraints from several types are designated. Such multiple types of lattice constraints are called “multi-lattice constraints”. A compaction method that can be used even when such a multi-grid constraint exists is found in the following documents.

Lee, JF., "A Layout compaction algorith
m with multiple grid cnostraints, "in Internationa
l Conference on Computer Design, pp.30-33, 1991.

This multi-grid constraint is an essential constraint when wiring is performed using an automatic wiring program. The automatic wiring program searches a wiring route using a predetermined wiring grid. Therefore, when using the automatic routing program to route between macro cells created by compaction, or when using the empty area on the macro cell, in order to effectively use the wiring area, the specified wiring and port It is necessary to limit the coordinates to locations that satisfy some grid constraint. Further, even if the automatic wiring is not premised, if the wiring is freely performed without the grid restriction, the wiring area cannot be effectively used in a global perspective.

However, in the case of such a multi-grid constraint, a compaction method for generating a leaf cell pattern in which a pitch cell mapping is guaranteed from a roughly designed leaf cell pattern and a macro cell can be constructed has been established. Absent.

It is an object of the present invention to provide a compaction method for constructing a macro cell from leaf cells in such a practical layout design having a multi-grid constraint.

[0030]

Therefore, according to the present invention, when designing a macro cell by combining leaf cells, the corresponding ports of each leaf cell are connected, and the design rule is satisfied, and the multi-grid constraint is satisfied. A compaction method for generating a minimum layout pattern, the step of generating a constraint graph between layout elements of each leaf cell forming a macro cell, the constraint between the ports connected between each leaf cell based on a multi-grid constraint. The step of generating in each leaf cell, the step of combining the constraints between the ports in each leaf cell to generate the constraint of the entire macro cell, the coordinate of each port satisfying the constraint of the entire macro cell is obtained based on the multi-grid constraint Step, use this coordinate value to determine the coordinates of the layout element for each leaf cell. And configured to include a step of generating a Roseru overall pattern.

[0031]

In the present invention, it is not possible to compact all the patterns in a macro cell collectively for a plurality of leaf cells for which patterns and ports to be pitch-mapped are specified and multi-grid constraints are imposed. Without
Since the port abstraction graph of each leaf cell is created and the compaction is performed on the port abstraction graph of the macrocell which is combined with this, the result equivalent to performing the entire compaction can be obtained. This whole port abstraction
The size of the graph is smaller than the overall constraint graph. Add this solution to the constraint graph of each leaf cell as a fixed constraint,
By applying the longest path method considering the multi-grid constraint, the coordinate value of the pattern in the leaf cell is determined.

[0032]

EXAMPLES The present invention will be described below with reference to examples.
First, a brief description will be given. Not only the vertices in the constraint graph corresponding to the ports that perform pitch mapping between adjacent leaf cells, but also the vertices corresponding to the lattice-constrained patterns in the leaf cells are treated like ports. Calculate the longest path length between the vertices of and create a port abstraction graph. Next, the port abstraction graphs of each leaf cell created in this way are combined by adding a constraint to make the coordinates of the ports for pitch mapping the same, and the port abstraction graph of the entire macrocell is combined. To generate. This is solved by the longest path method considering the multi-grid constraint. As a constraint to fix the coordinates, the coordinate values of the ports and vertices with grid constraints obtained as a result are added to the constraint graph of each leaf cell, and the constraint graph of each leaf cell is solved again by the longest path method considering the multi-grid constraint. , By determining the coordinate value of the pattern in each leaf cell, the pattern of the leaf cells forming the macro cell is generated.

FIG. 1 is an explanatory diagram showing the basic structure of the present invention.
6 is a flowchart showing a compaction method of a macro cell having a multi-grid constraint. Reference numeral 21 is a leaf cell pattern required to form a macro cell. 22 is a constraint graph generation step of each leaf cell, 23 is a leaf cell port abstraction graph generation step, 24
Is a file storing the port abstraction graph of each leaf cell, 25 is a macrocell port abstraction graph generating step, 26 is a macrocell port abstraction graph solving step, and 27 is a file storing port coordinate values. , 28
Is a leaf cell constraint graph solving step, and 29 is a generated leaf cell pattern, which is pitch-matched so that a macro cell can be constructed.

[Constraint Graph Generation Step 22 for Each Leaf Cell] Here, the layout pattern is analyzed for each leaf cell taken in as a constituent of the macro cell,
Create a leaf cell constraint graph. Constraints are added in the constraint graph so that the specified design rules are satisfied and the physical connection relationships of the patterns are maintained.

[Leaf Cell Port Abstraction Graph Generation Step 23] Here, a port abstraction graph is generated for each leaf cell. The vertices of this port abstraction graph are on the outer frame of the leaf cell, and not only the ports connected to the adjacent leaf cells but all vertices with lattice constraints in this leaf cell are added.

Next, the longest path length of the directed path between these vertices is calculated. However, when there is a lattice constraint, unlike the case where there is no lattice constraint, the longest path length depends on the initial coordinate value of the starting point of the route. For example, consider the longest path length from vertex 401 to vertex 405 of FIG. It is assumed that the vertex 404 has a lattice constraint <3,0>. Here, “3” is the value of the above-mentioned constant “a”, and “0” is the above-mentioned constant “b”.
Indicates the value of. Therefore, this is the coordinate value [y
(404)] is limited to “3 × n” for some integer n.

At this time, as shown in the table of FIG.
When the initial value δ of the coordinate 01 is changed, the [coordinate y (405)] of the vertex 405 and the distance [y (405) −δ] between the vertex 405 and the vertex 401 change.

The directional branch between the vertices s and t of the leaf cell port abstraction graph of the leaf cell is added to the directional branch from s to t only when there is a path between them, and its weight is added. Is the difference between Ls, t (δ) obtained according to the procedure shown in FIG. Minimum value in And

D is the least common multiple of the lattice constraint {Cgrid (i)} for the lattice constraints <Cgrid (i), Cdelta (i)> defined in the leaf cell. In this example, D
= 3. It should be noted that Cgrid (i) is a constant “a” within the above-mentioned constraint “a · n + b” of the vertex i, and Cdelta
(I) is the constant “b” of the vertex i.

Therefore, in the example shown in FIG.
The weight of the directed edge from 01 to the vertex 405 is Becomes

FIG. 4 shows a given constraint graph G = (V,
E) is a flowchart of a procedure for calculating (Ls, t (δ) -δ); (0 ≦ δ ≦ D) for vertices s and t. V is a set of vertices of the constraint graph g, and E is a set of directed edges. When the initial value of the coordinate of the vertex s corresponding to the starting point (source vertex) is δ, the coordinate of the vertex t along the longest path is Ls, t (δ)
Is. In step 31, δ is initialized.

In step 32, the coordinates of the vertex s are initialized by a function round (δ, s) that rounds the coordinates to an integer, and the coordinates of other vertices other than the vertex s are set to −∞. By executing this procedure for each vertex t, Ls, t (δ) (δ = 0, δ + 1, ..., D) is obtained each time step 34 is reached.
Is found. The function round (x, i) is processed by the formula shown in the lower part of FIG. x is the coordinate value of the vertex i.

The step 33 enclosed by a broken line is the lattice constant {grid (•) of the lattice constraint specified in this constraint graph.
} Is repeated N times at most, defined by the following equation. However, Vg is a set of vertices having a lattice constraint. Also, | V-Vg | represents the number of elements of the set V-Vg. In this way, the port abstraction graph of each leaf cell is created. The "id" in step 33 is a variable indicating the number of processed vertices.

[Generation step 26 of macro cell port abstraction graph] In this step, the port abstraction graphs of the leaf cells generated as described above are combined to create a macro cell port abstraction graph. . This connection is performed by adding two directional branches whose weights are 0 and whose directions are opposite to each other between the vertices corresponding to the ports to which the adjacent leaf cells have the same coordinates and are connected.

[Solution Step 27 of Macro Cell Port Abstraction Graph] Here, the procedure of FIG. 4 is applied to the macro cell port abstraction graph to obtain the coordinates of each vertex. However, the least common multiple D = 0 is set, and the vertex s is the vertex corresponding to the lowest layout element of the macro cell. This procedure determines the y-coordinates of all vertices.

In step 34 of FIG. 4, the coordinate values y of all the vertices with respect to the lowest layout element (vertex) s.
(I) (= Ls, t (δ)) is determined. Here, the vertices of the macro cell port abstraction graph are composed of all ports and vertices with lattice constraints.

[Solution Step 28 of Constraint Graph of Each Leaf Cell] Finally, here, the constraint graph of each leaf cell is solved. Here, in the leaf cell constraint graph, the macro cell port abstraction
It is assumed that the coordinate values of the vertices included in the graph are added as fixed constraints.

The constraint graph of each leaf cell can be solved by applying the procedure of FIG. 4 again. Here, the least common multiple D = 0
And the vertex s is the vertex corresponding to the lowest layout element of each leaf cell. This procedure determines the vertices in the constraint graph and thus produces the pattern for each leaf cell.

[0049]

As described above, according to the compaction method of the present invention, the layout design of a macro cell having a multi-grid constraint is performed so that the coordinates of the ports of adjacent leaf cells are made to coincide with each other and the connection of ports between adjacent leaf cells is made. As is done, it is possible to generate a leaf cell pattern that is a constituent of a macro cell.

[Brief description of drawings]

FIG. 1 is a flowchart showing a compaction method of a macro cell having a multi-grid constraint.

Figure 2 Ports in a layout with multiple grid constraints
It is a figure for demonstrating the calculation method of the weight of the directed edge of an abstract graph.

FIG. 3 is a diagram showing values necessary for calculating a weight of a directional branch corresponding to a route from a vertex 401 to a vertex 405 in FIG.

FIG. 4 is a flowchart for obtaining a value necessary for calculating a weight of a directional branch in a port abstraction graph having a layout having a multi-grid constraint.

FIG. 5 is a schematic diagram of cell patterns before compaction.

6 is a diagram showing a constraint graph corresponding to the pattern shown in FIG.

FIG. 7 is a diagram showing a pair of constraints for fixing a distance called fixed constraints.

FIG. 8 is a schematic diagram of a pattern after compaction.

FIG. 9 is a diagram showing a constraint graph of adjacent leaf cells.

FIG. 10 is a diagram illustrating a port abstraction graph of a leaf cell and a directional branch added to match the coordinates of ports.

FIG. 11 is a diagram showing a constraint graph of leaf cells to which fixed constraints are added to fix the coordinate values of ports.

Claims (1)

[Claims] 1. A compaction method for generating a minimum layout pattern in which a corresponding port of each leaf cell is connected, a design rule is satisfied, and a multi-grid constraint is satisfied when a macro cell is designed by combining a plurality of leaf cells. And a step of generating a constraint graph between layout elements of each leaf cell forming a macrocell, a step of generating a constraint between ports connecting between the leaf cells in each leaf cell based on a multi-grid constraint, Combining constraints between ports in each leaf cell to generate constraints for the entire macro cell, determining coordinates of each port satisfying the constraints for the entire macro cell based on the multi-grid constraint, and using these coordinate values Determines the coordinates of the leaf cell layout elements and generates a pattern for the entire macro cell Compaction method characterized by comprising that step.