JPH08240813A - Electro-optical device - Google Patents

Abstract

PURPOSE: To enhance the production yield and to reduce the manufacturing cost by forming peripheral circuits connected to the matrix wirings on a substrate as thin-film transistors(TFTs) of complementary type constitution and constituting the remaining peripheral circuits of semiconductor chips. CONSTITUTION: Only the analog switch array circuit parts among the peripheral circuit parts connected to the wirings in the X direction of a liquid crystal element device of m×n circuit constitution are formed as the TFTs like active elements disposed at pixels 6. Only the analog switch array circuit parts of the peripheral circuit parts connected to the Y direction wirings are also formed as TFTs. The other peripheral circuit parts are MOS integrated circuits(ICs) 4 and are connected to the substrate by a COG method. The peripheral circuit parts formed as the TFTs are formed as CTFT(complementary type constitution) like the active elements disposed at pixels 6. Namely, only the simple parts of the element constitution or only the functional parts of a smaller number of elements are formed as the TFTs, thereby, the production yield of the liquid crystal display device is improved and the manufacturing cost is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device formed by using thin film transistors.

[0002]

2. Description of the Related Art CRTs are used as displays for office automation equipment and the like.
Flat displays are attracting attention instead of the above, and expectations for large-area display are becoming particularly strong. Further, as another application of the flat display, the wall TV is being developed at a rapid pace. In addition, the demand for colorization and high definition of flat displays has been considerably increased.

A liquid crystal display device is known as a typical example of the flat display. In this, an electric field is applied to a liquid crystal composition held by sandwiching an electrode between a pair of glass substrates to change the state of the liquid crystal composition, and display is performed by utilizing the difference in this state. There are a thin film transistor (hereinafter referred to as a TFT) and other switching elements for driving the liquid crystal, and a simple matrix structure. In either case, a driver circuit for sending a signal for driving the liquid crystal to each wiring in the vertical and horizontal (X, Y) directions is provided around the display.

The driver circuit is usually composed of a monocrystalline silicon MOS integrated circuit (IC). This I
A pad electrode corresponding to each display electrode is provided in C, and a printed circuit board is interposed between the two, and the pad electrode of the IC and the printed circuit board are connected first, and then the printed circuit board and the display are connected. It was The printed circuit board is a glass-epoxy or paper-epoxy insulator board or a flexible plastic board, and its occupied area needs to be the same as or larger than that of the display. Further, similarly, it was necessary to increase the volume considerably.

[0005]

The conventional display as described above has the following drawbacks due to the above-mentioned configuration.

That is, the X direction of the matrix wiring and the Y direction
Since the same number of connections as the number of display electrodes or source (drain) wirings or gate wirings in the same direction are made between the printed circuit board and the mounting technology, there is a limit to the distance between the connectable connection parts. It was not possible to make a high-definition display.

In addition to the display main body, a printed circuit board, an IC and connection wiring are required, and the required area and required volume are several times as large as those of the display main body.

Since there are many connection points between the display main body and the printed circuit board and between the printed circuit board and the IC, and the weight is considerable, an unreasonable force is applied to the connection portion and the connection reliability is low.

On the other hand, as a method for solving such a drawback, it has been proposed to configure the active element and the peripheral circuit by TFTs on the same substrate in a display, particularly a display device using the active element as a switching element. There is. However, according to this configuration, the above-mentioned 3
Although one of the shortcomings can be almost solved, another new problem has occurred.

In addition to the active element, the peripheral circuit also has a TF.
The number of elements formed on the same substrate increases because of the T-type,
The manufacturing yield of the TFT was reduced. Therefore, the manufacturing yield of the display was also reduced.

The peripheral circuit portion has a very complicated element structure as compared with the element structure of the active element portion. Therefore, the circuit pattern becomes complicated, the manufacturing process technology becomes more sophisticated, and the cost increases. In addition, the number of multi-layered wirings naturally increased, resulting in an increase in the number of process steps and a reduction in the manufacturing yield of TFTs.

Since a transistor forming a peripheral circuit is required to have a high response speed, a polycrystalline semiconductor is usually used. Therefore, in order to polycrystallize the semiconductor layer,
A high temperature process was required and an expensive quartz substrate or the like had to be used.

[0013]

SUMMARY OF THE INVENTION The present invention relates to a liquid crystal display device which solves the above six problems in a proper balance and has a low cost and a high manufacturing yield.

That is, a first substrate on which a pixel matrix having a plurality of gate lines, a plurality of source (drain) lines and a thin film transistor having a complementary structure is formed, and a second substrate arranged opposite to the first substrate. Of a peripheral circuit connected to an X or Y direction matrix wiring formed on the first substrate, the liquid crystal display device comprising a liquid crystal composition held between the substrate and the pair of substrates. At least a part of the peripheral circuit is a thin film transistor formed by the same process as the complementary structure similar to the active element connected to the pixel, and the remaining peripheral circuit is composed of a semiconductor chip.

Further, for connection between the IC as the remaining peripheral circuits not formed into TFTs and the substrate, the IC chip is directly provided on the substrate and the COG method or IC chip for connecting to each connection terminal is used.
This can be realized by the TAB method in which each resin substrate is provided on a flexible organic resin substrate and the resin substrate and the display substrate are connected.

That is, according to the present invention, not all the peripheral circuits of the liquid crystal display device are formed into TFTs, but only a simple portion of the element structure, a functional portion having a small number of elements, or a circuit portion for which a general-purpose IC is difficult to obtain. The purpose is to improve the manufacturing yield of liquid crystal display devices and reduce the manufacturing cost by converting only the high cost parts of the IC into TFTs.

Further, by forming a part of the peripheral circuit into a TFT, an external IC which has conventionally required a considerable number.
It reduces the number of products and the manufacturing cost.

Furthermore, since the active element and the peripheral circuit are thin film transistors of a complementary structure (CTFT) formed in the same process, the pixel driving capability is improved,
Redundancy can be given to the peripheral circuit, and the liquid crystal display device can be driven with a sufficient margin.

Further, if all the peripheral circuits are made into TFTs, it is necessary to increase the size of the display substrate in both the X and Y directions, and the area occupied by the entire display device becomes large. However, if only a part is made into TFTs. It is possible to realize a display device that can be easily adjusted to the external dimensions of a computer or a device that uses the display device and has a small occupied area and occupied volume by only slightly increasing the size of the board.

A portion where the element structure in the peripheral circuit is complicated,
For example, an advanced fabrication technique is required to make a device structure that requires multi-layer wiring, a part having an amplifier function, etc. into a TFT. By using a conventional IC, a simple element structure or a portion having a simple function can be formed into a TFT, and a display device can be realized at low cost and high yield.

Further, the number of thin film transistors in the peripheral circuit portion can be considerably reduced by forming only a part of the TFT. Simply, when the peripheral circuit functions in the X and Y directions are the same, the number is almost half. Become. As described above, by reducing the number of elements to be formed into TFTs, it is possible to improve the manufacturing yield of the substrate and realize a display device that can reduce the area and volume of the substrate at low cost.

Further, the semiconductor layer used for the TFT is not a polycrystal or amorphous semiconductor which has been used conventionally, but a semi-amorphous semiconductor of a new concept is used, so that the semiconductor layer can be manufactured at a low temperature and the carrier It is possible to realize a TFT having an extremely high mobility and a high response speed.

This semi-amorphous semiconductor means LPC
It can be obtained by performing a thermal crystallization process after forming a film by a VD method, a sputtering method, a PCVD method or the like, but the following description will be given taking the sputtering method as an example.

That is, in the sputtering method, when a single-crystal silicon semiconductor is used as a target and sputtering is performed with a mixed gas of hydrogen and argon, atomic silicon is separated from the target by sputtering (impact) of heavy atoms of argon, and the target is formed. It flies on a substrate having a surface, but at the same time, a lump in which several tens to several hundreds of thousands of atoms are solidified separates from the target as a cluster and flies to the formation surface.

In this flight, hydrogen bonds with the dangling bonds of silicon around the outer periphery of the cluster, and in the bonded state, it is formed as a relatively highly ordered region on the formation surface. In other words, there is a high degree of order on the film-forming surface, and
Realize a state of a mixture of clusters having -H bonds and pure amorphous silicon. By heat-treating this in a non-oxidizing gas at 450 ° C to 700 ° C,
Si-H bonds react with other Si-H bonds to form Si-Si bonds.

At the same time as this bond pulls on each other,
Highly ordered clusters tend to shift their phase to a more highly ordered state, crystallization. However, between adjacent clusters, Si-Si bonded to each other pulls each other. As a result, the crystal has a lattice strain, and the crystal peak in laser Raman is measured at a wave number side lower than 520 cm ^-1 of the single crystal.

Since the Si-Si bonds between the clusters anchor (connect) each other's clusters, the energy bands in each cluster can be electrically connected to each other via the anchoring points. Therefore, it is possible to obtain carrier mobility of 10 to ²⁰⁰ cm ² / V Sec, which is fundamentally different from that of polycrystalline silicon in which the grain boundaries act as a carrier barrier.

That is, it can be expected that the semi-amorphous semiconductor based on the Karuru definition has an apparently crystalline property, but has substantially no crystal grain boundaries electrically. Of course, when the annealing temperature is a silicon semiconductor, 450 ° C ~
When crystallization is performed with crystal growth of 1000 ° C. or higher, instead of medium temperature annealing of 700 ° C., the crystal growth causes oxygen and the like in the film to break out into grain boundaries to form a barrier. This is a material (polycrystal) having the same crystal and grain boundary as the single crystal.

When the degree of anchoring between clusters in this semiconductor is increased, the carrier mobility is increased. For this purpose, if the amount of oxygen in this film is 7 × 10 ¹⁹ cm ^-3, preferably 1 × 10 ¹⁹ cm ^-3 or less,
Further, in addition to crystallization at a temperature lower than 600 ° C., high carrier mobility can be obtained.

[0030]

[Embodiment 1] In this embodiment, a liquid crystal display device having an m × n circuit configuration as shown in FIG. 1 will be described. That is, only the analog switch array circuit portion 1 of the peripheral circuit portion connected to the wiring in the X direction in FIG. 1 is made into a TFT 5 like the active element provided in the pixel 6, and the peripheral circuit connected to the wiring in the Y direction. For the part, only the analog switch array circuit part 2 is made into a TFT, and the other peripheral circuit parts are IC4.
Then, it is connected to the substrate by the COG method. Where TF
The T-shaped peripheral circuit portion is formed as a CTFT (complementary structure) like the active element provided in the pixel.

FIG. 2 shows the actual arrangement of electrodes and the like corresponding to this circuit structure. In FIG. 2, only a portion corresponding to 2 × 2 is shown to simplify the description.

First, a method of manufacturing a TFT on the liquid crystal display device used in this embodiment will be described with reference to FIG. FIG.
In (A), a silicon oxide film as a blocking layer 51 of 1000 to 300 is formed on a glass 50, such as quartz glass, which can withstand a heat treatment at 700 ° C. or lower, for example, about 600 ° C., by a magnetron RF (radio frequency) sputtering method.
It is made to a thickness of 0Å. The process conditions were an atmosphere of 100% oxygen, a film forming temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The film formation rate using quartz or single crystal silicon for the target was 30 to 100 Å / min.

A silicon film was formed thereon by LPCVD (Low Pressure Vapor Phase) method, sputtering method or plasma CVD method. When forming by the reduced pressure vapor phase method, it is 1 more than the crystallization temperature.
450-550 ° C, which is low by 00-200 ° C, for example, 530 ° C
CVD of disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ )
The film was supplied to the apparatus to form a film. The reactor pressure is 30-300
It was Pa. The film forming rate was 50 to 250 Å / min.
Threshold voltage (Vt) between NTFT and PTFT
In order to control the concentration to be substantially the same as that of h), boron may be added during the film formation with diborane at a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ .

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ^-5 Pa or less, the single crystal silicon is used as the target, and the atmosphere is mixed with 20 to 80% of hydrogen in argon. For example, argon is 20% and hydrogen is 80%.
The film forming temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

When the silicon film is formed by the plasma CVD method, the temperature is, for example, 300 ° C., and monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used. These were introduced into a PCVD apparatus, and high-frequency power of 13.56 MHz was applied to form a film.

The coating formed by these methods is
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. If the oxygen concentration is high, it is difficult to crystallize, and the heat annealing temperature must be increased or the heat annealing time must be increased.
If it is too small, the backlight will turn off the light.
The current will increase. Therefore 4 × 10 ¹⁹ to 4 × 10 ²¹
The range was cm ^-3 . Hydrogen is 4 × 10 ²⁰ cm ^-3 and silicon 4
When compared with ^{x10 22} cm ^-3 , it was 1 atom%. Also,
In order to further promote crystallization of the source and drain, the oxygen concentration is 7 × 10 ¹⁹ cm ^-3 or less, preferably 1 × 10 ¹⁹
cm ^-3 or less, and oxygen is ion-implanted into only the channel formation region of the TFT constituting the pixel to form 5 × 10 ^{20 to} 5 × 10 5.
You may add so that it may become ²¹ cm ^-3 . At this time, since the TFTs forming the peripheral circuit are not irradiated with light, it is effective to reduce the mixing of oxygen and have a higher carrier mobility in order to operate at high frequency.

Next, a silicon film in an amorphous state is formed into 500
~ 5,000 Å, for example, 1500 Å after making, 4
Medium temperature heat treatment in a non-oxide atmosphere at a temperature of 50 to 700 ° C. for 12 to 70 hours, for example, 600 in a hydrogen atmosphere.
Hold at a temperature of ° C. Since the amorphous silicon oxide film is formed on the surface of the substrate below the silicon film, no specific nuclei are present in this heat treatment, and the whole is uniformly annealed. That is, it has an amorphous structure at the time of film formation, and hydrogen is simply mixed therein.

The annealing causes the silicon film to shift from an amorphous structure to a highly ordered state, and a part of the silicon film assumes a crystalline state. In particular, a region having a relatively high degree of ordering after the film formation of silicon tends to be crystallized and become a crystalline state. However, since silicon existing between these regions is bonded to each other, the silicon members pull each other. Peak 522 of single crystal silicon as measured by laser Raman spectroscopy
Peaks shifted to lower frequencies than cm ^-1 are observed. The apparent particle size is 50 to 5 when calculated from the full width at half maximum.
Although it is a microcrystal like 00Å, in reality there are many highly crystalline regions with a cluster structure, and each cluster has a semi-amorphous structure in which silicon is bonded (anchoring) with each other. Could be formed.

As a result, the coating exhibits a state in which it may be said that it is substantially free of grain boundaries (hereinafter referred to as GB). Since the carriers can easily move between the clusters through the anchored portions, the carrier mobility is higher than that of polycrystalline silicon in which so-called GB is clearly present. That is, hole mobility (μh) = 10 to ²⁰⁰ cm ² /
VSec, electron mobility (μe) = 15 to 300 cm ² / V
Sec is obtained.

On the other hand, when the film is polycrystallized by a high temperature anneal of 900 to 1200 ° C. instead of the anneal at the medium temperature as described above, the segregation of impurities in the film occurs due to solid phase growth from the nucleus. , GB have a large amount of impurities such as oxygen, carbon, and nitrogen, and have a large mobility in the crystal, but they form a barrier in GB and hinder the movement of carriers there. As a result, it is difficult to obtain a mobility of 10 cm ² / Vsec or more. That is, in this embodiment, the silicon semiconductor having the semi-amorphous or semi-crystal structure is used for the reason as described above.

In FIG. 3 (A), the silicon film is photoetched using a first photomask, and a region 22 (channel width 20 μm) for PTFT is shown on the right side of the drawing, and NTFT.
A region 13 for use was made on the left side.

On this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000Å, for example, 1000Å. This was performed under the same conditions as the production of the silicon oxide film as the blocking layer. During this film formation, a small amount of fluorine may be added to immobilize sodium ions.

After this, 1-5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 concentration silicon film or this silicon film with molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned with a second photomask to obtain FIG. 3 (B). A gate electrode 55 for PTFT and a gate electrode 56 for NTFT were formed. For example, the channel length is 10 μm, the gate electrode is 0.2 μm of phosphorus-doped silicon, and 0.3 molybdenum is formed thereon.
It was formed to a thickness of μm. In FIG. 3C, a photoresist 57 is formed using a photomask, and PTF is used.
Boron 1 to 5 is added to the source 59 drain 58 for T.
It was added by an ion implantation method at a dose amount of × 10 ¹⁵ cm ^-2 . Next, as shown in FIG. 3D, a photoresist 61 was formed using a photomask. Source 6 for NTFT
4. As the drain 62, phosphorus was added by an ion implantation method at a dose amount of 1 to 5 × 10 ¹⁵ cm ^-2 .

These are performed through the gate insulating film 54. However, in FIG. 3B, the gate electrodes 55 and 56 are
May be used as a mask to remove silicon oxide on the silicon film, and then boron and phosphorus may be directly ion-implanted into the silicon film.

Next, heating anneal was performed again at 600 ° C. for 10 to 50 hours. The source 59 of the PTFT, the source 64 of the drain 58 and the drain 62 of the NTFT were produced as P ⁺ and N ⁺ by activating impurities. Also gate electrode 5
Channel formation regions 60 and 63 are formed as semi-amorphous semiconductors below 5 and 56.

In this way, the C / TFT can be manufactured without applying a temperature above 700 ° C. in all steps even though it is a self-aligned method. Therefore, it is not necessary to use an expensive substrate such as quartz as the substrate material, and the process is very suitable for the large-pixel liquid crystal display device of the present invention.

In this embodiment, the thermal anneal is as shown in FIG.
Done twice in (D). However, the anneal of FIG. 3 (A) may be omitted depending on the desired characteristics, and both may be combined with the anneal of FIG. 3 (D) to reduce the manufacturing time. In FIG. 4A, the inter-layer insulator 65 was formed as a silicon oxide film by the above-described sputtering method. The silicon oxide film may be formed by using the LPCVD method, the photo CVD method, or the atmospheric pressure CVD method. For example, it is formed to a thickness of 0.2 to 0.6 μm, and then
A window 66 for an electrode was formed using a photomask. Further, aluminum is formed on all of them by a sputtering method, and the leads 71 and 72 and the contacts 67 and 68 are formed using a photomask, and then the surface is coated with an organic resin 69 for flattening, for example, a translucent polyimide resin. Formed,
Re-drilling of the electrode was performed with a photomask.

As shown in FIG. 4B, two TFTs have a complementary structure, and the output terminal thereof is connected to the electrode of one pixel of the liquid crystal device as a transparent electrode. Therefore, ITO (indium) is formed by a sputtering method. -Tin oxide film) was formed. Etching it with a photomask, the electrode 7
Configured 0. This ITO was formed into a film at room temperature to 150 ° C. and accomplished by oxygen at 200 to 400 ° C. or an anneal in the atmosphere. In this way, PTFT22 and NTF
The same glass substrate 50 is used for T13 and the electrode 70 of the transparent conductive film.
Made above. The electrical characteristics of the obtained TFT are PTF.
At T, the mobility is 20 (cm ² / Vs), Vth is -5.9 (V),
Mobility is 40 (cm ² / Vs) and Vth is 5.0 (V) with NTFT
Met.

The arrangement of electrodes and the like in the pixel portion of this liquid crystal display device is shown in FIG. The NTFT 13 is connected to the first scanning line 1
5 is provided at the intersection of the data line 21 and the first scanning line 15
Similarly, NTFTs for other pixels are also provided at the intersections of the data lines 14 and the data lines 14. On the other hand, PTFT is the second scan line 1
It is provided at the intersection of 8 and the data line 21. Also,
An NTFT for another pixel is provided at the intersection of another adjacent first scanning line 16 and data line 21. A matrix structure using such C / TFT is provided. The NTFT 13 is connected to the first scanning line 15 via the contact at the input end of the drain 64, and the gate 56 is connected to the data line 21 in which the multilayer wiring is formed.
The output terminal of the source 62 is connected to the pixel electrode 1 through the contact.
It is linked to 7.

On the other hand, in the PTFT 22, the input end of the drain 58 is connected to the second scanning line 18 via a contact,
The gate 55 is connected to the data line 21, and the output end of the source 59 is connected to the pixel electrode 17 via a contact like the NTFT. Thus, while being sandwiched between the pair of scanning lines 15 and 18 (inside), the pixel 23 made of the transparent conductive film and the C / TF are formed.
One pixel is composed of T and T. By repeating this structure horizontally and vertically, a 2 × 2 matrix is enlarged to 640 × 480, 1280 × 960.
Such a large pixel liquid crystal display device can be used.

As described above, the CMOS structure is provided with the NTFT 13 and the PTFT 22 manufactured in the same process as the switching element.

As described above, one of the substrates is completed,
The other substrate is attached by a conventional method, and STN liquid crystal is injected between the substrates. Next, as the remaining peripheral circuits, I
Use C4. The IC 4 is connected by COG to each of the X-direction wiring and the Y-direction wiring of the substrate.
Only connecting leads for supplying power and data from the outside are connected to each of the IC4, and there is no need to attach an FPC for connecting to one side of the board. The number is considerably reduced and the reliability is improved. The liquid crystal display device of the present invention was completed as described above.

In this embodiment, only the analog switch array portion 1 of the X-direction side peripheral circuit is used, and only the analog switch array portion 2 of the Y-direction side peripheral circuit is used.
Converted to FT and C / TF in the same process as the switching element
However, the remaining peripheral circuit portion is composed of the IC4, but the present invention is not particularly limited to this structure, and in consideration of the yield in forming a TFT, the process technology problem in forming a TFT, and the like, It suffices to make only the part that can be easily made into a TFT.

In this embodiment, since the semi-amorphous semiconductor is used as the semiconductor film, its mobility is 10 times or more that of the TFT using the non-single crystal semiconductor. Therefore, it can be sufficiently used for the TFT of the peripheral circuit that requires a high response speed, and the TFT of the peripheral circuit portion does not need to be specially crystallized as in the conventional case, and is formed in the same process as the active element. I was able to.

Further, since the C / TFT structure is used as the active element connected to the liquid crystal pixel, the operation margin is expanded, the pixel potential does not fluctuate, and a constant display level can be secured. Even if it is defective, there is an advantage that it does not cause a noticeable defect display.

[0056]

Second Embodiment FIG. 5 shows a schematic external view of the liquid crystal display device of this embodiment. The basic circuit and the like are exactly the same as in the first embodiment. In FIG. 5, the portion of the peripheral circuit connected to the wiring in the Y direction, which is composed of the IC 4, has the IC formed directly on the substrate by the COG method. The IC 4 is provided separately on the upper and lower parts of the substrate.

In this case, in the connection between the pad electrode of the IC 4 and the wiring in the Y direction, the gap can be made narrower than in the case where the IC is formed on only one side. Therefore, it has a feature that a higher definition display pixel can be designed. Furthermore, since the IC is provided on the substrate, the volume of the IC hardly increases, and a thinner liquid crystal display device can be provided.

In the above-mentioned embodiments, the TFTs of the active elements have the CMOS structure, but the TFTs are not particularly limited to this structure, and may be composed of only NTFT and PTFT. The number of elements is increased in the configuration.

The position where the TFT is formed on the substrate is set to X.
TFTs are formed not only on one side that is connected to the wiring in the Y direction or the Y direction but also on the other side, and TF is alternately formed.
By connecting T and halving the density of the TFT, it was possible to improve the manufacturing yield of the TFT.

[0060]

According to the present invention, the liquid crystal display cannot be made finer due to the limitation of external connection technology.
Further, since unnecessary connection between the X-direction wiring or the Y-direction wiring and the external peripheral circuit can be minimized, the reliability at the connection portion is improved.

Since only some of the peripheral circuits are made into TFTs,
The area occupied by the display board itself can be reduced,
In addition, the substrate can be freely designed to have the required size and shape. Further, it is possible to avoid the problem in manufacturing the TFT and to make only the portion having a high manufacturing yield into the TFT. Therefore, the manufacturing cost could be reduced.

Since a semi-amorphous semiconductor is used as the semiconductor film used for the TFT, a response speed that can be sufficiently used for peripheral circuits can be obtained, and no special processing is performed as it is in the process of manufacturing the active element, The TFT for the circuit could be made at the same time.

According to the present invention, the complementary TFT is connected to each matrixed pixel to clarify the threshold value, increase the switching speed, and expand the operation margin.
Even if there are some defective TFTs, the compensation can be performed to some extent. The number of photomasks required for fabrication is NT
This is only twice as compared with the conventional example using only FT.
Since the carrier mobility is 10 times or more higher than that when amorphous silicon is used, the size of the TFT can be reduced, and even if two TFTs are provided in one pixel, the aperture ratio is hardly reduced. With many features.

Therefore, compared to the conventional active TFT liquid crystal device using only NTFT, several stages of manufacturing yield and screen vividness can be achieved.

[Brief description of drawings]

FIG. 1 is a diagram showing a liquid crystal display device having an m × n circuit configuration.

FIG. 2 is a diagram showing how a pixel portion of a liquid crystal display device is arranged.

FIG. 3 is a diagram schematically showing a manufacturing process of a TFT.

FIG. 4 is a diagram showing an outline of a manufacturing process of a TFT.

FIG. 5 is a diagram showing another embodiment.

[Explanation of symbols]

 1、2 ・ ・ ・ Peripheral circuit 4 ・ ・ ・ ・ ・ ・ ・ ・ IC 5 ・ ・ ・ ・ ・ ・ ・ ・ Peripheral circuit made into TFT 6 ・ ・ ・ ・ ・ ・ ・ ・ Pixel 13 ・ ・ ・ ・ ・ ・ NTFT 22 ・ ・ ・ ・ ・ ・ PTFT

[Procedure amendment]

[Submission date] May 8, 1996

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Detailed explanation of the invention

[Correction method] Change

[Correction content]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device formed by using thin film transistors.

[0002]

2. Description of the Related Art CRTs are used as displays for office automation equipment and the like.
Flat displays are attracting attention instead of the above, and expectations for large-area display are becoming particularly strong. Further, as another application of the flat display, the wall TV is being developed at a rapid pace. In addition, the demand for colorization and high definition of flat displays has been considerably increased.

A liquid crystal display device is known as a typical example of the flat display. In this, an electric field is applied to a liquid crystal composition held by sandwiching an electrode between a pair of glass substrates to change the state of the liquid crystal composition, and display is performed by utilizing the difference in this state. There are a thin film transistor (hereinafter referred to as a TFT) and other switching elements for driving the liquid crystal, and a simple matrix structure. In either case, a driver circuit for sending a signal for driving the liquid crystal to each wiring in the vertical and horizontal (X, Y) directions is provided around the display.

The driver circuit is usually composed of a monocrystalline silicon MOS integrated circuit (IC). This I
A pad electrode corresponding to each display electrode is provided in C, and a printed circuit board is interposed between the two, and the pad electrode of the IC and the printed circuit board are connected first, and then the printed circuit board and the display are connected. It was The printed circuit board is a glass-epoxy or paper-epoxy insulator board or a flexible plastic board, and its occupied area needs to be the same as or larger than that of the display. Further, similarly, it was necessary to increase the volume considerably.

[0005]

The conventional display as described above has the following drawbacks due to the above-mentioned configuration.

That is, the X direction of the matrix wiring and the Y direction
Since the same number of connections as the number of display electrodes or source (drain) wirings or gate wirings in the same direction are made between the printed circuit board and the mounting technology, there is a limit to the distance between the connectable connection parts. It was not possible to make a high-definition display.

In addition to the display main body, a printed circuit board, an IC and connection wiring are required, and the required area and required volume are several times as large as those of the display main body.

Since there are many connection points between the display main body and the printed circuit board and between the printed circuit board and the IC, and the weight is considerable, an unreasonable force is applied to the connection portion and the connection reliability is low.

On the other hand, as a method for solving such a drawback, it has been proposed to configure the active element and the peripheral circuit by TFTs on the same substrate in a display, particularly a display device using the active element as a switching element. There is. However, according to this configuration, the above-mentioned 3
Although one of the shortcomings can be almost solved, another new problem has occurred.

In addition to the active element, the peripheral circuit also has a TF.
The number of elements formed on the same substrate increases because of the T-type,
The manufacturing yield of the TFT was reduced. Therefore, the manufacturing yield of the display was also reduced.

The peripheral circuit portion has a very complicated element structure as compared with the element structure of the active element portion. Therefore, the circuit pattern becomes complicated, the manufacturing process technology becomes more sophisticated, and the cost increases. In addition, the number of multi-layered wirings naturally increased, resulting in an increase in the number of process steps and a reduction in the manufacturing yield of TFTs.

Since a transistor forming a peripheral circuit is required to have a high response speed, a polycrystalline semiconductor is usually used. Therefore, in order to polycrystallize the semiconductor layer,
A high temperature process was required and an expensive quartz substrate or the like had to be used.

[0013]

SUMMARY OF THE INVENTION The present invention relates to a liquid crystal display device which solves the above six problems in a proper balance and has a low cost and a high manufacturing yield.

One of the inventions disclosed in the present specification is the first
A substrate and a second substrate, and the first substrate and the second substrate
The electro-optic modulation layer provided between the substrate and the first
A plurality of thin film transistors provided on a substrate;
Provided on one substrate, each of the plurality of thin film transistors
Connected to one of the source or drain
A plurality of pixel electrodes and a plurality of thin film transistors
A plurality of X-direction wirings connected to the
On the other side of the source or drain of the thin film transistor.
A plurality of Y-direction wirings connected to each other and the plurality of thin films
Supply a signal to at least one of the transistors
A thin film transistor provided in the peripheral circuit on the first substrate.
A transistor and a peripheral circuit on the first substrate.
Thin film inside the peripheral circuit
The transistor has the same structure as the plurality of thin film transistors.
Electro-optical device characterized by being provided with a structure
It is a place.

Another aspect of the present invention disclosed in the present specification is an electro-optical modulation layer provided between a first substrate and a second substrate and the first substrate and the second substrate. When, of connecting the plurality of thin film transistor provided over a first substrate, provided on said first substrate, one of a source over scan or a drain of said plurality of thin film transistors each
Of the plurality of pixel electrodes and the plurality of thin film transistors
A plurality of X-direction wirings connected to the gate electrode, and
The other of the source or drain of a plurality of thin film transistors
A plurality of Y-direction wirings connected to the
Supply signal to at least one of the thin film transistors
A thin film provided in the peripheral circuit on the first substrate
Provided in the transistor and the peripheral circuit on the first substrate
It is composed of a semiconductor chip
The film transistor is the same as the plurality of thin film transistors.
A structure having a plurality of thin film transistors is provided.
Source and drain and thin film transistor in the peripheral circuit
The source and drain of the star have an oxygen content of 7 x 10
¹⁹ atoms · cm ⁻³ or less
It is an electro-optical device.

One of the other inventions disclosed in the present specification is
A first substrate and a second substrate; the first substrate and the first substrate;
An electro-optic modulation layer provided between the second substrate and the first substrate;
A plurality of thin film transistors provided on one substrate;
A plurality of thin film transistors are provided on the first substrate, each of which is provided on the first substrate.
Connected to one source or drain of the
Of the plurality of pixel electrodes and the plurality of thin film transistors
A plurality of X-direction wirings connected to the gate electrode, and
The other of the source or drain of a plurality of thin film transistors
A plurality of Y-direction wirings connected to the
Supply signal to at least one of the thin film transistors
A thin film provided in the peripheral circuit on the first substrate
Provided in the transistor and the peripheral circuit on the first substrate
It is composed of a semiconductor chip
The film transistor is the same as the plurality of thin film transistors.
A structure having a plurality of thin film transistors is provided.
Source and drain and thin film transistor in the peripheral circuit
The source and drain of the star have an oxygen content of 7 x 10
¹⁹ atoms · cm ⁻³ or less, and the plurality of thin films
The channel formation region of the transistor has an oxygen content of 5 ×
Characteristic of being 10 ²¹ atoms · cm ⁻³ or less
Is an electro-optical device.

[0017] That is, the second placed against a plurality of gate lines, the first substrate on which the pixel matrix is formed with a plurality of source (drain) line and the thin film transistor first substrate An electro-optical device comprising a liquid crystal composition held between said substrate and said pair of substrates, the peripheral circuit being connected to matrix wiring in the X or Y direction formed on said first substrate. at least a portion of the peripheral circuit to the thin film transistor of the same structure as the active elements connected to said pixel, remaining peripheral circuits Ru der what is a semiconductor chip.

Further, for connection between the IC as the remaining peripheral circuit not formed into a TFT and the substrate, the IC chip is directly provided on the substrate and the COG method or IC chip for connecting to each connection terminal is used.
This can be realized by the TAB method in which each resin substrate is provided on a flexible organic resin substrate and the resin substrate and the display substrate are connected.

That is, according to the present invention, not all the peripheral circuits of the liquid crystal display device are formed into TFTs, but only a simple part of the element structure, a functional part with a small number of elements, or a circuit part for which a general-purpose IC is difficult to obtain. only news only turned into TFT costly portion of the IC, with an increase of the production yield of liquid crystal display device, the manufacturing cost can be reduced.

Further, by forming a part of the peripheral circuit into a TFT, a large number of external ICs, which have conventionally been required, are required.
And the manufacturing cost can be reduced.

[0021] Furthermore, the thin film transistor and a result of the complementary structure that created the active element and the peripheral circuit at the same process (CTFT), improves the ability of the pixel driving, it is possible to provide redundancy in the peripheral circuit, the margin It was possible to drive a liquid crystal display device.

Further, if all the peripheral circuits are made into TFTs, it is necessary to increase the size of the display substrate in both the X and Y directions, and the area occupied by the entire display device becomes large. It is possible to realize a display device that can be easily adjusted to the external dimensions of a computer or a device that uses the display device and has a small occupied area and occupied volume by only slightly increasing the size of the board.

A portion of the peripheral circuit having a complicated element structure,
For example, an advanced fabrication technique is required to make a device structure that requires multi-layer wiring, a part having an amplifier function, etc. into a TFT. By using a conventional IC, a simple element structure or a portion having a simple function can be formed into a TFT, and a display device can be realized at low cost and high yield.

Further, the number of thin film transistors in the peripheral circuit portion can be considerably reduced by forming only a part of the TFT. Simply, when the peripheral circuit functions in the X and Y directions are the same, the number is almost half. Become. As described above, by reducing the number of elements to be formed into TFTs, it is possible to improve the manufacturing yield of the substrate and realize a display device that can reduce the area and volume of the substrate at low cost.

Furthermore, the semiconductor layer used for the TFT can be manufactured at a low temperature by using a semi-amorphous semiconductor of a new concept instead of the polycrystalline or amorphous semiconductor which has been conventionally used, and the carrier It is possible to realize a TFT having an extremely high mobility and a high response speed.

This semi-amorphous semiconductor is LPC
It can be obtained by performing a thermal crystallization process after forming a film by a VD method, a sputtering method, a PCVD method or the like, but the following description will be given taking the sputtering method as an example.

That is, in the sputtering method, when a single crystal silicon semiconductor is used as a target and sputtering is performed with a mixed gas of hydrogen and argon, atomic silicon is separated from the target due to sputtering (impact) of heavy atoms of argon, and the target is formed. It flies on a substrate having a surface, but at the same time, a lump in which several tens to several hundreds of thousands of atoms are solidified separates from the target as a cluster and flies to the formation surface.

In this flight, hydrogen bonds with the dangling bonds of silicon around the outer periphery of this cluster, and in the bonded state, it is formed as a relatively highly ordered region on the formation surface. That is, there is a high degree of order on the surface on which the film is formed and S
A state of a mixture of clusters having i-H bonds and pure amorphous silicon is realized. 450 ℃ ~ 700
By the heat treatment in a non-oxidizing gas at ℃, Si-H bond around the outer periphery of the cluster reacts with other Si-H bond,
Make Si bond.

This bond pulls each other and at the same time
Highly ordered clusters tend to shift their phase to a more highly ordered state, crystallization. However, between adjacent clusters, Si-Si bonded to each other pulls each other. As a result, the crystal has a lattice distortion and the crystal peak in laser Raman is 520 cm of the single crystal.
It is measured at a lower wavenumber than ^-1 .

Since the Si-Si bonds between the clusters anchor (connect) each other's clusters, the energy bands in each cluster can be electrically connected to each other via the anchoring points. Therefore, it is fundamentally different from polycrystalline silicon in which the crystal grain boundaries act as a carrier barrier, and the carrier mobility is 10 to ²⁰⁰ cm ² / VS.
ec can be obtained.

That is, it can be expected that the semi-amorphous semiconductor based on the Karuru definition has an apparently crystalline property but is substantially free of crystal grain boundaries. Of course, when the annealing temperature is a silicon semiconductor, 450 ° C ~
When crystallization is performed with crystal growth of 1000 ° C. or higher, instead of medium temperature annealing of 700 ° C., the crystal growth causes oxygen and the like in the film to break out into grain boundaries to form a barrier. This is a material (polycrystal) having the same crystal and grain boundary as the single crystal.

Further, when the degree of anchoring between clusters in this semiconductor is increased, the carrier mobility is increased. For this purpose, the amount of oxygen in this film is 7 × 10 ¹⁹ cm ^−3, preferably 1 × 10 ¹⁹ cm 3.
^{When it is -3} or less, in addition to crystallization at a temperature lower than 600 ° C, high carrier mobility can be obtained.

[0033]

[Embodiment 1] In this embodiment, a liquid crystal display device having an m × n circuit configuration as shown in FIG. 1 will be described. That is, only the analog switch array circuit portion 1 of the peripheral circuit portion connected to the wiring in the X direction in FIG. 1 is made into a TFT 5 like the active element provided in the pixel 6, and the peripheral circuit connected to the wiring in the Y direction. For the part, only the analog switch array circuit part 2 is made into a TFT, and the other peripheral circuit parts are IC4.
Then, it is connected to the substrate by the COG method. Where TF
The T-shaped peripheral circuit portion is formed as a CTFT (complementary structure) like the active element provided in the pixel.

The actual arrangement of electrodes and the like corresponding to this circuit structure is shown in FIG. In FIG. 2, only a portion corresponding to 2 × 2 is shown to simplify the description.

First, a method of manufacturing a TFT on the liquid crystal display device used in this embodiment will be described with reference to FIG. FIG.
In (A), a silicon oxide film as a blocking layer 51 of 1000 to 300 is formed on a glass 50, such as quartz glass, which can withstand a heat treatment at 700 ° C. or lower, for example, about 600 ° C., by a magnetron RF (radio frequency) sputtering method.
It is made to a thickness of 0Å. The process conditions were an atmosphere of 100% oxygen, a film forming temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The deposition rate using quartz or single crystal silicon for the target was 30 to 100 Å / min.

A silicon film was formed thereon by LPCVD (Low Pressure Vapor Phase) method, sputtering method or plasma CVD method. When forming by the reduced pressure vapor phase method, it is 1 more than the crystallization temperature.
450-550 ° C, which is low by 00-200 ° C, for example, 530 ° C
Disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H
₈ ) was supplied to a CVD apparatus to form a film. The pressure in the reaction furnace was 30 to 300 Pa. Deposition rate is 50 ~ 250Å /
It was a minute. In order to control the threshold voltage (Vth) of the NTFT and the PTFT to be approximately the same, boron is used in an amount of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ by using diborane.
It may be added during the film formation as a concentration of.

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ⁻⁵ Pa or less, the single crystal silicon is used as a target, and argon is mixed with hydrogen in an amount of 20 to 80%. For example, argon is 20% and hydrogen is 80%. The film forming temperature is 150 ° C., the frequency is 13.56 MHz,
The sputter output was 400 to 800 W and the pressure was 0.5 Pa.

When a silicon film is formed by the plasma CVD method, the temperature is, for example, 300 ° C., and monosilane (SiH
₄ ) or disilane (Si ₂ H ₆ ) was used. These were introduced into a PCVD apparatus, and high-frequency power of 13.56 MHz was applied to form a film.

The coatings formed by these methods are
Oxygen is preferably 5 × 10 ²¹ cm ⁻³ or less. If this oxygen concentration is high, it is difficult to crystallize, and the thermal annealing temperature must be high or the thermal annealing time must be long. If the amount is too small, the leak current in the off state increases due to the backlight. Therefore 4 × 10
The range was ¹⁹ to 4 × 10 ²¹ cm ⁻³ . 4x hydrogen
It was 10 ²⁰ cm ⁻³ and was 1 atom% when compared with silicon 4 × 10 ²² cm ⁻³ . In order to further promote crystallization with respect to the source and drain, the oxygen concentration is 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ c.
m ⁻³ or less, and oxygen is ion-implanted into only the channel formation region of the TFT forming the pixel to form 5 × 10 ²⁰ to
You may add so that it may become 5 * 10 < ²¹ > cm <^-3> . At that time, since the TFTs forming the peripheral circuit are not irradiated with light, it is effective to reduce the mixing of oxygen and have a higher carrier mobility in order to operate at high frequency.

Next, a silicon film in an amorphous state is formed into 500
~ 5,000 Å, for example, 1500 Å after making, 4
Medium temperature heat treatment in a non-oxide atmosphere at a temperature of 50 to 700 ° C. for 12 to 70 hours, for example, 600 in a hydrogen atmosphere.
Hold at a temperature of ° C. Since the amorphous silicon oxide film is formed on the surface of the substrate under the silicon film, no specific nuclei are present in this heat treatment, and the whole is uniformly annealed by heating. That is, it has an amorphous structure at the time of film formation, and hydrogen is simply mixed therein.

By annealing, the silicon film shifts from an amorphous structure to a highly ordered state, and a part thereof assumes a crystalline state. In particular, a region having a relatively high degree of ordering after the film formation of silicon tends to be crystallized and become a crystalline state. However, since silicon existing between these regions is bonded to each other, the silicon members pull each other. A single crystal silicon peak 522 measured by laser Raman spectroscopy
A peak shifted to the low frequency side from cm ^-1 is observed. The apparent particle size is 5 when calculated from the half-width.
Although it is a microcrystal with 0-500Å, in reality, there are many highly crystalline regions and they have a cluster structure, and each cluster is a semi-amorphous structure in which silicon is bonded (anchoring) with each other. Was able to be formed.

As a result, the coating film is in a state in which it may be said that there is substantially no grain boundary (hereinafter referred to as GB). Carriers can easily move from one cluster to another through anchored points, so
The carrier mobility is higher than that of polycrystalline silicon that clearly exists. That is, hole mobility (μh) = 10 to 200 cm
² / VSec, electron mobility (μe) = 15 to 300 cm
² / VSec is obtained.

On the other hand, when the film is polycrystallized by high-temperature annealing at 900 to 1200 ° C. instead of annealing at a medium temperature as described above, segregation of impurities in the film occurs due to solid-phase growth from nuclei, and GB is in GB. The amount of impurities such as oxygen, carbon, and nitrogen increases, and the mobility in the crystal is high, but it creates a barrier in GB and hinders the movement of carriers there. As a result, it is difficult to obtain a mobility of 10 cm ² / Vsec or more. That is, in this embodiment, the silicon semiconductor having the semi-amorphous or semi-crystal structure is used for the reason as described above.

In FIG. 3A, the silicon film is photoetched using a first photomask, and a PTFT region 22 (channel width 20 μm) is shown on the right side of the drawing.
A region 13 for FT was made on the left side.

On this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000Å, for example, 1000Å. This was performed under the same conditions as the production of the silicon oxide film as the blocking layer. During this film formation, a small amount of fluorine may be added to immobilize sodium ions.

Thereafter, phosphorus is added to the upper side in an amount of 1 to 5 × 10.
A silicon film having a concentration of ²¹ cm ⁻³ or this silicon film and a multilayer film of molybdenum (Mo), tungsten (W), MoSi ₂ or WSi ₂ was formed thereon. This was patterned with a second photomask to obtain FIG. 3 (B). Gate electrode 55 for PTFT, NT
A gate electrode 56 for FT was formed. For example, the channel length is 10 μm, phosphorus-doped silicon is 0.2 μm as a gate electrode.
m, and molybdenum was formed thereon to a thickness of 0.3 μm. In FIG. 3C, a photoresist 57 is formed using a photomask, and boron is added to the source 59 drain 58 for PTFT at 1 to 5 × 10 ¹⁵ cm ^−2.
Was added by the ion implantation method. Next in FIG.
As shown in (D), a photoresist 61 was formed using a photomask. Source 64 and drain 6 for NTFT
Phosphorus as 2 was added by an ion implantation method at a dose amount of 1 to 5 × 10 ¹⁵ cm ⁻² .

These are performed through the gate insulating film 54. However, in FIG. 3B, the gate electrodes 55 and 56 are
May be used as a mask to remove silicon oxide on the silicon film, and then boron and phosphorus may be directly ion-implanted into the silicon film.

Next, heat annealing was performed again at 600 ° C. for 10 to 50 hours. The source 59 and the drain 58 of the PTFT and the source 64 and the drain 62 of the NTFT were produced as P ⁺ and N ⁺ by activating impurities. Also gate electrode 5
Channel formation regions 60 and 63 are formed as semi-amorphous semiconductors below 5 and 56.

In this way, the C / TFT can be manufactured without applying a temperature above 700 ° C. in all steps even though it is a self-aligned method. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and the process is extremely suitable for a large- pixel liquid crystal display device.

In this embodiment, thermal annealing is performed as shown in FIG.
Done twice in (D). However, the annealing of FIG. 3A may be omitted depending on the desired characteristics, and both may be performed by the annealing of FIG. 3D to shorten the manufacturing time. In FIG. 4A, the inter-layer insulator 65 was formed as a silicon oxide film by the above-described sputtering method. The silicon oxide film may be formed by using the LPCVD method, the photo CVD method, or the atmospheric pressure CVD method. For example, it is formed to have a thickness of 0.2 to 0.6 μm, and then a window 66 for an electrode is formed using a photomask. Further, aluminum is formed on all of them by a sputtering method, and leads 71, 72 and contacts 67,
After forming 68 using a photomask, an organic resin 69 for flattening the surface, for example, a translucent polyimide resin was applied and formed, and electrode holes were formed again using the photomask.

As shown in FIG. 4B, two TFTs have a complementary structure, and the output terminal thereof is connected to the electrode of one pixel of the liquid crystal device as a transparent electrode. Tin oxide film) was formed. Etching it with a photomask, the electrode 7
Configured 0. This ITO film was formed at room temperature to 150 ° C. and was annealed at 200 to 400 ° C. in oxygen or air. In this way, PTFT22 and NTF
The same glass substrate 50 is used for T13 and the electrode 70 of the transparent conductive film.
Made above. The electrical characteristics of the obtained TFT are PTF.
At T, the mobility is 20 (cm ² / Vs), and Vth is −5.9.
(V), the mobility is 40 (cm ² / Vs) in NTFT,
Vth was 5.0 (V).

The arrangement of electrodes and the like in the pixel portion of this liquid crystal display device is shown in FIG. The NTFT 13 is connected to the first scanning line 1
5 is provided at the intersection of the data line 21 and the first scanning line 15
Similarly, NTFTs for other pixels are also provided at the intersections of the data lines 14 and the data lines 14. On the other hand, PTFT is the second scan line 1
It is provided at the intersection of 8 and the data line 21. Also,
An NTFT for another pixel is provided at the intersection of another adjacent first scanning line 16 and data line 21. A matrix structure using such C / TFT is provided. The NTFT 13 is connected to the first scanning line 15 via the contact at the input end of the drain 64, and the gate 56 is connected to the data line 21 in which the multilayer wiring is formed.
The output terminal of the source 62 is connected to the pixel electrode 1 through the contact.
It is linked to 7.

On the other hand, in the PTFT 22, the input end of the drain 58 is connected to the second scanning line 18 via a contact,
The gate 55 is connected to the data line 21, and the output end of the source 59 is connected to the pixel electrode 17 via a contact like the NTFT. Thus, the pixel 23 made of the transparent conductive film and the C / TF are sandwiched (inside) between the pair of scanning lines 15 and 18.
One pixel is composed of T and T. By repeating this structure horizontally and vertically, a 2 × 2 matrix is enlarged to 640 × 480, 1280 × 960.
Such a large pixel liquid crystal display device can be used.

As described above, the CMOS structure is provided with the NTFT 13 and the PTFT 22 which are manufactured in the same process as the switching element.

As described above, one of the substrates is completed,
The other substrate is attached by a conventional method, and STN liquid crystal is injected between the substrates. Next, as the remaining peripheral circuits, I
Use C4. The IC 4 is connected by COG to each of the X-direction wiring and the Y-direction wiring of the substrate.
Only connecting leads for supplying power and data from the outside are connected to each of the IC4, and there is no need to attach an FPC for connecting to one side of the board. The number is considerably reduced and the reliability is improved. As described above, to complete the liquid crystal display device.

In this embodiment, only the analog switch array portion 1 of the X-direction side peripheral circuit is used and only the analog switch array portion 2 of the Y-direction side peripheral circuit is used.
Converted to FT and C / TF in the same process as the switching element
However, the remaining peripheral circuit portion is composed of the IC4, but the present invention is not particularly limited to this structure, and in consideration of the yield in forming a TFT, the process technology problem in forming a TFT, and the like, It suffices to make only the part that can be easily made into a TFT.

In this embodiment, since the semi-amorphous semiconductor is used as the semiconductor film, its mobility is 10 times or more that of the TFT using the non-single crystal semiconductor. Therefore, it can be sufficiently used for the TFT of the peripheral circuit that requires a high response speed, and the TFT of the peripheral circuit portion does not need to be specially crystallized as in the conventional case, and is formed in the same process as the active element. I was able to.

Further, since the C / TFT structure is used as the active element connected to the liquid crystal pixel, the operation margin is expanded, the pixel potential does not fluctuate, and a constant display level can be secured. Even if it is defective, there is an advantage that it does not cause a noticeable defect display.

[0059]

Second Embodiment FIG. 5 shows a schematic external view of the liquid crystal display device of this embodiment. The basic circuit and the like are exactly the same as in the first embodiment. In FIG. 5, the portion of the peripheral circuit connected to the wiring in the Y direction, which is composed of the IC 4, has the IC formed directly on the substrate by the COG method. The IC 4 is provided separately on the upper and lower parts of the substrate.

In this case, in the connection between the pad electrode of the IC 4 and the wiring in the Y direction, the gap can be made narrower than in the case where the IC is formed on only one side. Therefore, it has a feature that a higher definition display pixel can be designed. Furthermore, since the IC is provided on the substrate, the volume of the IC hardly increases, and a thinner liquid crystal display device can be provided.

In the above embodiments, all the TFTs of the active element have the CMOS structure. However, the TFTs are not limited to this structure, and may be composed of only NTFT and PTFT. The number of elements is increased in the configuration.

The position where the TFT is formed on the substrate is set to X.
TFTs are formed not only on one side that is connected to the wiring in the Y direction or the Y direction but also on the other side, and TF is alternately formed.
By connecting T and halving the density of the TFT, it was possible to improve the manufacturing yield of the TFT.

[0063]

According to the present invention, the liquid crystal display cannot be made finer due to the limitation of external connection technology.
Further, since unnecessary connection between the X-direction wiring or the Y-direction wiring and the external peripheral circuit can be minimized, the reliability at the connection portion is improved.

Since only some of the peripheral circuits are made into TFTs,
The area occupied by the display board itself can be reduced,
In addition, the substrate can be freely designed to have the required size and shape. Further, it is possible to avoid the problem in manufacturing the TFT and to make only the portion having a high manufacturing yield into the TFT. Therefore, the manufacturing cost could be reduced.

Since a semi-amorphous semiconductor is used as the semiconductor film used for the TFT, a response speed that can be sufficiently used for peripheral circuits can be obtained, and no special processing is performed as it is in the process of forming an active element, The TFT for the circuit could be made at the same time.

In the present invention, the threshold value is clarified by connecting the complementary TFTs to each matrixed pixel, the switching speed is increased, and the operation margin is expanded.
Even if there are some defective TFTs, the compensation can be performed to some extent. The number of photomasks required for fabrication is NT
This is only twice as compared with the conventional example using only FT.
Since the carrier mobility is 10 times or more higher than that when amorphous silicon is used, the size of the TFT can be reduced, and even if two TFTs are provided in one pixel, the aperture ratio is hardly reduced. With many features.

Therefore, compared with the active TFT liquid crystal device using only the NTFT up to now, several stages of manufacturing yield and screen vividness can be achieved.

Claims (3)

[Claims] 1. A first substrate and a second substrate, an electro-optical modulation layer provided between the first substrate and the second substrate, and an electro-optical modulation layer provided on the first substrate. A plurality of thin film transistors, a plurality of pixel electrodes provided on the first substrate, each of which is connected to one of a source and a drain of the plurality of thin film transistors, and connected to a gate electrode of the plurality of thin film transistors. A plurality of X-direction wirings, a plurality of Y-direction wirings respectively connected to the other of the sources or drains of the plurality of thin film transistors, and supplying a signal to at least one of the plurality of thin film transistors. A thin film transistor provided in a peripheral circuit on the substrate; and a semiconductor chip provided in the peripheral circuit on the first substrate. Thin film transistor, an electro-optical device, characterized in that are provided have the same structure as the plurality of thin film transistors. 2. A first substrate and a second substrate, an electro-optical modulation layer provided between the first substrate and the second substrate, and an electro-optical modulation layer provided on the first substrate. A plurality of thin film transistors, a plurality of pixel electrodes provided on the first substrate, each of which is connected to one of a source and a drain of the plurality of thin film transistors, and connected to a gate electrode of the plurality of thin film transistors. A plurality of X-direction wirings, a plurality of Y-direction wirings respectively connected to the other of the sources or drains of the plurality of thin film transistors, and supplying a signal to at least one of the plurality of thin film transistors. A thin film transistor provided in a peripheral circuit on the substrate; and a semiconductor chip provided in the peripheral circuit on the first substrate. TFT is provided having the same structure as the plurality of thin film transistors, a source and a drain of said plurality of thin film transistors,
The electro-optical device, wherein the source and the drain of the thin film transistor in the peripheral circuit have an oxygen content of 7 × 10 ¹⁹ atoms · cm ⁻³ or less. 3. A first substrate and a second substrate, an electro-optical modulation layer provided between the first substrate and the second substrate, and an electro-optical modulation layer provided on the first substrate. A plurality of thin film transistors, a plurality of pixel electrodes provided on the first substrate, each of which is connected to one of a source and a drain of the plurality of thin film transistors, and connected to a gate electrode of the plurality of thin film transistors. A plurality of X-direction wirings, a plurality of Y-direction wirings respectively connected to the other of the sources or drains of the plurality of thin film transistors, and supplying a signal to at least one of the plurality of thin film transistors. A thin film transistor provided in a peripheral circuit on the substrate; and a semiconductor chip provided in the peripheral circuit on the first substrate. TFT is provided having the same structure as the plurality of thin film transistors, a source and a drain of said plurality of thin film transistors,
The source and drain of the thin film transistor in the peripheral circuit have an oxygen content of 7 × 10 ¹⁹ atoms · cm ⁻³ or less, and the channel forming regions of the plurality of thin film transistors have an oxygen content of 5 × 10 ²¹ atoms · cm 3. An electro-optical device characterized by being ^-3 or less.