JPH08221962A - Data recorder - Google Patents

Abstract

PURPOSE: To obtain a data recorder capable of successively forming plural partitions on a tape and requiring very short time for initializing processing. CONSTITUTION: When the tape is initialized, the partition A is formed of a dummy track and DIT being header information at the head of the tape. A VSIT in which the volume information of the tape is stored is also formed with the partition A. At such a time, a CLT track is not alloted to the rear (EOT side) of the partition A. Therefore, initialization is performed in a very short time. When newly forming the partition B, the dummy track is written at the rear of the partition A, and continuously the new partition B is formed, then the content of the VSIT is updated concurrently.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recording device for recording a large amount of data sequentially,
The present invention relates to a data recording device for recording on a magnetic tape by a helical scan head.

[0002]

2. Description of the Related Art At present, with the increase in data capacity, there is an increasing need for a data recording device for recording data on a magnetic tape as a means for storing a large amount of data. In a recording medium using such a magnetic tape, unlike a recording medium using a disk, data is generally recorded sequentially.

At this time, longitudinal tracks are formed on the magnetic tape at the upper and lower sides in the width direction of the tape.
A helical track is formed in the meantime. This helical track is adopted to effectively use this magnetic tape, and is a helical scan head that a head mounted on a rotating drum rotates obliquely with respect to the traveling direction of the tape for recording. It is formed by recording.

Of the upper and lower longitudinal tracks, the upper track is a control track, and control pulses are recorded on it. The lower track is a time code track, on which the time code is recorded. This time code indicates the position in the longitudinal direction of the tape, and is a physical ID of the tape, and is recorded, for example, at a ratio of 1 to 12 helical tracks. By reading this time code, it is possible to know where the head is currently located on the tape. For this time code, for example, SMPTE time code is used.

This magnetic tape is, for example, tape 1.
A very large capacity, such as a capacity of 42 GByte, is used. Therefore, this magnetic tape is usually designed so that one tape can be divided into a plurality of areas for use. This area is called a partition or volume. Header information indicating the beginning of the partition area is written at the beginning of this partition. By setting the partition area in this way, one tape can be used as if it were a plurality of tapes.

As described above, when a plurality of partitions are set on one tape, the user needs to search for a desired partition. here,
There are the following two methods for executing this search.

One is an IDC (IDCount) search for calculating a physical ID from a rotation angle of a reel of a tape. In this method, since the physical ID of the tape is indirectly obtained from the tape, it is not necessary to create the time code track on the tape to the target search position.
Therefore, in the case where the time code track is not created between the partitions, the IDC search is inevitably adopted in order to move between the partitions. For example, a case where a new partition is directly created in an unused area of the tape corresponds to this example.

Another search method is an IDR (ID Read) search in which the time code written in the time code track in the longitudinal direction is scanned and the desired position is searched while reading the physical ID of the tape. This IDR search is accurate because the search is performed while actually reading the physical ID written on the tape.

[0009]

However, each of the above-mentioned two types of search methods has drawbacks. In the case of IDC search, the physical ID of the tape is indirectly obtained and calculated. Therefore, for example, an ID whose physical ID is directly obtained from the information on the tape described above.
An error of several percent or more occurs as compared with the R method. Therefore, when a search is required especially over a long distance of the tape, the error becomes large and becomes a problem.

On the other hand, in the IDR search, if there is a portion where the time code track is not created before the target search position, the search processing is interrupted. That is, according to this search method, a new partition cannot be created in a portion where the time code track is not created.

Therefore, in this IDR search,
While accurate search is possible, in the tape initialization process, it is necessary to create a time code track over the entire recordable area of the recordable area of the tape (this process is called pre-erase). for that reason,
This initialization process takes a very long time. For example, in the case of the above-mentioned 42 GByte tape, about 2 hours are required for the initialization process.

Therefore, an object of the present invention is to provide a data recorder which can successively create a plurality of partitions on a tape and which requires a very short time for initialization processing.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention creates a new partition at a position in the tape end direction from an existing partition, at least between the existing partition and the new partition. In the data recorder, an address indicating a tape position is arranged on a track in the longitudinal direction of the tape.

In order to solve the above-mentioned problems, the present invention, when creating a new partition at a position in the tape end direction from an existing partition, causes an error when a target position is searched without reading the address of the new partition. In the data recorder, an address indicating a tape position is arranged at least in a track in the longitudinal direction of the magnetic tape in a range capable of absorbing.

[0015]

According to the above construction, by using the present invention, it is possible to newly create a partition even in a place where a time code track is not created.

[0016]

Embodiments of the present invention will be described below in the order shown below.
Description will be given with reference to the drawings. a. Magnetic tape device to which the present invention can be applied b. Tape initialization processing c. Partition creation method d. Initialization processing common to the first and second embodiments e. Partition creation method in the first embodiment e1. Brief description e2. Detailed description of processing f. Partition creating method in the second embodiment f1. Brief description f2. Detailed description of processing g. Modification g1. First modification g2. Second modification

A. Magnetic tape device to which the present invention can be applied Prior to description of the present invention, a magnetic tape device to which the present invention can be applied will be described. The magnetic tape device described here records / reproduces digital data on / from a cassette tape by a rotary head, and will be referred to as a data recorder in the following description.

This data recorder records / reproduces digital data on / from a cassette tape with a rotary head. FIG. 1 shows an example of the head arrangement of the recorder 2. Four heads Ra, Rb, Rc, and R for recording are provided on the drum 25 that rotates at a predetermined speed in the illustrated direction.
d and four heads for reproduction Pa, Pb, Pc and Pd
Are attached respectively.

The heads Ra and Rb are provided in close proximity to each other, and similarly, the heads Rc and Rd, the heads Pa and Pb, and the pair of heads Pc and Pd are provided in close proximity to each other. Further, the extension direction (called azimuth) of the gap between these two adjacent heads is different. Heads Ra facing each other at 180 ° intervals
And Rc has a first azimuth, similarly 180 °
Heads Rb and Rd facing each other at a distance of 2 have a second azimuth. The heads Pa and Pc have the first azimuth, and the heads Pb and Pd have the second azimuth. The different azimuths are used to prevent crosstalk between adjacent tracks. The two adjacent heads are actually realized as an integrally structured head called a double azimuth head.

A tape (for example, 1/2 inch width) pulled out from the cassette is obliquely wound around the peripheral surface of the drum 25 over an angular range slightly larger than 180 °. The tape is fed at a predetermined speed. Therefore, at the time of recording, in the first half of the period in which the drum 25 makes one rotation, the head Ra
And Rb scan the tape, and in the latter half, the heads Rc and Rd scan the tape. During playback, the head Pa
And Pb scan the tape, then heads Pc and Pd scan the tape.

As a recording format of a tape used in such a data recorder, for example, there is a DTF format proposed by the American standard ANSI X3.175-1990. Also in this invention, a format based on this DTF format is adopted. An example of a format that can be used in the present invention will be described below.

FIG. 2 shows a track pattern on the tape of the data recorder. Longitudinal tracks are formed on the upper and lower sides of the tape in the width direction, and helical tracks are formed between them. A control signal is recorded on the upper longitudinal track 26 and the lower longitudinal track 2 is recorded.
In 7, a time code is recorded. Hereinafter, these longitudinal tracks 26 and 27 will be collectively referred to as CTL tracks. The time code indicates the position of the tape in the longitudinal direction, and for example, SMPTE time code is used. With one rotation of the drum 25, the two heads Ra and Rb simultaneously form two helical tracks Ta and Tb, and then the two heads Rc and Rd simultaneously form two helical tracks Ta and Tb. It should be noted that each helical track is formed by separating the first half portion and the second half portion, and a tracking pilot signal recording area 28 is provided in the middle portion.

The SMPTE time code was developed for a video signal such as a VTR, and its minimum unit is a frame (1/30 second). As will be described later, the data recorder has four tracks Ta to Td shown in FIG.
Is a unit of data (referred to as a track set) that handles recordable data. For example, if 16 tracks correspond to one frame of a video signal,
Digits lower than the digit of the time code frame (0, 1,
It is necessary to provide a time code (also referred to as ID) in units of track set by providing a value of 2, or 3. In the case of SMPTE time code, since the user data area is prepared, such a correction is possible.

FIG. 3 schematically shows the system configuration of the data recorder. As shown in the figure, this system comprises a tape drive controller section 1 and a digital information recorder section 2. The main functions of the system controller 31 in the controller unit 1 are as follows. Management of SCSI controller 32 Management of buffer memory 33 File management / table management Data writing, reading, retry management Digital information recorder unit 2 control Self-diagnosis

A connection with a host computer is made via the SCSI controller 32. Buffer memory 33
A drive controller 34 is provided between the tape controller and the tape drive controller. The data read from the buffer memory 33 is supplied to the C2 encoder 35 via the drive controller 34. C2 encoder 3
5 to the track interleave circuit 36 and C1
The encoder 37 is connected.

The C2 encoder 35 and the C1 encoder 37 are for performing error correction coding of the product code on the recording data. Further, the track interleave circuit 36 controls distribution of data to tracks when recording data in order to improve the ability to correct errors that occur in the recording / reproducing process.

Further, when data is recorded on the tape, since the SYNC block divided by the sync signal is used as a unit, the block interleave circuit 36 adds the block sync signal. Further, in the C1 encoder 37, after the C1 parity is generated, data randomization and word interleaving processing in a plurality of SYNC blocks are performed.

The digital data from the C1 encoder 37 is transmitted to the digital information recorder unit 2. The digital information recorder unit 2 encodes the digital data received by the channel code encoder 38 to generate RF,
Print data is output to the print heads Ra to Rd via the amplifier 39. Recording data is recorded on the tape by the heads Ra to Rd. The RF / amplifier 39 processes the partial response class 4 (PR (1,0, -1)).

The data reproduced from the tape by the reproducing heads Pa to Pd is supplied to the channel code decoder 42 via the RF and amplifier 41. RF, amplifier 41
Includes a reproduction amplifier, an equalizer, a Viterbi decoder, and the like.
The output of the channel code decoder 42 is transmitted to the tape drive controller unit 1 and input to the C1 decoder 43.

A track deinterleave circuit 44 is connected to the C1 decoder 43, and a C2 decoder 45 is further connected to the deinterleave circuit 44. The C1 decoder 43, the track deinterleave circuit 44, and the C2 decoder 45 respectively include a C1 encoder 37, a track interleave circuit 36, and a C2 encoder.
A process opposite to the process performed by each of the encoders 35 is performed. The reproduction (read) data from the C2 decoder 45 is transferred to the buffer memory 33 via the drive controller 34.
Is supplied to.

The digital information recorder section 2 is provided with a system controller 46. Further, a fixed head 47 for the tracks in the longitudinal direction of the tape is provided, and this head 47 is connected to a system controller 46, and the head 47 records / reproduces a control signal and a time code. The system controller 46 is connected to the system controller 31 of the tape drive controller unit 1 via a bidirectional bus.

A mechanism controller 48 is connected to the system controller 46. The mechanism controller 48 includes a servo circuit and drives a motor 50 via a motor drive circuit 49. The system controller 46 has, for example, two CPUs, and the system controller 46 performs communication with the tape drive controller unit 1, control of time code recording / reproduction, control of recording / reproduction timing, and the like.

The mechanism controller 48 is, for example, 2
It has CPUs and controls the mechanical system of the digital information recorder unit 2. More specifically, the header
The mechanism controller 48 controls the rotation of the tape system, the tape speed, the tracking, the loading / unloading of the cassette tape, and the tape tension. The motor 50 generally represents a drum motor, a capstan motor, a reel motor, a cassette mounting motor, a loading motor, and the like.

Further, the tape drive controller unit 1
DC voltage from the power supply unit 51 of
A C-DC conversion circuit 52 is provided. Although not shown in the figure, the digital information recorder unit 2 is provided with a position sensor such as a tape end detection sensor and a time code generation / reading circuit.

Next, the format for recording digital data will be described. FIG. 4 shows the layout of the entire tape (for example, the tape in one cassette).
The entire tape is a physical volume. Leading end P of physical tape to which leader tape is connected
BOT (Physical Beginning of Tape) and terminal PEO
The areas that can be recorded between T (Physical End of Tape) are LBOT (Logical Beginning of Tape) and LE.
It is between OT (Logical End of Tape). This is because the tape is easily damaged at the beginning and end of the tape and the error rate is high. As an example, the invalid area between PBOT and LBOT is defined as 7.7 ± 0.5 m, and the invalid area between PBET and LBET is 10 m.
Defined as greater.

In order to manage one or more partitions (logical volumes), VSIT (V
olume Set Information Table) is recorded. VSIT
Has the number of volumes recorded on the tape and position information of each logical volume on the tape. Location information is
The physical ID of each VIT of the maximum 512 logical volumes, the final physical ID, and the logical ID of the VIT. Furthermore, the flag of the presence or absence of UIT of each logical volume is also VSI.
Included in T.

The position of the beginning of VSIT is the position of 0-ID. The ID is an address corresponding to a position on the tape that is assigned to each set of four tracks. From the VSIT area to the DIT area of the last volume, the ID is added monotonically. The length of one VSIT is 1-ID
Is.

A logical volume is a DIT (Directory Inf
ormation table), UIT (User Information Table) and user data area. The DIT has information for managing files in the logical volume. The length of one DIT is 40-ID. UIT is optional, as not shown in FIG. UIT
Is user-specific information for managing files.

In FIG. 4, the shaded areas are run-up areas. The data track is servo-locked by the run-up area. The area with dots is a position margin band. This position margin band prevents erasing valid data when VSIT and DIT are updated.

VSIT is repeatedly recorded 10 times, as shown in FIG. 5A, in order to improve the reliability of data. Therefore, the VSIT area is 10 track sets (= 10-ID). 90 after the VSIT area
A retry area larger than the track set is secured.

The DIT is repeatedly recorded seven times as shown in FIG. 5B in order to improve the reliability of the data. The DIT is composed of 6 tables as shown in FIG. 5C. The six tables are
T (Volume Information Table), BST (Bad Spot Tabl)
e), LIDT (Logical ID Table), FIT (File Inform
application table), UT (Update Table), UIT (User Info)
rmation Table). VIT, BST, LIDT, U
T has a length of 1-ID and FIT has a length of 20-ID. The remaining 16-ID area is reserved.

Each table of DIT will be described. V
The IT ID address is the top physical ID of the volume written in VSIT, and its logical ID is VSI.
It is the head logical ID of the volume written in T. V
The IT includes volume information such as the volume label, the starting physical ID of the first data block in the physical volume, and the last physical ID thereof.

The ID address of BST is the physical I of VIT.
D + 1 and its logical ID is VIT logical ID + 1
Is. The BST contains logically invalid data information.
Logically invalid data is data that should be treated as invalid because data having the same track set ID is written later. For example, as shown in FIG. 6, the shadow area A is logically invalid data. The write retry operation and the write operation associated with it cause logically invalid data. If an error occurs during writing, write retry is automatically performed, the error location is output, and this is registered in BST. Then, during the read operation, the invalid area is designated by the BST. Data that is logically invalid is also called a bad spot. The BST manages start physical IDs and end physical IDs of up to 14592 bad spots.

The ID address of the LIDT is the physical ID of VIT + 2, and its logical ID is the logical ID of VIT +
It is 2. LIDT is a data table for fast block space and locate operations.
That is, the logical ID of each pointer of the first to 296th pointers, its physical ID, file number, I
The first block number in the D data block management table is included in the LIDT.

The ID address of the FIT is the physical I of the VIT.
D + 3, and its logical ID is VIT logical ID + 3
Is. The FIT is composed of two types of data pairs corresponding to the tape mark. The tape mark is the delimiter code of the file. The Nth data pair corresponds to the Nth tape mark from the beginning of the volume. One data of the pair is the physical ID of the Nth tape mark. This value is the physical track set ID of the tape mark
Is. The other data is the absolute block number of the Nth tape mark. This value is the absolute block number of the last block with the same file number as the tape mark. Since the position of the tape mark is known, the physical position on the tape can be accessed at high speed.

The ID address of the UT is the physical ID of the VIT
It is +39. UT is information indicating whether or not the volume has been updated. Before the update, the word (4 bytes) indicating the update status in the UT is FFFFFFFFh.
(H means hexadecimal), and after updating, this is set to 00000000h.

UIT is an optional area, for example, an area of 100-ID. It is a data table accessible to the user and is reserved for the user header.

In this example, 1-ID is assigned to each track set consisting of four helical tracks. The logical structure of the data block is defined for each track set. FIG. 7 shows a logical track set structure. The first 4 bytes of the logical track set is the format ID, which is FFFF0000h.

The next 136 bytes (34 words) is the subcode data area. The subcode data consists of management information of the related track set. For example, the ID of the above-mentioned table (VSIT, VIT, BST, etc.)
Is included in the subcode.

The number of bytes obtained by removing the length of the block management table from the next 116884 bytes is the user data area. If the size of the user data does not reach the specified size, the dummy data is packed in the remaining area. The formats of the track sets defined in the user data area include user track sets, tape mark (TM) track sets, and EOD (End Of Da).
ta) There are four types: track set and dummy track set. A subcode is defined for each format of these track sets.

A block management table area is provided after the user data area. The block management table is
The maximum length is 4096 bytes. The last 4 bytes of the track set are the end code of the track set (0F0
F0F0Fh), and the previous 12 bytes are reserved. The block management table manages the data block configuration of user data.

The logical format of the above data recorder is shown in FIG. VSIT is recorded for each physical volume such as one tape. A DIT is recorded for each logical volume (partition), and five tables VIT, BST, LIDT, and FI are recorded in the DIT.
T, UT are included, and UIT is optionally included. In addition, a track set is defined for each four Heliel tracks, and four types of user track sets, a tape mark track set, an EOD (End Of Data) track set, and a dummy track set are defined in the user data area in the track set. To be done.

FIG. 9 shows an example of a system configuration for controlling this data recorder. 61 is the main CPU,
70 is a 2-port RAM, 80 is a bank memory, and 81 is a sub CPU. The main CPU 61 is a CPU that manages the entire system. A CPU bus 62 is provided in association with the main CPU 61, and each component is coupled to the CPU bus 62. That is, ROM (flash ROM) 63, PIO (parallel I / O) 65, control panel 66, LCD 67, timer 68, RS2
32C interface 69, 2-port RAM 70, R
AM71 is coupled.

The PIO 65 is connected to the buttons on the front panel. The LCD 67 is a display device that displays the operating status of the drive so that the user can see it. RS2
The 32C interface 69 is connected to the serial terminal. The RAM 71 is a work R used by the firmware.
It has an AM, a program download area, and an area for temporarily storing header information (VSIT / DIT).

Unidirectional control element 7 for CPU bus 62
The IM bus 74 is connected via the terminal 3. This IM bus 7
4, S-RAM 72, bank memory 80, SC
The SI controller 75 is connected. A host computer is connected to the SCSI controller 75 via a bus 76. The S-RAM 72 is a capacitor backup RAM, a script RAM, and a memory that actually holds logger data. This memory can hold data for about two days after the power is turned off.

The two-port RAM 70 has two CPUs 6
Five types of packets for communication of information between 1 and 81 are stored. These are: Command transmission packet: a packet used when requesting the CPU 61 to 81 to execute an operation. End status reception packet: a packet used for notifying the end status when the CPU 81 executes a command requested by the CPU 61 and the operation ends. Command status; a flag for indicating the progress of the command. Drive management status table; drive status is C
This is a table for notifying the PU 61. This table is rewritten by the CPU 81 at regular intervals. Data transmission / reception packet; a buffer used when the firmware on the drive (recorder) side is downloaded via the SCSI bus, or when the drive side diagnostic is activated using the serial port of the CPU 61. The bank memory 80 is a buffer memory for data.

The sub CPU 81 is a CPU for controlling the drive. CPU bus 8 associated with sub CPU 81
2 is provided, and a ROM (flash RO
M) 83, RAM (work RAM) 84, timer 8
5, RS232C interface 86, RS422 interface 87, PIO 88, DMA controller 89 are connected, and further the 2-port RAM 70 and bank memory 80 are connected.

The bank memory 80 is a bank memory for storing the data on the tape. For example, the bank memory 80 has eight memory banks, and write data or read data is stored here. A DMA (Direct Memory Access) controller 89 is a controller for pasting the data written in the drive to the bank memory 80. RS232C interface 86
Is for diagnostics. The RS422 interface 87 is a communication means with the drive, and the drive is controlled via this. Data exchange with the tape is performed via the PIO 88.

B. Tape Initialization Processing This section describes the tape initialization processing that has already been adopted in the data recorder as described above. 10 and 11 show a flowchart at this time, and FIG. 12 schematically shows a concrete image of the tape at the time of initialization processing. In addition, in the flowcharts of FIGS. 10 and 11, the main CPU 61
And the processing of the sub CPU 81 is shown in parallel.

In this initialization process, first, CTL tracks are created over the entire length of the recordable area of the tape. Furthermore, VSI which is management information of the entire tape
The TIT and the DIT that is the header information of the partition are written.

First, the sub CPU 81 is the main CPU 6
It waits until the command transmission packet is sent from 1. (Step S500). In step S501,
When the main CPU 61 receives a tape initialization command from the host computer, dummy track data is set in the bank memory 80 (step S502).
Then, the pre-erase command is sent to the sub CPU 81 from the main CPU 61 to the 2-port RAM 70. The main CPU 61 that has sent this command determines that the sub-CP
It waits until the command end packet is sent from U81 (step S504). When the transmitted command is received by the 2-port RAM 70, the 2-port RAM 70
A command transmission packet is sent from 70 to the sub CPU 81.

This command transmission packet is the sub CPU 8
RS422 interface 87 when received at 1
A tape rewinding command is sent to the system controller 46 of the digital information recorder unit 1 via (step S505). When the rewinding of the tape is completed, the system controller 46 sends a command indicating the rewinding completion to the sub CPU 81 via the RS422 interface 87. When this command is received by the sub CPU 81, the rewinding completion is confirmed (step S506).

In step S306, the sub CPU 81
When it is confirmed that the rewinding is completed,
A CTL track write command is sent to the system control 46 via the S422 interface 87 (step S507), and by receiving this sent command, a CTL track is created on the tape. This CTL track is created over the entire length of the recordable area of the tape as described above. The state of the tape at this time is shown in FIG. 12A. In the figure, the shaded area represents the area in which the CTL track has already been written. Further, in the figure, the left end is the head side of the tape and the right end is the end side of the tape.

When the CTL track is created over the entire recordable area of the tape and the data transfer is completed, the system controller 46 notifies the DMA controller 89 via the RS422 interface 87 that the transfer is completed. In response to this, the DMA controller 89 sends a status indicating the end of transfer to the sub CPU 81, and the status is received by the sub CPU 81 (step S508). As a result, the completion of writing is confirmed (step S509), and the execution result is 2 port R.
It is sent to the AM 70 (step S510). When the execution result is sent out, the sub CPU 81 again returns to the main CPU.
A state in which a command transmission packet from 61 is awaited (FIG. 11, step S511).

The DMA controller 89 which receives the execution result sends a command end packet to the main CPU 61. This command end packet contains the status of the execution result indicating the end of the transfer described above. In step S512, the command end packet is received by the main CPU 61. When the main CPU 61 receives this command end packet, the main CPU 61 writes a VS in the bank memory 80 to write the tape.
Header information such as IT and DIT and a dummy track are set (step S513).

In the next step S114 shown in FIG. 11, the write command is issued to the main C to the sub CPU 81.
The data is sent from the PU 61 to the 2-port RAM 70 (step S514). Main CPU 61 that sent this command
Waits until the command end packet is sent from the sub CPU 81 (step S515). When the transmitted instruction is received by the 2-port RAM 70, 2
A command transmission packet is sent from the port RAM 70 to the sub CPU 81.

This command transmission packet is the sub CPU 8
RS422 interface 87 when received at 1
A tape rewinding instruction is sent to the system controller 46 of the digital information recorder unit 1 via (step S516). When the rewinding of the tape is completed, the system controller 46 sends a command indicating the rewinding completion to the sub CPU 81 via the RS422 interface 87. When this command is received by the sub CPU 81, the completion of rewinding is confirmed (step S517), and the process proceeds to the next step.

In step S117, the sub CPU 81
When it is confirmed that the rewinding is completed,
Header information and a dummy track write command are sent to the system control 46 via the S422 interface 87, and the DMA controller 8
An instruction to transfer these data is sent to the CPU 9 (step S518).

The DMA controller 89, which has received the transmitted command, transmits a command to the system controller 46 via the RS422 interface 87. Under the control of the controller 46 that receives this command sent out, the tape is IDR searched and advanced to a predetermined position. Then, the DMA controller 89 starts the transfer of data from the bank memory 80 to the drive controller 34 of the digital information recorder unit 2 via the PIO 88. As a result, the header information and the dummy track are written at a predetermined position on the tape.

When the transfer of these necessary data is completed and the writing is completed, the system controller 46 sends RS4
The end of the transfer is notified to the DMA controller 89 via the interface 22. DM that received this
A status indicating the end of the transfer is sent from the A controller 89 to the sub CPU 81.
1 is received (step S519). As a result, the completion of writing is confirmed (step S520), and the execution result is sent to the 2-port RAM 70 (step S5).
21). When the execution result is sent, the role of the sub CPU 81 in this initialization processing ends.

The DMA controller 89 which receives the execution result sends a command end packet to the main CPU 61. This command end packet contains the status of the execution result indicating the end of the transfer described above. This command end packet is the main C
It is received by the PU 61 (step S522), the status of the execution result contained therein is returned to the host computer via the SCSI controller 75 or the like (step S523), and a series of initialization processing is completed.

The state of the tape when this initialization is completed is shown in FIG. 12B. Immediately after the initialization, the entire tape is made into one partition, and the management information of this partition is written in the area of partition A shown in the figure by DIT and dummy tracks. Also, after the area of this partition A, the CTL track is written up to the end of the tape.
No data is written to the helical track.

C. Partition Creation Method This section describes the process of creating a new partition that has already been used in the data recorder as described above on the tape that has been initialized and has only one partition created. FIG. 13 shows a flowchart at this time.

In step S530, the main CP that has received a partition creation command from the host computer.
The U61 sets the header information such as DIT and EOD necessary for creating a partition and the dummy track in the bank memory 80 (step S531).

During this time, the sub CPU 81 is in the main C
It is in a state of waiting for a command transmission packet from the PU 61 (step S532).

When step S531 ends, the process proceeds to step S533. In this step S533,
The writing instruction to the sub CPU 81 is the main CPU
A command transmission packet is transmitted from 61 to the sub CPU 81 via the 2-port RAM 70. The main CPU 61, which has sent the command, waits for a command end packet from the sub CPU 81 (step S534).

This command transmission packet is the sub CPU 8
RS422 interface 87 when received at 1
A tape search command is sent to the system controller 46 of the digital information recorder section 2 via the (step S535). The tape is searched by IDR search, and when the desired ID is found, the search is completed,
R from the system controller 46 to the sub CPU 81
A command indicating completion of search is sent via the S422 interface 87. When the sub CPU 81 receives this command, it is confirmed that the search is completed (step S536), and the process proceeds to the next step.

In step S336, the sub CPU 81
When it is confirmed that the search is completed,
The header information and the dummy track write command are sent to the system control 46 via the 422 interface 87, and the DMA controller 89
In response, a transfer command for these data is sent (step S337). DM that received this sent command
The A controller 89 starts data transfer from the bank memory 80 to the drive controller 34 of the digital information recorder unit 2 via the PIO 88. As a result, the header information and the dummy track are written at a predetermined position on the tape.

When the transfer of these necessary data is completed and the writing is completed, the system controller 46 sends RS4
The end of the transfer is notified to the DMA controller 89 via the interface 22. DM that received this
A status indicating the end of the transfer is sent from the A controller 89 to the sub CPU 81.
1 (step S538). Thereby, the completion of writing is confirmed (step S539), and the execution result is sent to the 2-port RAM 70 (step S5).
40). When the execution result is sent, the role of the sub CPU 81 in this initialization processing ends.

The DMA controller 89 which receives the execution result sends a command end packet to the main CPU 61. This command end packet contains the status of the execution result indicating the end of the transfer described above. This command end packet is the main C
It is received by the PU 61 (step S541), the status of the execution result contained therein is returned to the host computer via the SCSI controller 75 and the like (step S542), and a series of partition creation processing is completed.

The state of the tape when this partition is created is shown in FIG. 12C. In this way, the management area of the newly created partition B is created on the area where the CTL track has already been created. Therefore, as described above, in this conventional partition creating method, it is necessary to create the CTL tracks in advance over the entire length of the recordable area of the tape, and it takes a very long time to initialize the tape. did. In addition, in this figure,
The portion provided between the partition A and the partition B is an area called a partition gap.

D. Initialization Processing Common to First and Second Embodiments This section describes an example of tape initialization processing common to the first and second embodiments of the present invention. FIG. 14 shows a flowchart at this time.

In the initialization processing according to the present invention, the CTR track over the entire length of the recordable area of the tape, which is the same as the conventional initialization processing described above, is not created first, and the entire tape is directly recorded. Management information VSIT and partition header D
IT is written.

In step S100, when the main CPU 61 receives a tape initialization command from the host computer, header information such as VSIT and DIT and dummy track data are set in the bank memory 80 (step S101). At this point, the sub-CP
U81 is in a state of waiting for a command transmission packet from the main CPU 61 (step S102).

When the above-mentioned respective data are set in the bank memory 80, a write command to the sub CPU 81 is sent from the main CPU 61 to the 2-port RAM 70 (step S103). Main C that sent this command
The PU 61 waits until the command end packet is sent from the sub CPU 81 (step S104).
When the sent instruction is received by the 2-port RAM 70, the 2-port RAM 70 sends the instruction to the sub CPU 81.
The command transmission packet is transmitted.

This command transmission packet is sent to the sub CPU 8
RS422 interface 87 when received at 1
A tape rewinding instruction is sent to the system controller 46 of the digital information recorder unit 1 via (step S105). When the rewinding is completed, the system controller 46 sends a command indicating the rewinding completion to the sub CPU 81. When this command is received by the sub CPU 81, the completion of rewinding is confirmed (step S106).

In step S106, the sub CPU 81
When it is confirmed that the rewinding is completed,
Header information and a dummy track write command are sent to the system control 46 via the S422 interface 87, and the DMA controller 89
In response, a header information and dummy track data transfer command is sent (step S107).

The DMA controller 89 which has received the sent command starts the transfer of the data from the bank memory 80 to the drive controller 34 of the digital information recorder section 2 via the PIO 88. An example of the operation at this time will be described with reference to FIGS. 15 and 16. FIG. 15A shows a state in which rewinding is completed after step S105. At this time, the head is located at the tip of the tape, and this is assumed to be 0ID.

Next, the tape is subjected to IDC search and advanced from the above-mentioned temporary 0ID to 4000ID (FIG. 15B), and the position of the head at this time is set to -1600ID. Then, the -1600 ID to -400 ID is added to the ID of the CTL track data sent from the bank memory 80.
Is shaken (FIG. 15C). Furthermore, this -400 ID ~
A dummy track is written in the 1720ID by the data sent from the bank memory 80 (FIG. 15D).

Then, from the position of 1720ID, the DIT is written by the data sent from the bank memory 80. The position of the head at the time when the writing of DIT is completed is 2000ID, as shown in FIG. 15E. Next, dummy tracks and CTL tracks are written from 2000ID to 2599ID (see FIG. 15).
F) Further, the EOD indicating the end of the data is written in 2600 ID to 2616 ID by the data sent from the bank memory 80 (FIG. 16A).

Here, the tape is rewound once. Then, the head position is set to −400ID by the IDR search, and the dummy track is written from this position to 0ID (FIG. 16B). And this 0ID-10ID
In addition, the data sent from the bank memory 80 causes the VSI
T is written (FIG. 16C), and further, 10ID to 69.
A dummy track is written in 9ID (see FIG. 16).
D). When this writing is completed, the tape is rewound to the beginning (FIG. 16E).

In this way, the partition A and VSIT are created on the tape. In addition, within the range of the area where these are written, C
A TL track is also created.

When the partition A and VSIT are created and the data transfer is completed, the system controller 4
6 to DMA via RS422 interface 87
The controller 89 is notified of the end of the transfer. Receiving this, the DMA controller 89 to the sub CPU 81
In response to this, a status indicating the end of transfer is sent out and is received by the sub CPU 81 (step S108). This confirms the end of writing (step S109),
The execution result is sent to the 2-port RAM 70 (step S110). When the execution result is sent, the role of the sub CPU 81 in this initialization processing ends.

The DMA controller 89 which receives the execution result sends a command end packet to the main CPU 61. This command end packet contains the status of the execution result indicating the end of the transfer described above. This command end packet is the main C
It is received by the PU 61 (step S111), the status of the execution result included therein is returned to the host computer via the SCSI controller 75 and the like (step S112), and a series of initialization processing ends.

The state of the tape when this initialization processing is completed is shown in FIG. 17A. In the figure, the left end is the beginning of the tape, and the right end is the end of the tape. As shown in the drawing, the partition A and VSIT (not shown) by DIT or the like are directly written on the tape.
Further, no data is written on the tape after the partition A.

In this initialization method, since the CTL track is not created over the entire length of the recordable area of the tape, the initialization time is extremely short. However, the fact that the CTL track is not created means that only the IDC search can be performed when searching the tape, as shown in the above-mentioned problem. This problem can be solved by using the partition creating method described below according to the present invention.

E. Partition creation method in the first embodiment e1. Outline Description Next, an example of a partition creating method according to a first embodiment of the present invention will be described with reference to the drawings. In this embodiment, when a new partition B is created on the tape initialized by the above method, the space between the existing partition A and the new partition B is filled with dummy tracks.

FIG. 17A shows a state where the tape is initialized and the partition A is created by the above-described method of the present invention. In the figure, the left end is the beginning of the tape and the right end is the end of the tape. No processing is applied from the partition A toward the end.

To create a new partition B on this tape, first, as shown in FIG. 17B, a dummy track is written after the existing partition A. This is called the partition gap. At this time, C
The TL track is also written at the same time. When the writing of the dummy track is completed, the partition B is continuously created (FIG. 17C).

As described above, by writing the dummy tracks in succession to the existing partition, even if the CTL tracks are not created over the entire length of the recordable area of the tape in the initialization process, the CTL tracks are sequentially created. You can create a new partition.

E2. Details of Processing Next, details of the partition creating method according to this embodiment will be described with reference to the flowchart and the drawings. 18 and 19 show flowcharts according to this embodiment.

At this time, the tape is already IDR searched, the head position is already at the EOD position indicating the end of the data of partition A, for example, 10000 ID, and the size of the new partition is, for example, 100.
It shall be designated as MByte.

First, the sub CPU 81 is the main CPU 6
It waits until the command transmission packet is sent from 1. (Step S200). In step S201,
When the main CPU 61 receives an instruction to create a new partition B from the host computer, dummy track data is set in the bank memory 80 (step S202). Then, the sub CPU
A dummy track write command is sent to the 81 from the main CPU 61 to the 2-port RAM 70 (step S203). Main CPU 61 that sent this command
Waits until the command end packet is sent from the sub CPU 81 (step S204). When the transmitted instruction is received by the 2-port RAM 70, 2
A command transmission packet is sent from the port RAM 70 to the sub CPU 81.

This command transmission packet is sent to the sub CPU 8
RS422 interface 87 when received at 1
A dummy track write command is sent to the system controller 46 of the digital information recorder unit 1 via the, and a dummy track data transfer command is sent to the DMA controller 89 (step S20).
5). The DMA controller 89 that receives the sent command starts the transfer of data from the bank memory 80 to the drive controller 34 of the digital information recorder unit 2 via the PIO 88. This allows
A dummy track is created on the tape. An example of the operation at this time will be described with reference to FIG.

First, dummy tracks are written in 10016ID to 16615ID (FIG. 20A), and at the same time CL
The T track is also written. This is a partition gap provided between the newly created partition B and the immediately preceding partition A.

When the dummy track data transfer is completed in this way, the system controller 46 sends RS4
The end of the transfer is notified to the DMA controller 89 via the interface 22. D receiving this
A status indicating the end of the transfer is sent from the MA controller 89 to the sub CPU 81 and is received by the sub CPU 81 (step S206). As a result, the completion of writing is confirmed (step S207), and the execution result is sent to the 2-port RAM 70 (step S20).
8). When the execution result is sent, the sub CPU 81 again waits for a command transmission packet from the main CPU 61 (step S209).

The command end packet is sent to the main CPU 61 by the DMA controller 89 which receives the execution result. This command end packet contains the status of the execution result indicating the end of the transfer described above. In step S210, the command end packet is received by the main CPU 61, and VSIT or D for writing to the tape is written in the bank memory 80.
Header information such as IT and a dummy track are set (step S211).

In the next step S212, the sub CP
A write command is sent to the U81 from the main CPU 61 to the 2-port RAM 70. The main CPU 61 that has sent this command waits until the command end packet is sent from the sub CPU 81 (step S2).
13). When this transmitted instruction is received by the 2-port RAM 70, the sub-CPU 81
, The command transmission packet is transmitted.

This command transmission packet is sent to the sub CPU 8
1 is received from the sub CPU 81 via the RS422 interface 87, the system control 46
To the DMA controller 89, while the header information and the dummy track write command are sent to
Transfer instructions for these data are sent (step S2).
14).

The DMA controller 89 which has received the transmitted command transmits a command to the system controller 46 via the RS422 interface 87. Under the control of the controller 46 that receives this command sent out, the tape is IDR searched and advanced to a predetermined position. Then, the DMA controller 89 starts the transfer of data from the bank memory 80 to the drive controller 34 of the digital information recorder unit 2 via the PIO 88. As a result, the header information and the dummy track are written at a predetermined position on the tape. An example of the operation at this time will be described with reference to FIG.

First, 16616 ID to 16855 ID
DIT is written in (FIG. 20B). Here, since the head position has not moved since the writing of the dummy track was completed in step S205, the search is not performed. Continuously, 16856 ID ~ 17456
A dummy track is written in ID (FIG. 20C), and EOD indicating the end of data is written in 17456ID to 17472ID (FIG. 20D). The range of this partition B is from 16616 ID to 17472 ID written here, and its size is set to 100 MBytes designated first. Further, the CLT track is also written in this range at the same time.

Next, the tape is searched and rewound to 0ID. Then, VSIT is written in 0ID to 10ID (FIG. 20E), and the volume information of the tape is updated. Subsequently, dummy tracks are written to 10ID to 109ID (FIG. 20F), and the creation of partition B is completed.

Thus, the transfer of the necessary data is completed,
When the writing is completed, the system controller 46 sends R
The end of transfer is notified to the DMA controller 89 via the S422 interface 87. In response to this, the DMA controller 89 sends a status indicating the end of the transfer to the sub CPU 81.
It is received by U81 (step S215). Thereby, the completion of writing is confirmed (step S216), and the execution result is sent to the 2-port RAM 70 (step S217). When the execution result is sent, the role of the sub CPU 81 in creating the new partition ends.

The command end packet is sent to the main CPU 61 by the DMA controller 89 which receives the execution result. This command end packet contains the status of the execution result indicating the end of the transfer described above. This command end packet is the main C
It is received by the PU 61 (step S218), the status of the execution result included therein is returned to the host computer via the SCSI controller 75 or the like (step S219), and a series of new partition creation processing ends.

F. Partition creating method in the second embodiment f1. General Description Next, a second embodiment of the present invention will be described with reference to the drawings. In the second embodiment, when a new partition is created, the area immediately before the specified position is
It is filled with dummy tracks in a range that takes into account the error of the C search processing. This dummy track guarantees a search to the new partition even if no CTL track has been created between the existing partition and the new partition. Further, as a result, in the second embodiment, not only the partitions are sequentially created as in the first embodiment described above, but also partitions can be created at random positions.

FIG. 21 schematically shows the creation of partitions in this embodiment according to the image of an actual tape. In the figure, the left end is the beginning of the tape and the right end is the end of the tape. FIG. 21A shows a state where the tape is initialized and the partition A is created by the method of the present invention described above. From this partition A to the end,
No treatment has been applied.

When a new partition is created on this tape, first, the designated position is searched by the IDC search. If the specified new partition creation position can be searched, a dummy track is written in this position. This is written over a range where the error due to the IDC search can be absorbed (FIG. 21B).

Next, as shown in FIG. 21C, a new partition B is created following this dummy track.
In this case, the area between the existing partition A and the dummy track immediately before the new partition is an area where no processing is performed.

When the partition is created in this way, the IDC search must be used to search the partition B. In this embodiment, since the dummy track is written just before the partition B so that the error of the IDC search is absorbed,
By using the C search and the IDR search together, it is possible to accurately search the partition B.

FIG. 22 schematically shows the search method at this time. Now, assume that partitions A and B are created on the tape as shown in FIG. 22A, and that the head is located at the beginning of partition A as the search start position. The search target position is the beginning of the partition B, as shown in the figure.

At this time, first, the partition B is searched by the IDC search. As a result, it is assumed that the head position is searched at the position shown in FIG. 22B due to an error in the IDC search. At this position, as described above, the dummy track is written in consideration of the error of the IDC search, and thus the CTL track is written. That is, an accurate search can be performed by performing an IDR search subsequent to this IDC search (FIG. 22C).

According to this partition creating method, it is not necessary that the CTL tracks are distributed between the partitions, and the partition can be created even where the CTL tracks are not distributed. Therefore, for example, in FIG.
Partition A and Partition B in 1C
It is also possible to create a new partition in between, and it is possible to create a relatively random partition.

F2. Details of Processing Next, details of the partition creating method according to this embodiment will be described with reference to the flowchart and the drawings. 23, FIG. 24, and FIG. 19 described above show a flowchart for creating a partition in this embodiment.

First, the sub CPU 81 is the main CPU 6
It waits until the command transmission packet is sent from 1. (Step S300). In step S301,
When the main CPU 61 receives an instruction to create a new partition B from the host computer, the process proceeds to the next step S302.

At step S302, the number of dummy track IDs to be written is calculated from the tape position where this partition B is created and the error of the drive. The number of IDs calculated at this time is set to a value such as 5000 IDs that can absorb an error generated when the partition B to be newly created is searched by the IDC search.

When the number of IDs is calculated in step S302, a search command to the sub CPU 81 is issued from the main CPU 61 to the 2-port R in the next step S303.
It is sent to the AM 70. The main CPU 61 that has sent this command waits until the command end packet is sent from the sub CPU 81 (step S304).
When the sent instruction is received by the 2-port RAM 70, the 2-port RAM 70 sends the instruction to the sub CPU 81.
The command transmission packet is transmitted.

This command transmission packet is sent to the sub CPU 8
RS422 interface 87 when received at 1
A search command is sent to the system controller 46 of the digital information recorder unit 1 via the (step S
305). This search command is issued by the system controller 46.
When it is received, the creation position of the designated partition B is searched. In this case, since the CTL track is not assigned to the right side of the existing partition A, that is, the end side of the tape, the IDC search is performed.

When the search is completed, the system controller 46 sends information indicating the end of the search to the DMA controller 89. In response to this, the DMA controller 89 sends a status indicating the end of the search to the sub CPU 81, and the status is received by the sub CPU 81. This confirms the end of the search (step S306), and the execution result is sent to the 2-port RAM 70 (step S307). When the execution result is sent, the sub CPU 81 is again in a state of waiting for a command transmission packet from the main CPU 61 (step S3).
08)

When the 2-port RAM 70 receives the execution result, a command end packet is sent to the main CPU 61. This command end packet contains the status indicating that the above-mentioned search has ended. When the command end packet is received by the main CPU 61 in step S309, a dummy track is set in the bank memory 80 (step S309).
310).

In the next step S311, the sub CPU 81
Dummy track write command for main CPU
It is sent from 61 to the 2-port RAM 70. The main CPU 61 that has sent this command waits until the command end packet is sent from the sub CPU 81 (step S312). This sent instruction is a 2-port RAM
When received by the 70, the sub-C from the 2-port RAM 70
A command transmission packet for instructing the writing of the dummy track is transmitted to the PU 81.

When the sent command transmission packet is received by the sub CPU 81, a dummy track write command is sent to the system control 46 and a data transfer command is sent to the DMA controller 89. (Step S313). The data transfer here is performed by the number of IDs calculated in step S302 described above, for example, by 5000 IDs.

When the predetermined data transfer is completed in step S313, the DMA controller 89 sends a status indicating the completion of the transfer to the sub CPU 81. When the sub CPU 81 receives this status in step S314, it is confirmed that the writing is completed (step S315), and the execution result is sent to the 2-port RAM 70 (step S316). When the execution result is sent, the sub CPU 81 again returns to the main C
It is in a state of waiting for a command transmission packet from the PU 61 (FIG. 18, step S209).

When the 2-port RAM 70 receives the execution result, a command end packet is sent to the main CPU 61. This command end packet contains the status indicating that the transfer of the dummy track has been completed. When the command end packet is received by the main CPU 61 in step S317, the header information of the partition B and the dummy track are set in the bank memory 80 (step S3).
19).

When the process of step S319 ends, the process proceeds to the flowchart shown in FIG. The subsequent processing of writing the header information and the dummy track is exactly the same as the processing of FIG. 18 showing the partition creating method in the first embodiment. That is, following step S319 in FIG.
In step S214, a command transmission packet including header information and a dummy track write command is sent from the main CPU 61 to the sub CPU 81 via the 2-port RAM 70.

The sub CPU 81 receiving this command transmission packet sends a write command to the system controller 46 and a data transfer command to the DMA controller 89 (step S).
215). These system controller 46 and DM
When the A controller 89 receives each command, writing of data on the tape is started.

When the data transfer is completed, the DMA controller 89 sends a status indicating the end of the data transfer to the sub CPU 81 (step S216).
The sub CPU 81 receiving this status sends the execution result of the data transfer to the main CPU 61 via the 2-port RAM 70 (step S217). Next, in step S218, this execution result is the main CP.
When received by U61, the execution result of new partition creation is sent from the main CPU 61 to the host computer (step S219), and the series of new partition creation processing according to this embodiment ends.

I. Modified Example The present invention can be applied to any device as long as the interface conforms to the DTF format as described above. Also, the CTL track is indispensable in a digital signal recording device in which recording and reproduction are performed by helical scanning. Therefore, the present invention is not limited to the application to the data recorder, and there are, for example, the following modifications.

I1. First Modified Example A first modified example is an example in which the digital data recording device according to the present invention is used as an emulator of a tape changer. In this case, a plurality of partitions are created in advance on one large-capacity recording tape, and these plurality of partitions are treated as one independent tape.

As described above, emulating a tape changer with a large-capacity tape is advantageous in terms of handling and space factor because a plurality of tapes, which were conventionally required, are collected. The advantage of moving a partition on a single tape is that the processing time is shorter than when using a changer to move the tape in and out, and it is possible to handle a large capacity media by handling a small capacity media. There is.

I2. Second Modified Example A second modified example of the present invention is an example used for an apparatus that requires recording data of a relatively small size in partitions into a sequential recording medium such as a tape. An example of this is an apparatus that records image data such as a commercial (CM) broadcast on television.

In such an apparatus, if the image data is handled in file units as in the conventional case, only the data in the middle cannot be rewritten. Here, by dividing the partition by the partition creating method according to the present invention, it is possible to rewrite the data in the middle of the process. In this case, it is not possible to write data of a size larger than the data already written in the partition, but in the case of CM, for example, the data sizes are almost the same, so this invention is suitable for use. is there.

[0142]

As described above, according to the present invention, it is not necessary to write the CTL track over the entire length of the recordable area of the tape when the tape is initialized. Therefore, there is an effect that the time required for the initialization of the tape is much shorter than the conventional time.

Further, conventionally, when the tape was initialized, it was necessary to write the CTL track over the entire length of the recordable area of the tape and then rewind the full length to write the header information and the like. . However, according to the present invention, at the time of initialization, the header information and the like are only written to the tip portion of the tape, so that the tape and the drive portion of the tape are less damaged than the conventional one. .

Further, according to the second embodiment of the present invention,
Since the CTL track does not have to be allocated between the partitions, there is an effect that a new partition can be created between the partition and another partition. Therefore, the tape, which is originally a sequential recording medium,
There is an effect that it is possible to use it by randomly accessing it.

Further, according to the second embodiment of the present invention,
Just before the new partition created after the existing partition, a dummy track is written so as to absorb the error of the IDC search. Therefore, when searching between partitions, IDC search and ID
R search can be used together. As a result, despite the fact that CTL tracks are not distributed between partitions,
There is an effect that a partition can be searched quickly and accurately.

Further, according to the present invention, when a new partition is created, the dummy track is written immediately before that. As a result, even if unnecessary data is already written in the area immediately before this new partition, the unnecessary data can be overwritten in advance by the dummy track.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a head arrangement of a data recorder to which the present invention can be applied.

FIG. 2 is a schematic diagram showing a track pattern of a data recorder to which the present invention can be applied.

FIG. 3 is a block diagram showing a system configuration of a data recorder to which the present invention can be applied.

FIG. 4 is a schematic diagram showing a tape format of a data recorder to which the present invention can be applied.

FIG. 5 is a VSI of a data recorder to which the present invention can be applied.
It is an approximate line figure showing the format of T and DIT.

FIG. 6 is a BST of a data recorder to which the present invention can be applied.
It is a schematic diagram for explaining.

FIG. 7 is a schematic diagram for explaining a logical format of a data recorder to which the present invention can be applied.

FIG. 8 is a schematic diagram for explaining a format structure of a data recorder to which the present invention can be applied.

FIG. 9 is a more detailed block diagram of a system configuration of a data recorder to which the present invention can be applied.

FIG. 10 is a flowchart illustrating an initialization process according to a conventional technique.

FIG. 11 is a flowchart illustrating an initialization process according to a conventional technique.

FIG. 12 is a schematic diagram showing a concrete image of a tape at the time of initialization processing and partition creation according to a conventional technique.

FIG. 13 is a flowchart for explaining partition creation according to a conventional technique.

FIG. 14 is a flowchart for explaining an initialization process according to the present invention.

FIG. 15 is a schematic diagram for explaining the operation of the initialization processing according to the present invention.

FIG. 16 is a schematic diagram for explaining the operation of the initialization processing according to the present invention.

FIG. 17 is a schematic diagram showing a specific image at the time of initialization processing and partition creation according to the first embodiment.

FIG. 18 is a flowchart for explaining partition creation according to the first embodiment.

FIG. 19 is a flowchart for explaining partition creation according to the first embodiment.

FIG. 20 is a schematic diagram for explaining an operation of creating a partition according to the first embodiment.

FIG. 21 is a schematic diagram showing a concrete image of a tape when creating a partition according to the second embodiment.

FIG. 22 is a schematic diagram for explaining an operation when searching between partitions.

FIG. 23 is a flow chart for explaining partition creation according to the second embodiment.

FIG. 24 is a flowchart for explaining partition creation according to the second embodiment.

[Explanation of symbols]

 61 Main CPU 70 2-port RAM 80 Bank Memory 81 Sub CPU 87 RS422 Interface 88 PIO Interface 89 DMAC

Claims (6)

[Claims] 1. In a data recorder for recording digital data on a magnetic tape, when a new partition is created at a position in the tape end direction from an existing partition, between the existing partition and the new partition, A data recorder, wherein at least an address indicating a tape position is arranged on a track in the longitudinal direction of the magnetic tape. 2. The data recorder according to claim 1, wherein the digital data is recorded on the tape by a helical scan method. 3. The data recorder according to claim 1 or 2, wherein the number of all partitions existing on the same tape and their position information are collectively recorded as tape management information. Recorder. 4. In a data recorder for recording digital data on a magnetic tape, when a new partition is created at a position in the tape end direction from an existing partition, the target position is read without reading the address of the new partition. A data recorder, wherein at least an address indicating a tape position is arranged on a track in a longitudinal direction of the magnetic tape in a range capable of absorbing an error in a search. 5. The data recorder according to claim 4, wherein the digital data is recorded on the tape by a helical scan method. 6. The data recorder according to claim 4 or 5, wherein the number of all partitions existing on the same tape and their position information are collectively recorded as tape management information. Recorder.