JPH08195850A - Data transmission system in picture data processor - Google Patents

Abstract

PURPOSE: To make a picture data processor simple constitution and to transmit and receive processed picture data by a desired transmission line. CONSTITUTION: The picture data to which a prescribed processing is applied in a data processing part 100 are tentatively stored in a frame memory 130, read in a memory controller 120 at need, compressed in a compression/expansion part 110 and recorded through a card interface 150 in a memory card 170. When the plural picture data are recorded and one of the picture data is required to be transmitted, the desired data are read through the card interface 150 and tentatively stored in the frame memory 130. When storage is ended, an I/O card corresponding to the transmission line such as a modem card or the like is mounted to a card slot 160. Thus, a call is connected to a called party terminal and the picture data are transmitted front the frame memory 130.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission system in an image data processing device, and more particularly to a data transmission in an image data processing device applied to a host processing device handling image data such as a digital electronic still camera. Regarding the scheme.

[0002]

2. Description of the Related Art For example, a digital electronic still camera takes a subject image with an image pickup device such as a CCD (Charged coupled device), converts it into image data in a digital format in a signal processing unit, and uses it in a frame memory or the like. Image data read from the frame memory is compressed by a compression / expansion unit according to a predetermined compression encoding method, and the compressed data is stored in an image recording medium such as a memory card via a memory controller. To record. When the image data recorded on the memory card is read out via the memory controller, it is decompressed in the decompression process in the process opposite to the compression process in the compression decompression unit, temporarily stored in the frame memory, and then read from the frame memory. The output image data is converted into a displayable analog signal by the signal processing unit and displayed on a monitor device or the like.

An apparatus for receiving image data from a predetermined transmission line such as a telephone line in the above digital electronic still camera has been proposed in Japanese Patent Laid-Open No. 6-237402. An image reproducing apparatus and method for receiving the above-described compressed image data and displaying it on a monitor device have been proposed in Japanese Patent Laid-Open No. 5-122538.

In the former device, a communication control unit for controlling the reception of data is connected to the system control unit of the camera, and a serial interface (I / F) for converting the received data into serial / parallel is connected to the system control unit of the camera. It had a communication mode as a mode. In this camera, a modem device that modulates and demodulates image data is connected to the serial I / F, a communication device such as a telephone is further connected to the modem device, and a transmission line such as a telephone line connected to this communication device is used. It constitutes a receiving system for receiving image data. In this case, the received signal from the communication device is demodulated by the modem and supplied to the camera as serial data. The camera uses the serial I /
It is converted into parallel image data at F and supplied to the system control unit via the communication control unit. Image data from the system controller is temporarily recorded in the frame memory or code RAM where data such as calculation parameters are written during compression / expansion, and then recorded in a memory card or displayed on a monitor device connected to the camera. To be done. Therefore, in this camera, in the communication mode, the frame memory or code RAM that is available except during compression / decompression processing
By using as a reception buffer, the camera can perform the reception processing without providing a new memory such as a reception buffer in the camera.

Further, in the latter device and method, a predetermined amount of compressed data is accumulated in a buffer memory provided between a receiving unit that receives compressed data from a transmission line and an expanding unit that expands the compressed data. At that time, the data is sent to a decompression unit, the data is decompressed and the images represented by the received image data are sequentially reproduced, and the reception state is displayed on a monitor device or the like. In this case, as compared with the case where the image data is completely received in the buffer memory and then displayed, the reception state can be visually checked on the monitor device, so that the receiver can receive the image data without worrying about the waiting time. It was something that could be done.

[0006]

However, in the above-mentioned conventional technique, it is difficult to reduce the size of the original device because a plurality of circuits related to the data reception other than the part for processing the image data must be added to the device. There was a problem of becoming. In particular, in the case of the former camera, it is necessary to provide a communication control unit and serial I / F on the camera and also connect it to a modem and a telephone, which poses a problem that the entire system becomes large and complicated. It was Further, in this case, since the received data is taken into the camera via the system control unit, there is a problem that recording or processing of the data becomes complicated and it takes time. In the latter case, the receiving unit corresponds to the transmission line in a one-to-one manner, so that the transmission line is different, for example from an existing telephone line.
When receiving data from other transmission lines such as ISDN line or LAN line, we could not cope except by replacing with a device that has a receiving unit corresponding to these. Further, when other processing such as recording of image data is performed, there is a problem that the circuit becomes more complicated. In addition, no consideration was given to the case where both of them transmit image data.

Therefore, the inventor of the present application uses a PC card including an input / output (I / O) card such as a modem card, which has been standardized in a personal computer in recent years, as an image data processing device such as an electronic still camera. It was considered to apply the technology to simplify the configuration of the device. However, in this case, many problems had to be solved, such as the need to establish compatibility between the data speed inside the camera and the data speed unique to the PC card. For example, in a memory card among PC cards, data is handled in a predetermined sector unit in order to be compatible with a hard disk, but in an SRAM card or the like, data can be freely read in byte units and transferred. Further, since the compression process is performed inside the camera, the transfer rate of each data is not constant even in one image due to the characteristics of the image and the compression ratio. In addition, even I / O cards such as modem cards and LAN cards that transfer data serially, and SCSI (Small Computer System) that transfers data in bit serial
Interface) card etc. Therefore, there are problems such as compatibility with the above-mentioned memory card and data having different speeds inside the device, and how to supply these data to the I / O card.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the prior art and allows a host processing apparatus for processing image data such as a digital electronic still camera to accurately transmit and receive image data with a simple configuration. It is an object of the present invention to provide a data transmission system in an image data processing device capable of performing the above.

[0009]

In order to solve the above-mentioned problems, a data transmission system in an image data processing device according to the present invention transmits image data from a host processing device which processes image data via a predetermined transmission path. In the data transmission method in the image data processing device, the memory card on which the image data is recorded is attached to the host processing device through the card interface, and the image data from the memory card is controlled by the system control unit of the host processing device. The frame memory used to process the image data is read out at the transfer rate peculiar to the memory card below, while the read image data is sequentially buffered by the card interface in predetermined sector units. Write to the area and transmit the image data to the host processor via the transmission path. The PC card to be converted to is installed via the card interface, the PC card sets the communication path with the destination device via the transmission path based on the settings from the system control unit, and the frame memory via the card interface. Read the data and supply it to the PC card in sequence.
It is characterized in that the data is converted into a predetermined signal by the PC card and transmitted to the destination device via the transmission path.

In this case, in the host processor on the receiving side,
A PC card that receives image data via the transmission path is installed via the card interface, data is received via the PC card after setting the communication path, and image data from the PC card is framed via the card interface. After writing to the empty area of the memory, a memory card for recording the image data may be attached to the host processing device, and the image data from the frame memory may be recorded in the memory card via the card interface.

In these cases, a memory card or
It is advantageous that the card interface for connecting the PC card buffers the respective image data alternately in sector units in at least two buffers. further,
The host processing device includes a first card interface in which a memory card is mounted and a second card interface in which a PC card is mounted, and image data from one card is passed through the two card interfaces to the other. It is better to transfer to another card.

Further, when a predetermined amount of image data is stored in the frame memory, each data may be sequentially reproduced. In this case, the image data stored in the frame memory is compressed data, and when a predetermined amount of compressed data is stored in the frame memory, the image data that can be displayed after sequentially expanding each data is displayed. It is advantageous to regenerate it.

On the other hand, the image data processing device according to the present invention is, in an image data processing device that handles image data, at least a frame memory for accumulating image data to be processed inside the device and writing of the image data in the frame memory. And a memory controller for controlling reading, a memory card for recording image data, a card slot for mounting a PC card for converting image data into a signal to be transmitted through a predetermined transmission path, and a memory controller connected to the memory controller, A card interface that interfaces between a memory card or PC card installed in a card slot and a memory controller, and a system control unit that controls at least the memory controller and the card interface. The system control unit includes a system control unit that determines which of a memory card or a PC card is installed and controls each, and the system control unit transmits the image data when recording or reading the image data to or from the memory card. In this case, each image data is buffered in sector units by the card interface, and the image data is temporarily stored in the empty area of the frame memory via the memory controller.

In this case, the card interface may include at least two buffers for buffering respective data in sector units. The apparatus also includes a first card interface for interfacing with a memory card and a second card interface for interfacing with a PC card, these interfaces transferring image data from one card to the other. You may make it have a data bus.

Further, the present apparatus includes a compression / decompression unit for compressing / decompressing image data and a signal processing unit for converting the image data into a signal of a predetermined format, and a predetermined amount of image data is stored in the frame memory. In this case, it is advantageous to sequentially compress and expand each data and perform signal processing.

[0016]

According to the data transmission method in the image data processing apparatus of the present invention, a memory card on which image data is recorded is attached to the host processing apparatus on the transmission side, and the image data read from this is read in sector units by the card interface. The data is sequentially stored in the empty area of the frame memory via the memory controller while buffering the data. When reading of all data is completed, a PC card for transmitting data is attached to the host processing device on the transmitting side, and a communication path with the destination terminal is set. Next, the image data read from the frame memory is sequentially transmitted from the PC card to the destination terminal via the transmission path. On the receiving side, the PC card is attached to the host processing device, and after the communication path is set, the data received from the PC card is sequentially written to the frame memory. When reception is completed, a memory card is prepared and the data read from the frame memory is sequentially written into the memory card in sector units.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a data transmission system in an image data processing device according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of an image data processing device to which the data transmission system according to the present invention is applied. The image data processing apparatus according to the present embodiment is applied to a small portable host processing apparatus that handles digital format image data. In the present embodiment, for example, a digital electronic still camera will be described as an example in which an image signal representing a captured subject image is subjected to predetermined processing and recorded in an image recording medium such as a memory card. It should be noted that FIG. 1 shows only a portion directly related to this embodiment, and blocks such as an imaging system, which are not directly related to this embodiment, are omitted.

More specifically, as shown in FIG. 1, the digital electronic still camera of this embodiment has a data processing unit 100, a compression / decompression unit 110, a memory controller 120, a frame memory 130, a host CPU (Central Processer). Unit) 14
0 and a card slot 160 into which a memory card such as an SRAM card and a PC card 170 including an input / output (I / O) card can be inserted.
Card interface 150 specific to the present embodiment for interfacing 0 with the inside of the camera.

A card slot 160 applied to this embodiment
Is a PCMCIA (Personal Computer Memory Card)
It has, for example, a 68-pin connector into which a PC card including an input / output (I / O) card of International Association) / JEIDA (Japan Electronic Industry Development Association) standard can be mounted. PC card
The 170 is a modem card that can access existing public lines such as telephone lines, ISDN (Integrated Service Digital N
etwork) ISDN card that can access lines, LAN card that can access LAN (Local Area Network) such as Ethernet, SC that can access hard disks, etc.
I / S such as SI (Small Computer System Interface) cards
O card and ATA (At attachment Interface for D
isk Drives) Including memory cards with specifications. The ATA-type memory card is a semiconductor recording medium that can read and write data by commands and sector-based access similar to existing hard disks of the PC-AT standard. In the present embodiment, in addition to the PC card described above, a memory card such as SRAM and DRAM that can be written and read in byte units at any time can be mounted in the card slot 160.

On the other hand, the data processing unit 100 is an image processing unit that performs predetermined processing such as color processing on image data representing an image taken by a camera or image data received from the card 170. For example, in this embodiment, CCD (Charged
Red, blue, etc. supplied from the imaging unit such as Coupled Device)
The YC converter includes a YC converter that receives green (R, G, B) image signals from the bus 70 via an analog / digital (A / D) converter (not shown) and converts the RGB data to YC data. Image data that can be displayed on a display device or a memory card 170
It is a data processing circuit that processes and outputs data that can be recorded. The display data is output from the bus 72 to the display device via a digital / analog (D / A) converter (not shown). Data for recording is transferred from bus 74 to memory controller 12
It is supplied to the frame memory 130 via 0, temporarily stored, compressed, and recorded in the memory card 170.

The compression / expansion unit 110 quantizes the YC data from the data processing unit 100, for example, to generate a DCT (Discrete Cosi).
ne Transform) and the compression circuit that performs compression encoding by encoding such as Huffman encoding, and the original YC that expands the compression encoded data read from the memory card 170 by inverse transformation. It is a data processing circuit including a decompression circuit for returning to data. The compressed image data is recorded in the memory card 170 from the memory controller unit 120 via the card interface 140.

The memory controller section 120 is a data control circuit for controlling recording and reproduction of image data to and from the frame memory 130 and the memory card 170, and control supplied from the bus 76 in response to switches such as photographing and reproduction. Each control is executed based on the signal SSG. For example, when compressing / decompressing image data in the compression / decompression unit 110, the frame memory 130 is accessed via the address bus 78 and the control bus 80 to sequentially write or read the image data, and the data is stored in the compression / decompression unit 110. Supply. The compressed / decompressed image data is sent from the bus 70 to the data processing unit 100, or from the bus 82 to the card interface 15.
It is supplied to the memory card 170 via 0. In particular, the memory controller 120 of the present embodiment includes the data transmission mode in the control signal SSG, temporarily writes the image data received from the memory card 170 via the card interface 150 into the frame memory 130, and the I / O of a modem card or the like. A data transmission mode in which data is read from the frame memory 130 and output via the card interface 150 when the card 170 is installed, and received data received from the I / O card 170 via the card interface 150 are stored in the frame memory 130. It has a reception mode in which data is once written and transferred through the card interface 150 when the memory card 170 is mounted.

The frame memory 130 is formed by a memory circuit such as a dynamic RAM (DRAM) that can be rewritten at any time, and image data photographed during a normal operation of the camera and subjected to predetermined processing is transmitted via the bus 84. This is an internal memory that is recorded once. Particularly, in the present embodiment, in the data transmission mode as described above, it functions as a buffer circuit that is included in the transmission / reception control system for image data and temporarily stores the image data for transmission and reception.

The card interface 150 is an interface circuit for interfacing between the PC card or SRAM card 170 mounted in the card slot 160 and the inside of the camera, and reading and writing data from the memory card or communicating with the I / O card. It is a card control circuit that controls the exchange of data between the two. In particular, in this embodiment, the host CPU 140 is notified of the attributes of the memory card and I / O card that can be replaced in the card slot 160 in the transmission mode,
It is a peculiar interface circuit of this embodiment that interfaces between each card 170 and the inside of the device under the control of the host CPU 140. Specifically, as shown in FIG. 2, the card interface 150 of this embodiment includes a host interface section 210, a data control section 220, a sequence control section 230, and at least two buffers 240,250.
And

The host interface unit 210 is a host CP.
A CPU interface circuit that interfaces control signals from the U140, and is a bidirectional data bus 52 and control bus.
54 and is connected to the host CPU 140. The host interface CPU 140 has a management information supply function that reads card management information such as attribute information indicating the type of PC card through the data control unit 220 and supplies it to the host CPU 170.
The signal processing circuit has a control signal processing function of supplying a control signal from the host CPU 140 to the sequence control unit 230.

The data control unit 220 is a data interface circuit that bidirectionally interfaces data between the digital electronic still camera and the PC card 170, and is connected to the memory controller 120 by a bidirectional bus 58.
Further, it is connected to the connector 300 of the card slot 160 by a 16-bit data bus and a 26-bit address bus. The data control unit 220 includes a sequence control unit 23
Under the control of 0, the card management information is read from the PC card and the host CPU 140 is read via the host interface unit 210.
To control the buffers 240 and 250 to transfer the data between the PC card 170 and the memory controller 120 while buffering the data. In this embodiment, each of the buffers 240 and 250 has a capacity of a sector accessed by a PC card, for example, 512 bytes, and stores data alternately for each sector to determine the speed of data on the host side. , The difference with the speed of data on the PC card side is 2
Each is absorbed in the data buffer area of the surface.

The sequence control unit 230 receives the control signal from the host interface unit 210 to access the PC card, and receives the status signal to control the data control unit 220 in a sequence conforming to the standard of the PC card. It is a card control circuit. For example, in this embodiment, the sequence control unit 230 has a register 250 for setting an address in the memory card of the ATA specification, and the host processing unit
When the address for accessing the PC card is transferred to the sequence control unit 230 via the host interface unit 210, the address corresponding to the PC card is set in the register 250 based on the address. In other words, the address that specifies the number of sectors, sector position, head position, and command in this order in the register 25
It is set to 0 and supplied to the PC card from the address bus 60 via the data control unit 220.

Returning to FIG. 1, the host CPU 140 is a control circuit for controlling the above-mentioned units via the CPU bus 52, and in particular, in this embodiment, the PC card 17 installed in the card slot 160.
0 is identified based on the card information received via the card interface 150, and a control signal for controlling the writing and reading of data or the transmission / reception of data is sent to the card interface 150 according to the card. Specifically, at the time of shooting, the empty area of the memory card is detected via the memory card interface unit 150, and its address is supplied to the memory card interface 150, and the processing unit 100,
The image data processed by 110 is stored in the memory controller 11
Write to memory card from card interface 150 via 0. When reading the data from the memory card, the data area is detected through the card interface 150, the address is generated, the data is read to the memory controller 110, and the reproducing process is executed to display it on a display device or the like. In particular, in the present embodiment, in the data transmission mode, a card mounting instruction function for displaying a card replacement instruction on a display unit (not shown), and a card for controlling the card interface 150 when a desired card is loaded. The control function, the buffering control for controlling the card interface 150 and the memory controller 120 to temporarily store the data received or read from these in the frame memory 130, and the memory controller 12 for the image data buffered after the card replacement.
0 and card interface 150 to control card 17
0, and a data transfer control function for controlling transmission or recording of data from the card 170.

Next, FIGS. 3 to 6 show the pin arrangement of the PC card 170 having 68 pins of memory applied in this embodiment. 3 and 4 show the pin arrangement of the memory card. In these, the input / output bidirectional data buses D0 to D15 are
The address buses A0 to A25 are respectively connected to the 6th pin, the 30th to 32nd pins, the 37th to 41st pins, and the 64th to 66th pins, and the addresses thereof are supplied to the 8th pin, the 10th to 14th pins, and the 19th pin. They are located on the 29th pin, 46th to 50th pins, and 53rd to 56th pins, respectively, and these are the connector 30 of the card interface 150.
Each of them is connected to the data control unit 220 via 0.

Card enable signals -CE1 and -CE2, which are control signals for activating the memory card, are arranged at the seventh pin and the 42nd pin, and these are connected to the sequence controller 230 via the connector 300. These card enable signals -CE1 and -CE2 are accessed by negative logic, and when both signals are negative, 16-bit data access is executed and signal -CE1 is negative and signal -CE2 is positive. In this case, 8-bit access is possible. Output enable-OE which becomes negative when reading data is placed on the 9th pin and write enable-W which becomes negative when writing data-W
The E / -PGMs are arranged on the 15th pin, respectively, and are connected to the sequence controller 230 similarly to the card enable.

Ready + RDY / indicating the status of the memory card
The busy-BSY terminal is arranged on the 16th pin, and becomes positive when data can be read and written, and becomes negative during processing inside the card to inform the sequence control unit 230 of the state. The operating power supply VCC is placed on the 17th and 51st pins, and the programming power supplies VPP1 and VPP2 are placed on the 18th and 52th pins, and the power is supplied from the host processor via the card interface 150. . Write protect-WP, which indicates whether or not the data can be written, is placed on the 33rd pin. When this signal is negative, only the data can be read from the card and cannot be written.

Below, the terminals of the card detection -CD1 and -CD2 are arranged at the 36th and 67th pins, and the refresh RFSH terminal to which the refresh signal is supplied when the DRAM is adopted as the memory element is the 43rd refresh RFSH terminal. It is prepared on the pin. Also, the reset terminal RESET is arranged at the 58th pin, and the wait terminal -WAIT is arranged at the 59th pin. Further 61st
Battery voltage detection BVD1, when the attribute memory space select-REG when accessing the area that stores the card attributes etc. on the pin is arranged and the memory element such as SRAM is required for the card is adopted. BVD2 is located on pins 62 and 63. The 44th, 45th, 57th and 60th pins are reserved terminals RFU,
The remaining 1st pin, 34th pin, 35th pin and 68th pin are respectively arranged as a ground terminal GND.

On the other hand, FIGS. 5 and 6 show the pin arrangement of the input / output card of the PC card. The pin arrangement of the I / O card differs from the above memory card in that seven pins are assigned to the functions specific to the I / O card, and the other 56 pins have the same functions as the memory card. It is assigned. First, the 16th pin is the memory card RDY /
-Interrupt request from BSY-IREQ is used to instruct the host CPU to request an interrupt via the sequence control unit 210 when receiving, for example. The 33rd pin is IOIS16, which indicates whether the I / O port is accessible in 16 bits from the write-protected WP on the memory card.
Pins 44 and 45 are reserved pins on the memory card
What was RFU is now I / O read IORD and I / O write IOWR. In addition, the 60th reserved pin functions as an input buffer control INPACK. In addition, Pin 62 is assigned to SPKR for driving the speaker,
Pin 63 is assigned to STSCHG which indicates a state change and a voltage change. In this way, the memory card and the I / O card have different seven pin arrangements, and the signal on the slot side is matched to the memory card by default. Host CPU1
When the card is inserted into the slot 160, the card 10 reads the attribute information in the card through the card interface 150, and if it is an I / O card, it changes the role of seven pins.

The data transmission system in this embodiment having the above-mentioned structure will be described together with the operation of the digital electronic still camera. First, a case will be described in which image data taken by a digital electronic still camera is recorded in a memory card, and desired image data is selected from the image data and transmitted to a partner device via a telephone line.

First, the camera mode is set to the photographing mode. When normal shooting is performed in this state, the image signal representing the imaged subject is converted into RGB data in digital format by an analog-to-digital converter,
It is supplied to the data processing unit 100 via 72. Next, the data processing unit 100 performs predetermined processing such as color processing on the RGB data to convert it into YC data and transfers it to the memory controller 120. The YC data transferred to the memory controller 120 is accumulated in the temporary frame memory 130, read out at any time, transferred to the compression / expansion unit 110, compressed by a predetermined compression encoding method, and accumulated in the frame memory. . When the data is compressed, the memory controller 120 records it on the memory card 170 via the card interface 150.

At this time, the host CPU 140 determines whether or not a memory card is mounted in the card slot 160 by reading the card information via the card interface 150. If the memory card is not installed, an instruction to install the correct memory card is displayed on the display unit. When the correct memory card is installed, the host CPU 140 detects the empty area of the memory card, accesses its address via the card interface 150, and reads the compressed data read from the frame memory 130 via the memory controller 120. To the memory card.
In this case, in the card interface 150, the image data received via the memory controller 120 is buffered alternately in the buffers 240 and 250 for each sector unit,
If the card is the ATA specification, data is written sequentially in units of sectors, and in SRAM cards, data is written sequentially in units of bytes.

When the photographing operation and the recording of the image data on the memory card are completed by repeating the above operation, the operator sets the camera mode to the data transmission mode. As a result, the host CPU 140 displays a message such as "Please select an image to send." On the display unit. When the operator selects a desired image by its number or name, the host CPU 140 reads the data management information of the memory card 170 via the card interface 150 and retrieves the selected image. When the search is completed, the address is accessed to the memory card 170 via the card interface 150.

As a result, the image data to be transmitted is read out while being buffered by the card interface 150 for each sector. The image data read out to the card interface 150 is sequentially stored in the memory controller.
Written to the frame memory 120 via 120. When all the selected image data are read out and stored in the frame memory 120, the host CPU 140 displays "Please replace the card with an I / O card" on the display. As a result, the operator removes the memory card from the card slot 160 and inserts, for example, a modem card into the card slot 160. When a modem card is installed,
The host CPU 140 reads the card information via the card interface 150, and the card interface unit 150
Change the pin access of the sequence control unit 240 of from the memory card to the I / O card. In addition, the host CPU 140
Accesses the attribute memory space of the modem card, reads out the respective protocol information, and causes the operator to set the communication path. As a result, a call is connected to the other party's terminal via the line by the entered telephone number or the like.

In this case, first, a line connection request is sent from the host CPU 170 to the modem card via the card interface 150, and the modem card that receives the request connects the line to the partner terminal via the line according to a predetermined communication protocol. To do. When the line connection is completed, the modem card supplies a connection OK instruction to the host CPU 170, and the host CPU 170 which received this instruction instructs the modem card to start transmission and sends the memory controller 120 and the card interface 150.
To read the transmission data from the frame memory 130. The modem card which receives the transmission start instruction transmits a carrier signal to the line, converts the data from the card interface 150 into modulated data, and sequentially transmits the modulated data. in this case,
The image data read from the frame memory 130 is buffered for each sector by the card interface 150 and supplied to the modem card in 16-bit parallel. With a modem card, 16-bit parallel data is converted into serial data, converted by a predetermined modulation method, and sent to the line. As a result, when all the image data has been transmitted, the completion signal is sent from the host CPU 170 to the modem card 170. When the modem card receives this, when it receives the reception completion signal from the destination terminal, it disconnects the line and terminates communication.

Next, the case of receiving the image data from the destination terminal via the I / O card will be described. The operator sets the data transmission mode and mounts the modem card in the card slot 160 as described above. . As a result, the host CPU 140 reads the card information of the modem card via the card interface 150 and determines whether or not the card is a predetermined card. If the card is a predetermined card, the host CPU 140 controls the modem card in the same manner as described above to connect the call to the destination terminal. Next, when the image data is transmitted from the destination terminal, the modem card receives the image data, demodulates it, and transfers it to the card interface in 16-bit parallel. The card interface 150 sequentially transfers the received data to the frame memory 130 via the memory controller 120 while buffering the received data in the buffers 240 and 250. When reception of all image data is complete, the modem card sends a reception completion instruction to the host CPU 140, and the frame memory
After writing data to 120, modem card 1
Send the reception completion via 70 and disconnect the line. Next, the host CPU 140 displays an instruction to replace the card on the display unit. The operator sees this and the card slot
When a memory card is installed in the 160, the host CPU 140 causes the card interface 150 to switch the default to a setting suitable for the memory card. Then the host CPU 140
Controls the memory controller 120 and the card interface 150 to sequentially read the received image data from the frame memory 130. In this case, the image data from the memory controller 120 is the card interface 150.
The buffers 240 and 250 are buffered for each sector unit, and are sequentially written to the respective empty addresses by writing according to the memory card. In other words, the memory card
In the case of the ATA specification card, the address is accessed in each sector unit and the data is written in each sector unit. In the case of the SRAM card, the data is sequentially written in the byte unit to the memory.

When the recording of the received data on the memory card is completed, the end of recording is displayed on the display unit. Then, when displaying the received data on a monitor, etc.,
When the playback mode is set, the image data read via the card interface 150 will be stored in the memory controller 12
It is sent to the compression / decompression unit 110 via 0 and subjected to decompression processing. The decompressed image data is temporarily stored in the frame memory 130 and transferred to the data processing unit 100 via the memory controller 120. The data processing unit 100, which has received the decompressed data, performs predetermined processing on the YC data, and
Output to the monitor device connected to the digital-analog converter. As a result, the image represented by the image data received is displayed on the monitor.

As described above, according to the data transmission method in the image data processing apparatus of the present embodiment, by using the digital electronic still camera, the memory card and the PC card such as the I / O card are sequentially replaced and used. It is possible to reliably and easily carry out recording of data from the photographing to the memory card and transmission of the data or reception from the partner terminal. In this case, the digital electronic still camera has a card interface unique to this application,
In addition to interfacing different cards, it is not necessary to add a new receiving memory etc. when sending and receiving data, but it is possible to perform sending and receiving reliably and easily by buffering with the frame memory for internal processing. it can. Therefore, it is possible to build a small and accurate system by simply replacing the card without connecting the other communication devices and the like while maintaining the miniaturization of the device.

Next, FIG. 7 shows another embodiment of the image data processing apparatus to which the data transmission system according to the present invention is applied. 7 is different from the above embodiment in that the apparatus is provided with two card slots 200 and 210, and the first card interface 220 and the second card interface 23 are provided corresponding to the respective card slots 200 and 210.
0 is provided. The first and second card interfaces 220 and 230 are the memory controller 11
It is connected to the data bus 90 common to 0.

Therefore, according to the data transmission method in the image data processing apparatus of this embodiment, for example, a memory card for recording image data is mounted in the first card slot 200 and the image data is stored in the second card slot 210. When an I / O card such as a modem card for transmitting and receiving data is attached, each card interface 220, 230 reads the management information of the attached card and supplies it to the host CPU 140. As a result, the host CPU 140 determines which card is inserted in which card slot 200, 210 and sets the pin access via the card interface 220, 230. Then, when recording the imaged image data, the image data that has been subjected to the predetermined processing as described above is recorded in the memory card.

Next, when the data transmission mode is set, the host CPU 140 controls the second card interface 220 to connect the call from the modem card to the destination terminal. When the line is connected, the first card interface 220 is controlled to read out desired image data from the memory card. The read image data is sequentially transferred to the second card interface 230 via the data bus 90 and transmitted from the I / O card to the transmission path.

Similarly, when receiving image data,
Connect to the other terminal from the I / O card and receive the received data. The received data received is transferred from the second card interface 230 to the first card interface 220 and recorded under the control of the desired address of the memory card. At this time, the received data is sequentially accumulated in the frame memory 130 via the memory controller 120,
A predetermined amount of data, for example, an integer fraction of one screen image
When the data is received, the data is read from the frame memory 130 under the control of the memory controller 120 and the reproduction process is performed. If the image data has been compressed, the memory controller 120 sends the compressed data to the compression / decompression unit 110 for decompression processing. The decompressed data is
Predetermined processing is performed in the data processing unit, and the data is sequentially displayed on the monitor device via the digital-analog converter. As a result, the amount of image data received can be visually checked by sequentially reproducing the image data being received.

As described above, in this embodiment, two card slots 200 and 210 and two card interfaces 220,
Since it has a 230, it does not use the frame memory 1300 as a receive buffer, and I / O card to memory card or memory card to I / O card via the data bus 90 between the respective card interfaces 220, 230. Can be transferred. Therefore, for example, it is possible to record the image data being received in the frame memory 130, reproduce the processed image data, and display it on a monitor device or the like to continue the reception. Further, even when transmitting and receiving a plurality of image data, it is possible to omit processing such as card replacement.

In the above embodiment, the case where the data transmission system is applied to the digital electronic still camera has been described as an example, but in the present invention, other host processing devices such as workstations and notebook computers respectively receive image data. It may be applied to various information processing devices handled.

[0049]

As described in detail above, according to the data transmission system in the image data processing device of the present invention,
A memory card and an I / O card can be mounted interchangeably, and the image data read from the memory card is sent and received via the I / O card, so the image data processing device and its transmission system can be miniaturized. . In this case, since the image data is transferred by the card interface in units of a predetermined capacity, it is possible to absorb the data transfer speed of an ATA-type memory card and an SRAM card that accesses data in byte units. Compatibility with data rates in In addition to the modem card that can access telephone lines,
By installing a DN card, SCSI card, or LAN card, image data can be transmitted via various transmission paths with a simple configuration.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a digital electronic still camera to which a data transmission system according to the present invention is applied.

FIG. 2 is a block diagram showing an internal configuration example of a card interface according to the embodiment of FIG.

FIG. 3 is a diagram showing a pin arrangement of a memory card applied to the embodiment of FIG.

FIG. 4 is a diagram showing a pin arrangement of the memory card following FIG.

5 is a diagram showing a pin arrangement of the I / O card applied to the embodiment of FIG.

FIG. 6 is a diagram showing a pin arrangement of the I / O card continued from FIG. 5;

FIG. 7 is a block diagram showing another embodiment of the image data processing device to which the data transmission system according to the present invention is applied.

[Explanation of symbols]

 100 Data processing unit 110 Compression / decompression unit 120 Memory controller 130 Frame memory 140 Host CPU 150 Card interface 160 Card slot 170 PC card

Claims (10)

[Claims] 1. A data transmission method in an image data processing apparatus for transmitting image data from a host processing apparatus for processing image data via a predetermined transmission path, the method comprising recording image data in the host processing apparatus. Mounted memory card via a card interface, the image data from the memory card is read out at a transfer speed unique to the card under the control of the system control unit of the host processing device, and the read image data is read out from the card. The buffer is sequentially buffered in a predetermined sector unit by the interface, and is written in an empty area of the frame memory of the host processor used when processing the image data, and the image data is transmitted to the host processor by the transmission path. Install a PC card that converts into a signal to be transmitted via the card interface, Based on the setting from the system control unit, the communication path with the destination device is set via the transmission path on the PC card, and the image data is read from the frame memory via the card interface and sequentially transferred to the PC card. A data transmission method in an image data processing device, characterized in that the image data processing device supplies the image data, converts the image data into a predetermined signal by the PC card, and transmits the signal to a destination device via a transmission path. 2. The data transmission method according to claim 1, wherein the method further comprises mounting a PC card for receiving image data on the receiving side host processing device via the transmission line via the card interface. A memory card that receives image data via the PC card after setting the communication path and writes the image data from the PC card to the empty area of the frame memory via the card interface, and then records the image data. An image data transmission system in an image data processing device, characterized in that the image processing device is mounted on a host processing device, and image data from the frame memory is recorded on the memory card via a card interface. 3. The data transmission method according to claim 1 or 2, wherein the card interface for connecting the memory card or the PC card buffers image data alternately in sector units in at least two buffers. A data transmission method in an image data processing device, characterized by: 4. The data transmission system according to claim 1 or 2, wherein the system comprises a first card interface in which a memory card is installed and a second card interface in which a PC card is installed. A data transmission system in an image data processing device, characterized in that image data from one card is transferred to the other card via between two card interfaces. 5. The data transmission method according to claim 1 or 2, wherein when a predetermined amount of data is stored in the frame memory, the host processing device sequentially outputs respective image data. A data transmission method in an image data processing device characterized by performing reproduction processing. 6. The data transmission method according to claim 5, wherein the image data stored in the frame memory is data compressed by a predetermined compression encoding method, and the method is predetermined in the frame memory. When a large amount of compressed data is accumulated, after decompressing each data sequentially,
A data transmission system in an image data processing device characterized by reproducing to displayable data. 7. An image data processing apparatus for handling image data, the apparatus controlling at least a frame memory for accumulating image data to be processed in the apparatus, and writing and reading of data to and from the frame memory. A memory controller, a card slot into which a memory card for recording image data and a PC card for converting data into a signal to be transmitted through a predetermined transmission path are replaceably mounted, and the memory controller is connected to the A card interface for interfacing between a memory card or a PC card installed in a card slot and the memory controller, and a system control unit for controlling at least the memory controller and the card interface, which includes the card interface. And a system control unit that determines whether a memory card or a PC card is attached and controls each of them. The system control unit is configured to record or read image data in the memory card, and the PC card. When transmitting image data in, each image data is buffered in sector units by the card interface, and the image data is temporarily stored in an empty area of the frame memory via a memory controller. Image data processing device. 8. The image data processing apparatus according to claim 7, wherein the card interface buffers each image data in sector units.
An image data processing device including two buffers. 9. The image data processing device according to claim 7, wherein the device has a first card interface for interfacing with a memory card and a second card interface for interfacing with a PC card. Is an image data processing device having a data bus for transferring image data from one card to the other card. 10. The image data processing apparatus according to claim 7, wherein the apparatus includes a compression / decompression unit for compressing / decompressing the image data, and a signal processing unit for converting the image data into a signal of a predetermined format. An image data processing device characterized in that, when a predetermined amount of image data is stored in a frame memory, each data is sequentially compressed and expanded and signal processed.