JPH08130699A - Video data retrieval device - Google Patents

Abstract

PURPOSE: To provide a video data retrieval device by which the delimition of video data is automatically retrieved. CONSTITUTION: A discontinuous point detection circuit 102 generates the write signal corresponding to a discontinuous point of time code data of video data and a R/W control circuit 106 divides the video data as separate files for each timing represented by the write signal and stores the data to a storage device 140, Furthermore, when the division of a decoded video signal S16 is finished, the R/W control circuit 106 reads the files stored in the storage device 140 in parallel cyclicly according to the operation of the editor via an application system 14 to generate display video data to which respective time code data correspond and to display the data onto a monitor 120.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video data retrieving apparatus for displaying the contents of digital format video data by dividing each video scene.

[0002]

2. Description of the Related Art In the case of producing a television broadcast news program or the like, it is necessary to search a video signal recorded at an incident site or the like and extract only a portion necessary for broadcasting to edit the video. Conventionally, in order to find a necessary portion from a video signal, a method of playing back a videotape or the like on which a recorded video signal is recorded and allowing an editor to fast-forward or fast-rewind while looking for a video to find a necessary portion. Has been taken. Recently, a method has also been used in which digital video data is stored in a randomly accessible storage means at regular time intervals, and these are read out and displayed side by side on a screen to facilitate the retrieval of video signals.

[0003]

Usually, the video signal is divided into short sections, and of the two methods of searching for video signals shown in the prior art, in the former method, the task of finding the division of the video is the image. The problem is that it takes up most of the signal search work. In order to find the desired video, it is sufficient to look at the contents from the video break, but to find the video break itself, all the contents of the video up to that break must be viewed, and , Because it is necessary to repeat this process until all desired scenes are found.

Of the two video signal search methods shown as the prior art, the latter method improves the situation as compared with the former method. However, the above problems cannot be solved completely. Therefore, if the work of searching for video breaks can be automated, it is possible to shorten the overall editing work, and there is a demand for a video data search device that can automatically search for video breaks. It is rising.

The present invention has been made in order to meet the above-mentioned demands, and a video segment having the contents of a digital format video signal (hereinafter referred to as "video data") (hereinafter, simply "video data segment"). It is an object of the present invention to provide a video data search device capable of automatically searching (see). Further, according to the present invention, the video data can be divided for each delimiter of the searched video data, and the divided video data can be displayed in parallel to the editor to facilitate the editing work. An object is to provide a search device. Further, according to the present invention, when the video data is interframe compression-encoded, decompression / decompression is performed without using other frames of each of the divided video data.
It is an object of the present invention to provide a video data search device capable of quickly displaying the content of video data by extracting only decodable independent frame data (I frame data).

[0006]

In order to achieve the above object, a video data retrieval device of the present invention is a monitor device, a change point detection means for detecting a change point of a video, and video data containing the video. And a display unit for simultaneously displaying each of the divided video data on the monitor device. Preferably, the video data is accompanied by time code data indicating a time at which the video data was generated, and the change point detecting means corresponds to a position where the time code data is discontinuous. The position of the video data is detected as the change point.

[0007] Preferably, the display means displays the time code data corresponding to each of the divided video data in association with each of the divided video data. Preferably, identification data indicating a scene break is added to a scene break position of the video data, and the change point detection unit detects the identification data and identifies the video data. The position where the data is added is detected as the change point.

[0008] Preferably, the video data is video data that is compression-coded between frames, and independent frame data that can be independently decoded from video data of another frame,
And a correlation frame data correlating with video data of another frame, further comprising decorrelation frame data detection means for detecting the decorrelation frame data from the video data or the divided video data, and the display The means sequentially displays the detected decorrelated frame data on the monitor.

[0009]

The monitor device displays the display video data generated by the display means. The change point detecting means detects, for example, a discontinuity point of the time code data when the video data is accompanied by time code data indicating the time when the video data was recorded, and detects the discontinuity point of the time code data. The position of the corresponding video data is detected as a video delimiter (change point) of the content of the video data. The dividing unit divides the video data at the boundaries of the detected video data. The display means generates display video data for displaying each of the divided video data for each predetermined portion of the screen of the monitor device, and displays the display video data on the monitor device.

[0010]

[Embodiment 1] Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
First, the configuration and operation of a video signal server system to which the video data search device 1 according to the present invention is applied will be described with reference to FIGS. 1 to 3. FIG. 1 is a block diagram of a video signal server system as a video signal recording / reproducing device to which a video data search device 1 according to the present invention is applied.
In FIG. 1, the digitized input video signal S10
Is a high-efficiency video signal encoding device 10 _{1 with} variable encoding efficiency.
To 10 _n , respectively, and subjected to high efficiency encoding to become high efficiency encoded video data S11a. The coding efficiency of each video signal high-efficiency coding apparatus 10 ₁ to 10 _n, the control by the synchronization system control execution apparatus 16 signal S1
2 is set in advance. Further, if the high-efficiency encoders 10 ₁ to 10 _n extract the clock and frame timing from the input video signal S10 and use them internally, as a result, the video signal is input in synchronization with the video signal synchronization signal. It becomes possible to do.

The high-efficiency coded video data S11a is input to a circuit switching device 11 such as a routing switcher for a broadcasting station. In the circuit switching device 11, the circuit switching destination is set by the control signal S13 from the synchronous system control execution device 16. Therefore, the high-efficiency coded video data S11a input to the circuit switching device 11 is transferred to the predetermined data storage device 12 connected through the set route.
It is propagated as input high-efficiency coded video data S11b. The high-efficiency coded video data S11b is recorded in the data storage devices 12 _{1 to} 12 _n which are individually controlled by the control signal S14 from the synchronization system control execution device 16.

The data storage devices 12 _{1 to} 12 _n are, for example, as shown in FIG.
21 and a general-purpose disk device 122. Figure 2
In the above, the high-efficiency coded video data S11b transmitted by the data transmission medium capable of transmitting the baseband digital video signal is input to the data and control format conversion device 121 and can be input to the disk device 122. Is converted to. On the other hand, the data reproduced from the disk device 122 is input to the data and control format converter 121, converted into a data format equivalent to that at the time of recording, and a data transmission medium capable of transmitting a baseband digital video signal. The reproduced high-efficiency coded video data S15 is transmitted. The control format of the data and control forming converter 121 is converted into a format capable of controlling the disk device 122 according to the control signal S14 from the synchronous system control execution device 16.

With such a configuration, the data / control format converter 121 and the general-purpose disk unit 1
22 can be connected via a general-purpose connection line S120 in which normal data and control signals are mixed, and encoded video data can be recorded / reproduced using a general-purpose disk device 122. Further, with such a configuration, the data storage device 12 can change the recording / reproducing speed within the range of the maximum data transfer speed of the disk device 122. As the disk device 122, for example, a magneto-optical disk device or the like can be applied.

The reproduced high-efficiency coded video data S15a is
It is input to the circuit switching device 11 as in the case of recording. In the circuit switching device 11, the circuit switching destination is set by the control signal S13 from the synchronous system control execution device 16. Therefore, the reproduced high-efficiency encoded video data S15a input to the circuit switching device 11 is propagated as high-efficiency encoded video data S15b to the predetermined video signal decoding devices 13 _{1 to} 13 _n connected through the set path. To be done. The high-efficiency coded video data S15b is the video signal decoding device 13
_{In 1 to} 13 _n , the restored video signal S16 is decoded and output to the outside of the system, for example, the editing device. In the example of FIG. 1, no control signal is input to the video signal decoding device 13, but this is because this type of decoding device is usually configured to automatically follow changes in the coding efficiency. .

Regarding the control system of this system, first, a plurality of independent control commands S17a issued from the higher-level application system 14 composed of a single or a plurality of computers are used for general-purpose communication protocol via LAN. The information is sequentially transmitted to the control command transmission device 15 which is usually composed of one computer in a form conforming to (protocol).
The control command transmission device 15 is the synchronous system control execution device 1.
The control command S17b obtained by performing the protocol conversion for enabling communication with the communication control unit 6 is transmitted to the synchronous system control execution device 16.

The synchronous system control execution unit 16 is composed of a plurality of computers (hereinafter referred to as CPs) as shown in FIG.
U unit) 160 _{1 to} 160 _n . Each of the CPU units 160 _{1 to} 160 _n has a communication interface 161, a CPU 162, a ROM 163, and a RAM 16 which are basic components of a computer.
4, and the control interface 165 is the CPU 162.
Basically, it is connected to the bus 166 that operates under the control of. A plurality of CPU units 160 _1-16
0 _n is a communication bus 167 and a communication interface 16
The communication bus 167 is connected to the control command transmitting device 15 for transmitting the control command S17b.

In each of the CPU units 160 _{1 to} 160 _n , the control interface 165 is supplied with the video signal reference synchronization signal S18. Control interface 1
Each of the control signals S12 and S65 shown in FIG. 1 is configured to control a plurality of controlled devices.
13 and S14 are provided with a control line 168 capable of inputting and outputting a plurality of control signals. As shown in FIG. 3, the video signal reference synchronization signal S18 may be supplied also to the communication interface 161, which may be useful for speeding up the communication and fixing the delay time caused by the communication. Further, in addition to the video signal reference synchronization signal S18, some time information such as an in-station time code may be supplied to enable control based on the time line.

In the configuration of FIG. 3, first, the control command S
17b is supplied from the control command transmission device 15 to the communication bus 167. The communication interface 161 of each of the CPU units 160 _{1 to} 160 _n fetches a control command to be processed by the communication bus 167, and the internal bus 1
66. The control command fetched on the internal bus 166 is converted into a command for real-time control for actually controlling the device, and transferred to the control interface 165.
In the control interface 165, the control signals S12, S13, S1 shown in FIG. 1, for example, are communicated by referring to the video signal reference synchronization signal S18 and communicating with each device at an accurate timing within the frame period, for example.
4 to realize the control by 4, and the video signal high efficiency encoding device 1
Setting of coding efficiency in 0 ₁ to 10 _n, video signal high efficiency coding apparatus 10 ₁ to ₁ by control of the circuit switching device 11
0 _n or setting of lines connected to the video signal decoding devices 13 _{1 to} 13 _n and the data storage devices 12 _{1 to} 12 _n , exchange thereof, and operation control of the data storage device 12 in recording / reproducing.

In such a configuration, the communication bus 16
7, the communication interface 161, and the control interface 165 are operated in synchronization with the video signal reference synchronization signal S18.
If the processing in the OM 163 and RAM 164 is limited,
The system delay amount related to the control inside the synchronous system control execution device 16 can be easily fixed in frame period units. Further, the control interface 165 gives priority to transmitting the control signal at an accurate timing in synchronization with the video signal reference synchronization signal S18.
It is possible to easily satisfy the condition relating to the timing of the control signal, which is different for each device and requires accuracy. In addition, by providing a margin only for the communication capacity of the communication bus 167, the synchronous system control execution device 16 by adding the CPU unit 160
Can be easily expanded, so that the flexibility of the number of devices and devices under the control of the synchronous system control execution device 16 can be maintained, and as a result, the system scale can be expanded.

When the upper application system 14 issues a data transfer command between the data storage devices, the following operation is performed. That is, the storage device-to-storage device data transfer control command S1 issued from the host application system 14
7a is transmitted to the control command transmission device 15, where the protocol conversion for enabling communication with the synchronous system control execution device 16 is performed. Synchronous system control execution device 16
Is a reproduction side data storage device 12 (a), a line switching device 11, a recording side data storage device 12 (b) with reference to a video signal reference synchronization signal in accordance with a control command S17b obtained by protocol conversion. Is controlled at an appropriate timing to execute data transfer between the data storage devices 12. At the time of data transfer between the data storage devices 12, the data storage device 12 (a) on the reproduction side is controlled by the control signal S14, reproduces the stored data, and outputs the reproduction data string S15b. The reproduction data string S15b is
Circuit switching device 1 such as a routing switcher for broadcasting station
1 and are exchanged as preset by the control signal S13, and the data storage device 12 on the recording side is exchanged.
It is connected to (b) and becomes the input data S11b. The input data S11b is recorded in the data storage device 12 (b) controlled by the control signal S14.

Further, by logically exchanging control signals by using the function of setting a connection control signal line between arbitrary devices of the synchronous system control execution unit 16 shown in FIG. It is possible to realize transmission of control commands between arbitrary devices included in the lower system and high-speed transmission of control commands from outside the lower system via the control signal line without passing through. In this case, the following operation is performed.

For example, a control command transmission logical line setting command S17a issued from the higher-level application system 14 is transmitted to the control command transmission device 15, and the control function of the communication bus 167 of the synchronous system control execution device 16 which receives the control command transmission device 15 is received. The control command transmission device 15 has a CPU unit 160 ₁
Communication interface 161 and CPU unit 160
By allocating the time slot of the communication bus 167 which can be used exclusively by the _second communication interface 161, the logical line for transmitting the control command can be set. And C
When transmitting a control command between the PU unit 160 ₁ and the CPU unit 160 ₂ , first, the CPU unit 1
The control signal input from the device connected to the control interface 165 of 61 ₁ is supplied to the internal bus 166 and immediately transferred to the communication interface 161 under the control of the CPU 162. Communication interface 161
Sends the transferred control command to the communication bus 167. The control command sent to the communication bus 167 is the CPU
Transferred by the communication interface 161 of the unit 160 ₂ to the internal bus 166 of the CPU unit 160 ₂ is transferred immediately to the communication interface 161 under the control of the CPU 162, the CPU unit 160 therefrom
It will be supplied to the device connected to the _second control interface 165.

By adopting the system described above,
The system delay amount related to the control inside the synchronous system control execution device 16 can be easily fixed in frame period units. In addition, the control interface 165 gives priority to transmitting the control signal in synchronization with the video signal reference synchronization signal S18 at an accurate timing, and sets the conditions regarding the timing of the control signal that differ depending on each device and require accuracy. It is easy to satisfy, and the controlled device operates without trouble even if there is a system delay in frame period units.

In addition to the system described above, transmission of control commands between devices connected to the same control interface 165 can also be carried out with the configuration of FIG. In this case, for example, the control command S161 from the device on the control side (master) is input to the control interface 165 and returned to the control interface 165 again via the bus 166 and the RAM 164, and the control interface 165 displays the image. In the same manner as described above with reference to the signal reference synchronization signal S18, the control command S16 is generated at the correct timing.
2 will be emitted.

The video data retrieval device 1 according to the present invention is
Editing device connected to the above-described video signal server system
Which is applied to the video signal decoding device 13₁~
13 _nVideo of the content of the restored video signal S16 output from
Delimiter (hereinafter, simply “delimiter of restored video signal S16”)
Is written), and the restored video signal is detected for each detected segment.
S16 is divided and the divided restored video signal S16 is parallelized.
And display it to the editor. FIG. 4 is a schematic diagram of the first embodiment of the present invention.
It is a figure which shows the structure of the video data search device 1 of Ming. Figure 4
As shown in FIG.
System 14 connected to the video signal decoding device 13₁~ 13_n
The restored video signal S16 is input from any of
Discontinuity point detection circuit 102, frame buffer 104, reading
Protrusion / writing control circuit (R / W control circuit) 106,
Consists of a monitor device 120 and a storage device 140
You.

The host application system 14 receives time code data indicating the time when the restored video signal S16 is generated from the control command transmission device 15 via the LAN and outputs it to the discontinuity detection circuit 102. Discontinuity detection circuit 10
2 detects a discontinuity point of the time code data, that is, a position where the times indicated by adjacent time code data are not continuous, and outputs a write signal R indicating the timing of occurrence of the discontinuity point.
Output to the / W control circuit 106. The frame buffer 104 receives the restored video signal S1 input for the processing time of the host application system 14 and the discontinuity detection circuit 102.
6 is delayed, and this signal and the write signal are synchronized and R /
Output to the W control circuit 106.

The R / W control circuit 106 divides the restored video signal S16 input from the frame buffer 104 into separate files for each delimiter and stores them in the storage device 140, and also stores these files recorded in the storage circuit. Are read in parallel to generate display video data to be displayed for each part on the screen of the monitor device 120. The contents of the display video data displayed on the monitor device 120 are as follows.
This will be described later with reference to FIG. The storage device 140 is, for example, R
It is a storage device such as an AM disk or a hard disk device that can be read and written at high speed and is randomly accessible, and stores the restored video signal S16 under the control of the R / W control circuit 106.

The operation of the video data search device 1 will be described below with reference to FIG. FIG. 5 is a diagram exemplifying the contents of display video data displayed on the monitor device 120 shown in FIG. Control command transmission device 15 via LAN
From the above, the control command S17a including the time code data of the restored video signal S16 is input to the host application system 14 in synchronization with the restored video signal S16. Host application system 14
Extracts the time code data from the control command S17a and outputs it to the discontinuity detection circuit 102. The discontinuity detection circuit 102 detects the discontinuity of the time code data,
For example, the time indicated by adjacent time code data is "0.
"0: 00: 00: 00" to "06: 00: 00: 00
A position jumping to 0 "is detected, a write signal indicating this position is generated and output to the R / W control circuit 106.

The frame buffer 104 synchronizes the restored video signal S16 with the write signal, and the R / W control circuit 10
Enter in 6. The R / W control circuit 106 controls the restored video signal S16 synchronized in the frame buffer 104.
Is divided into different files at each timing indicated by the write signal and stored in the storage device 140. Specifically, for example, "start-a-b-c -... t-end",
When 19 discontinuous points (a, b, c, ..., T) of the time code data of the restored video signal S16 are detected, the restored video signal S16 is divided corresponding to the discontinuous points of the time code data. "Start-a", "a-b", "b-c",
…, Each part of “t-end” is file A, B,
C, ..., U are stored in the storage device 140 together with the time code data.

Next, the R / W control circuit 106, when the division of the restored video signal S16 is completed, the host application system 1
According to the operation of the editor via 4, the files stored in the storage device 140, files A to U in the above example, are cyclically read in parallel. Specifically, in the above example, when the R / W control circuit 106 has read the file A from the storage device 140 to the end, it further reads the file A from the beginning. This reading method is common to the other files B to U. Furthermore, R / W
The control circuit 106 monitors the video data and the time code data read from each of the files and monitors them.
For example, display image data to be displayed as shown in FIG. 5 is generated for each part of the screen of FIG. Specifically, in the above example, the contents of the display video data are as follows. The video data of the files A to U are displayed in the respective parts P1 to P20 on the screen of the monitor device 120, and the contents of the files A to U are displayed below the parts. Time code data (X
(X: XX: XX: XX) is displayed in association with the video signal.

The video data retrieving apparatus 1 can automatically search for video divisions having the contents of the restored video signal S16 and display the restored video signal S16 for each division. Therefore, an editor using the video data search device 1 can easily find a desired part of each of the divided restored video signals S16 while watching each video displayed on each part P1 to P20 of the screen of the monitor device 120. And you can search in a short time. The contents displayed by the video data search device 1 on the screen of the monitor device 120 shown in FIG. 5 are merely examples, and may be arbitrarily changed in order to facilitate the video data search. Further, the R / W control circuit 106 may be configured not to read each file cyclically, but to finish reading the file after reading to the end of each file. Further, the video data search device 1 can be used as a stand-alone system in addition to being applied to the video signal server system shown in FIGS.

[0032]

Second Embodiment A second embodiment of the present invention will be described below with reference to FIG. FIG. 6 is a diagram showing the configuration of the video data search device 2 according to the present invention in the second embodiment. Figure 6
As shown in FIG. 2, the video data search device 2 includes a frame buffer 264, an R / W control circuit 106, a monitor device 12.
0, the storage device 140, and the change point detection circuit 262, the delimiter of the restored video signal S16 is detected from the correlation of the video data between the adjacent frames of the restored video signal S16, which is shown in the first embodiment. Video data retrieval device 1
It realizes the same function as. The operations and functions of the components of the video data search device 2 not described below are the same as those of the components of the video data search device 1 designated by the same reference numerals.

The frame buffer 264 delays the input restored video signal S16 by one frame and outputs it as video data S264a to the change point detection circuit 262, and further outputs the video data S264a to the change point detection circuit 2.
Video data S264 delayed by the processing time in S62
b and the write signal and the video data S26 output to the R / W control circuit 106 and output from the change point detection circuit 262.
Synchronize with 4b.

The change point detection circuit 262 detects the restored video signal S
The difference between 16 and the video data of the frame input at that time and the video data of the immediately preceding frame is calculated for each pixel, and the calculated difference value is cumulatively added for each frame. When this cumulative addition value exceeds a predetermined threshold value, the interval between the frame input at that time and the previous frame is detected as the delimiter of the restored video signal S16, and the delimiter timing of the restored video signal S16 is detected. The write signal indicating
Output to the W control circuit 106.

The video data search device 2 detects the delimiter of the restored video signal S16 by the change point detection circuit 262 as described above, and, like the video data search device 1, divides the restored video signal S16 by the detected delimiter. From the divided restored video signal S16, for example, display video data having the contents shown in FIG. 5 is generated and displayed on the screen of the monitor device 120. In addition, the video data search device 2 is set to the restored video signal S
When 16 is accompanied by time code data, the time code data may be displayed in association with the divided restored video signal S16. Further, the video data search device 2 can also be modified similarly to the video data search device 1 as shown in the first embodiment.

[0036]

Third Embodiment A third embodiment of the present invention will be described below with reference to FIG. FIG. 7 is a diagram showing the configuration of the video data search device 3 according to the present invention in the third embodiment. Figure 7
As shown in FIG.
4, R / W control circuit 106, monitor device 120, storage device 140, I frame detection circuit 182, and decoding circuit 1
The high-efficiency encoder 10 ₁ to 1
It is configured to process the input high-efficiency coded video data S11b input from any of 0 _n .

In the video data search device 3, the input high-efficiency coded video data S11b is, for example, I frame data that can be decoded without using video data of another frame, and P frame having a correlation with the video data of the previous frame. If the data is interframe compression-encoded so as to include data and B frame data having a correlation with video data of preceding and following frames, the input high-efficiency coded video data S11b to I
Only the frame data is extracted, and only the extracted I frame is displayed on the monitor device 120. The operations and functions of the components of the video data search device 2 not described below are the same as those of the components of the video data search device 1 designated by the same reference numerals.

The I frame detection circuit 182 detects the I frame data of the input high-efficiency coded video data S11b, generates a write signal indicating the timing when the I frame is input, and outputs the write signal to the delay circuit 184. . The decoding circuit 186 performs the same operation as the video signal decoding devices 13 _{1 to} 13 _n, and receives the input high efficiency coded video data S1.
The video data obtained by decompressing / decoding 1b is read by the R / W control circuit 10
Output to 6. The delay circuit 184 delays the write signal input from the I frame detection circuit 182 by a time that cancels the processing time in the I frame detection circuit 182 and the processing time in the decoding circuit 186, and the R / W control circuit 106. To the write signal and decoding circuit 18
Input high-efficiency coded video data S11 decoded by S6
Synchronize with b.

The R / W control circuit 106 records the video data decoded by the decoding circuit 186 as separate files in the storage device 140 at the timing indicated by the write signal. When the recording is completed, the R / W control circuit 106 reads out each of the written video data, and displays the video data for display which is displayed in parallel for each of the parts of the screen of the monitor device 120 that are finely divided or is displayed over time. Display video data is generated and displayed on the monitor device 120. I-frame data always appears at the break of video data.
By decoding the I frame data of the input high-efficiency encoded video data S11b and displaying them in parallel, the editor can easily find the breaks in the input high-efficiency encoded video data S11b.

The input high-efficiency coded video data S11
When b is displayed on the monitor device 120 over time, an image as if the data storage device 12 _i was fast-forwarded and reproduced can be obtained. Therefore, the editor should quickly find the boundary of the input high-efficiency encoded video data S11b. You can Further, the video data search device 2 is also used in the first embodiment and the second embodiment.
As shown in the above embodiment, the same modifications as the video data search devices 1 and 2 are possible.

[0041]

Fourth Embodiment A fourth embodiment of the present invention will be described below with reference to FIG. FIG. 8 is a diagram showing the configuration of the video data search device 4 according to the present invention in the fourth embodiment. FIG.
As shown in FIG. 3, the video data search device 4 includes the discontinuity detection circuit 102, the delay circuits 184 and 188, the R / W control circuit 206, the monitor device 120, the storage device 140, the I frame detection circuit 182, and the decoding circuit 186. The input high-efficiency coded video input from any of the high-efficiency coding apparatuses 10 ₁ to 10 _n with time code data, which is configured similarly to the video data search apparatus 3 described in the third embodiment. It is configured to process the data S11b. It should be noted that a video data search device 2 not described below
The operation and function of the constituent elements are the same as those of the constituent elements of the video data search device 1 designated by the same reference numerals.

The delay circuit 188 is the discontinuity point detection circuit 10.
2 to the write signal a input from the discontinuity point detection circuit 10
2 by delaying the processing time of the decoding circuit 186 and the processing time of the decoding circuit 186.
6, and the write signal a is synchronized with the input high-efficiency coded video data S11b decoded by the decoding circuit 186.

The R / W control circuit 206 controls the write signals a and b.
In accordance with this, of the video data obtained by decoding the input high-efficiency coded video data S11b, only the video data corresponding to the I frame data is divided into separate files for each division and stored in the storage device 140. Also, R / W
The control circuit 206 reads out these files to generate display video data, similarly to the R / W control circuit 106 of the video data search device 1 shown in the first to third embodiments.
For example, it is displayed on the screen of the monitor device 120 as shown in FIG. According to the video data search device 4, the editor can see the contents of each of the divided input high-efficiency-encoded video data S11b as if the data reproduction device 12 were fast-forwarding and reproducing.

[0044]

Fifth Embodiment A fifth embodiment of the present invention will be described below with reference to FIG. FIG. 9 is a diagram showing a configuration of a video camera 220 that adds identification data indicating a shooting start point to video data. Although the video data search device 2 shown in the second embodiment described above is configured to detect the breaks of video data by checking the correlation between the video data of the adjacent frames by the change point detection circuit 262. The same function can be realized by modifying the change point detection circuit 262 so as to detect the identification data indicating the shooting start point added to the video data.

As described above, in order to add the identification data to the video data, for example, the video camera 2 shown in FIG.
20 is used. The video camera 220 stores the video data captured by the imaging device 222 only in the recording device (REC) 23 while the photographer presses the switch (SW) 226.
0 is configured to record. In such a video camera 220, the identification data generation circuit 224
When the photographer presses the switch 226, identification data indicating the start of photography is generated and output to the data addition circuit 228. The data adding circuit 228 is provided for the imaging device 2 when the identification data generation circuit 224 generates identification data.
The identification data is added to the video data input from 22 and recorded in the recording device 230.

By performing shooting with the video camera 220, it is possible to add shooting start, that is, identification data indicating a boundary of generated video data, to a corresponding portion of the video data. The data can be divided and stored in the storage device 140 by using the video data search device 2 modified as described above, and each of the divided video data read from the storage device 140 can be displayed in parallel on the monitor device 120. . In addition to the above-described embodiments, the video data according to the present invention may be used as shown as a modified example in each embodiment, or by using each component of the video data search devices 1 to 4 in combination. The search device can have various configurations.

[0047]

As described above, according to the video data search device of the present invention, it is possible to meet the demand for automatically searching for a boundary of video data. Further, according to the video data search device of the present invention, the video data can be divided for each delimiter of the found video data, and the divided video data can be displayed in parallel to the editor. Can be facilitated. Also,
According to the video data search device of the present invention, when the video data is interframe compression-encoded, only the I frame data of each of the divided video data is extracted and the content of the video data is quickly displayed. be able to.

[Brief description of drawings]

FIG. 1 is a block diagram of a video signal server system as a video signal recording / reproducing device to which a video data search device according to the present invention is applied.

FIG. 2 is a diagram showing a configuration of a data storage device shown in FIG.

FIG. 3 is a diagram showing a configuration of a synchronous system control execution device shown in FIG.

FIG. 4 is a diagram showing a configuration of a video data search device of the present invention according to a first embodiment.

5 is a diagram illustrating an example of contents of display video data displayed on the monitor device illustrated in FIG.

FIG. 6 is a diagram showing a configuration of a video data search device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a configuration of a video data search device according to the present invention in a third embodiment.

FIG. 8 is a diagram showing a configuration of a video data search device according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a configuration of a video camera that adds identification data indicating a shooting start point to video data.

[Explanation of symbols]

10 ₁ to 10 _n ... video signal high-efficiency encoding apparatus, 11 ... circuit switching device, 12 ₁ to 12 _n ... data storage device, 121
... data and control format conversion device, 122 ... disk device, 13 _{1 to} 13 _n ... video signal decoding device, 14 ... upper application system, 15 ... control command transmission device, 16 ... synchronous system control execution device, 160 _{1 to} 160 _n ... CPU unit, 161, ... Communication interface, 162 ... CPU,
163 ... ROM, 164 ... RAM, 165 ... Control interface, 166 ... Bus, 167 ... Communication bus, 16
8 ... control line, 20 ... digital tape recorder, 1-4
... video data retrieval device, 102, 162 ... discontinuity point detection circuit, 182 ... I frame detection circuit, 104, 264 ...
Frame buffer, 262 ... Change point detection circuit 106,
206 ... R / W control circuit, 184, 188 ... Delay circuit,
186 ... Decoding circuit, 120 ... Monitor device, 140 ... Storage device, 220 ... Video camera, 222 ... Imaging device, 22
4 ... Identification data generation circuit, 226 ... Switch, 228 ...
Data addition circuit, 230 ... Recording device

Claims (5)

[Claims] 1. A monitor device, a changing point detecting means for detecting a changing point of an image, a dividing means for dividing the image data containing the image for each of the changing points, and each of the divided image data. At the same time, a video data search device having a display means for displaying on the monitor device. 2. The video data is accompanied by time code data indicating the time at which the video data was generated over time, and the change point detecting means corresponds to a position where the time code data is discontinuous. The video data search device according to claim 1, wherein the position of the video data to be detected is detected as the change point. 3. The video data search according to claim 1, wherein the display means displays the time code data corresponding to each of the divided video data in association with each of the divided video data. apparatus. 4. Identification data indicating a scene delimiter is added to a scene delimiter position of the video data, and the change point detecting means detects the identification data to detect the scene delimiter of the video data. The video data search device according to claim 1, wherein a position to which identification data is added is detected as the change point. 5. The video data is video data that is compression-coded between frames, and independent frame data that can be independently decoded from video data of another frame and correlation that correlates with video data of another frame. Frame data, further comprising a decorrelation frame data detection unit for detecting the decorrelation frame data from the video data or the divided video data, the display unit, the detected decorrelation frame The video data search device according to claim 1, wherein data is sequentially displayed on the monitor.