JPH08110871A - Method and device for reading memory - Google Patents

Abstract

PURPOSE: To decrease the transfer amount of repetitive image data and compress the repetitive data written to an FIFO by repeatedly reading out the same data in a data read mode according to a read address pointer. CONSTITUTION: An indeterminate amount of data are read out from the FIFO 120 through a data read interface 136 and at this time, they are read out in order according to the read address pointer from a read address pointer control part 139 controlled by a read controller 170. The read address pointer of next FIFO data is stored in the read address pointer control part 139 through a CPU 140, a CPU interface 132, and a control register group 131, and an indeterminate amount of data are read out from the FIFO 120 through normal FIFO operation. Here, it is decided whether or not data need to be repeated and when the same data are repeated, the read address pointer control part 139 is so controlled that a read is made from the data of the stored read address pointer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory reading method and apparatus most suitable for an image processing apparatus, and more particularly to first-i.
n first-out (hereinafter simply referred to as FIFO)
The present invention relates to a memory reading method and apparatus most suitable for a memory.

[0002]

2. Description of the Related Art Image processing systems for printers that demand high quality are systems that comprehensively integrate and edit images such as characters and pictures. Particularly in the field of desktop publishing, a page description language such as Postscript is used. Is being made possible by. Image processing systems for printers require too much data to process characters and descriptive languages for integrated processing of images and processing by a CPU (software), resulting in lack of performance. Often becomes. To output only the code data in order to create a block for printing, it is necessary to convert each character to a bit map and also to expand it into a bit map every few rasters in advance. Stores all or part of the output image in a temporary buffer and sends it to the output device, and waits while the output device accumulates in the output image buffer to reduce the memory capacity of the buffer. It is common to do so.

[0003]

In the image processing system as described above, in the image output section, the output data is stored in the buffer, then read and transferred, and the image is recorded by the output device. In this case, it is convenient to use a first-in first-out (FIFO) method for the buffer and to process the longest staying data first. Similar processing is performed in the input unit that reads and inputs an image. When a FIFO memory is used as such a buffer, the data in the FIFO memory will be lost once read and used, and the same data cannot be read twice. That is, the stored data cannot be repeatedly used in the FIFO memory. Therefore, it is extremely disadvantageous when the same data is repeatedly used like an image processing system.

The present invention has been made under the circumstances as described above, and an object of the present invention is to make it possible to repeatedly read data from a FIFO memory and to utilize the same in an image processing apparatus or the like. Another object of the present invention is to provide a memory reading method and device.

[0005]

SUMMARY OF THE INVENTION The present invention relates to a memory reading method, and an object of the present invention is to read an indefinite amount of data written in a memory and read a next data read address pointer. Is stored in the controller,
In normal operation, read the indeterminate data from the memory,
This is achieved by controlling the controller to read from the data of the read address pointer stored in the controller and repeating the reading from the memory and the control of the controller as necessary.

The present invention also relates to a read-out device of a FIFO memory, and the above-mentioned object of the present invention is constituted by a FIFO memory and a controller, and the controller is a controller register group controlled by a CPU and data writing to the FIFO memory. And an interface unit for reading, a write address pointer control unit connected to a write controller for controlling data writing to the FIFO, and a read address pointer control unit for controlling data reading from the FIFO. The write address pointer control unit stores a write address pointer, and the read address pointer control unit stores a read address pointer.

[0007]

According to the present invention, the write address pointer is added when storing in the FIFO, and the data is read out by referring to the read address pointer. Therefore, the stored data in the FIFO can be repeatedly read out, the write amount of the repeated data to the FIFO can be compressed, and the transfer amount of the repeated image data can be reduced.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image processing system which is a premise of the present invention will be described with reference to the drawings.

FIG. 1 shows an example of the overall configuration of an image processing system. A plurality of editing workstations 10 are provided.
Are connected to each other via Ethernet, and one of the workstations 10 is connected to a galley printer 20 which performs galley printing with a relatively low image quality. A workstation 30 for a server having a data server and a recorder server function is further connected to the Ethernet, and a mount input device 40 for reading and inputting a layout mount for printing is attached to the server workstation 30. A plurality of color scanners 50, 50 that are connected via the input controller 40A and that read and input a color image or a monochrome image of patterns, characters, figures, etc. by color separation are input via the plurality of input controllers 50A, 50A. It is connected. Further, the server workstation 30 has an output synchronization buffer 70 having functions of decompression, halftone shading, merging (line drawing and continuous tone (monotone) image), and buffering for synchronization.
A film printer 60 for outputting a high quality image is connected via the.

FIG. 1 shows an example in which a plurality of editing workstations 10 and one server workstation 30 are systematically combined. As shown in FIG. 2, one editing / server workstation 30A is used. It is also possible to have a stand-alone configuration with. In addition, other information (for example, LAN (Lo
(Cal Area Network) information, information from other computer systems, etc.) and processes it. Although the output synchronization buffer 70 is inserted between the server workstation 30 and the film printer 60 in the configuration examples of FIGS. 1 and 2, it may be incorporated in the film printer 60. .

The editing workstation 10 and the server workstation 30 can take various forms depending on the system configuration, but here, for convenience, an example of the same hardware configuration will be described with its details shown in FIG. The workstation 30 (or 10) is a CPU 30 that controls the entire system.
1 and a hard disk 302 for storing necessary information, a CRT 303 as a display unit, a keyboard 304 and a mouse 305 as an input operation unit,
It has a digitizer 306, a pointing means such as a trackball and a joystick, and can be loaded with a floppy disk (FD) 307 as a storage means.

FIG. 4 is a block diagram showing the overall configuration of the system shown in FIG. 1. The mount information KS (1 bit) read by the mount input device 40 is sent to the workstation 30 via the input controller 40A. Has become
C of four colors read by a plurality of color scanners 50, 50
MYK (Cyan, Magenta, Yellow
w, Black) color information CL1, CL2 (= 3)
2 bits; or K monocolor information = 8 bits) is sent to the workstation 30 via the input controllers 50A, 50A. Input controller 40A (50A)
Is designed to simultaneously perform high-density data processing for high image quality processing and coarse-density data processing for display, etc. in parallel at the same time, achieving high speed as a whole and efficient data processing. Has been realized. Input controller 40A,
50A has the same configuration, and the thinning unit 401 repeatedly performs thinning in a feedback manner, for example, 1/2, 1 /
Input data KS (CL1, CL2) is thinned out at an integer ratio such as 3, ..., 1/6, ..., 1 / n, but thinning is naturally performed for high density data required for high image quality output. Not done. Further, in the input controller 40A (50A), data compression is performed together with data thinning in the compression unit 402, and the thinned and compressed data is temporarily stored in a buffer (not shown).

Data (1 bit (line drawing information), 8 bits (mono color), 32 bits (full color)) temporarily stored in the input controller 40A (50A) is input to the server workstation 30 as input information INS. External information EXS from another personal computer or the like connected to the external system is also input to the server workstation 30. The server workstation 30 includes a scan server 320 for converting the format of each input information and registering an image, and further includes a recorder server 310 for managing an output job. Allocation information from the recorder server 310 is provided. (Characters, figures, tables, etc.
Information for specifying the layout and size of photographs, etc.) PSD
Is input to the raster image processing unit (PSRIP) 312. Further, the server workstation 30 is provided with a data disk 311 for storing image data, and the image data IGS read from the data disk 311 is stored in the image replacement unit (Open PrePress Int).
erface) 313. Image replacement unit 3
The image data IGSA replaced in 13 is input to the raster image processing unit 312, and the raster image processing unit 3
The image is converted into a raster image at 12, and the pattern or the like in the image data is converted into a halftone dot. If necessary, the data-compressed raster data RD is input to the output synchronization buffer 70. The output synchronization buffer 70 synchronizes the data output with the printing speed of the film printer 60, performs necessary expansion on the data-compressed data, and further performs merging and halftone dot transmission to the film printer 60. To do.

FIG. 5 shows the detailed software configuration of the server workstation 30, and the input information INS.
The external information EXS is input to the format conversion unit 321 in the scan server 320, the format-converted data is used to create an image for display (display image) by the display image creation unit 322, and an image for icon (icon image). ) Is created, and the image registration unit 324 performs image registration processing. Registration data SS of the display image and the icon image output from the scan server 320
Although D is input to the database manager 330 and data is stored therein, the image data IG is stored in the data disk 311.
Is input to the allocation data (PostScript D
ata) PS is input to the recorder server 310 that manages output jobs. Database manager 330
Includes a large attachment module 340 for imposing each page, an image processing module 350 for performing line drawing preprocessing (noise removal, rotation, etc.), retouching and clipping processing of a continuous tone image, a mount layout, A plate collection module 36 for collecting image data such as image layout, figure generation, and shading
0, a data management module 370 that performs output job management and data management, and an operation data control module 380 that performs color editing, hatching editing, ground stop registration, and the like are connected by software.

Here, the processing operation of the database manager 330 will be described with reference to the flowchart of FIG. 6. When the registration data SSD such as the mount and the part image transmitted from the scan server 320 is input (step S1). Image data IG is stored in the data disk 311 via the database manager 330 (step S2). At the time of data correction, the database manager 330 reads out the image data from the data disk 311, and the image processing module 350 performs retouching (correction work for the purpose of correcting color, gradation, scratches, etc.), dust removal, cutout, etc. Manager 330
The data is stored in the data disk 311 via (step S3). Next, the database manager 330 performs plate-collection processing (arranges a mount, arranges each part along the mount, and performs character processing to synthesize parts such as characters, figures, and images according to the designated layout). However, the database manager 330 first reads the image data IG from the data disk 311, performs the plate collection operation by the plate collection module 360, and then stores the processed data in the data disk 311 via the database manager 330. Store. And further data disk 3
Image data IG is read out from 11, and large paste module 3
40, the imposition instruction and work are performed, the imposition data is stored in the data disk 311 via the database manager 330, and the imposition is performed (step S
5) Next, the data is extracted from the data disk 311 to the database manager 330, and the recorder server 310
The output process is performed in step S6.

FIG. 7 shows the target of input data (binary data,
The relation between layout information, bitmap data, continuous tone image) and process (input, plate collection / editing, output) is shown as data and flow of functions that the operator is aware of. The data is read by the mount input device 40 or the color scanner 50 to remove dust, retouch, rotate,
Enlargement / reduction processing is performed to obtain image editing data, and P
The ostScript information is RIP (Raster Im
image processor; data expressed in a page description language such as PostScript is developed and converted into bitmap data or the like) to be image editing data. Also, the bitmap data is format-converted by a filter to become image editing data, and the continuous tone image is read by the color scanner 50 or directly input to be retouched, cut out, and subjected to image processing to become image editing data. . The keyword, the image name, and the job name as the data management information are also captured in the image editing data. Image editing data is processed such as mount processing (closed area automatic recognition), drawing, object editing, composition, transformation, rotation, shading / attribute change, layout, photo embedding, etc., history image display change, distributed editing , Data saving is executed. After each of the above processes, color separation, spot color plate, and trapping are performed, and then imposition is performed page by page, and plate collection / editing is completed. The "special color plate" is a plate for printing with an ink other than ordinary CMYK, and for example, (1) black and gold red "gold red" in two-color printing, (2) gold, silver, (3) When expressing the color of a woman's lipstick in a photograph in a colorful way, use it as a separate plate for the lipstick, adding it to normal CMYK, and stacking ink on it. In addition, "trapping" is, specifically, when arranging with the hair removed,
It means overlapping little by little to prevent blank areas due to misalignment of printing. The data collected / edited by the server workstation 30 is used for galley output by the galley printer 20, and PDL (Page Description).
Language; for example, PostScript) output, or film output by the film printer 60.

An example of using the FIFO in the image processing system will be described with reference to FIG. FIG. 8 corresponds to the input controller 40A of the image processing system shown in FIG. 4, and is applicable to the output synchronization buffer 70 as well. A read by the image reading unit 100 such as a line sensor
The A / D converted image data is input to the thinning circuit 102 via the a contact of the switching unit 101 to be thinned out, then compressed by the compressor 103 and temporarily stored in the FIFO 104. The second and subsequent data read from the FIFO 104 is stored in the hard disk 105 via the image bus, and the stored data is expanded by the expander 106, and then the thinning circuit 102 is passed through the b contact of the changed switching unit 101. The storage in the hard disk 105 via the compressor 103 and the FIFO 104 is repeated. Also, the image bus has a DMAC (Dir
ct Memory Access Control
er) 114 and a CPU bus via a dual port memory 113, and an MPU (Micro-Processor Un) is connected to this CPU bus.
it) 110, ROM 111 and RAM 112 are connected. In such an image processing system, the FIFO
The stored data of 104 is often used repeatedly, but the conventional FIFO has a problem that once read, it cannot be repeated twice or more. Similarly, in the output synchronization buffer 70 shown in FIG. 4, image data is often repeatedly output, which cannot be supported by the conventional FIFO.

Therefore, in the present invention, as shown in FIG.
When the line data L1 is stored in the FIFO, the write address pointers “0, 1, 2, ..., N” are assigned to the respective pixels A, B, C ,. A plurality of lines # 1, # 2, # are read by reading the stored data based on the set read address pointer.
It is possible to output 3 repeatedly. Specific examples will be described below.

FIG. 10 shows an example of the configuration of the present invention, in which F
The IFO 120 includes a FIFO unit and a DRAM (Dynamic).
RAM) and is connected to the FIFO controller 130. CP for the FIFO controller 130
U140, hard disk 150, write controller 1
60 and the read controller 170 are connected,
The decompressor 180 is connected and the decompressed data ED is output. The CPU 140 executes overall control, the write controller 160 controls data writing to the FIFO 120, and the read controller 170 controls the FIFO.
Data reading from the O120 is controlled. Further, the FIFO controller 130 has a control register group 131, is connected to the CPU 140 via the CPU interface 132, and has a refresh request interface 133 for outputting a data refresh request to the DRAM section via the bus line. Connected and write to the same address at the same time,
An arbitration control unit 134 for controlling the priority order when a read or refresh request is made is connected. The control register group 131 further includes a data write interface 135 via a bus line,
Data read interface 136, memory capacity monitoring unit 1
37, a write address pointer control unit 138 and a read address pointer control unit 139 are connected, and a data write interface 135 and a data read interface 136 are connected.
Is connected to the FIFO 120, the write address pointer controller 138 is connected to the write controller 160, and the read address pointer controller 139 is connected to the read controller 17.
Connected to 0.

The control register group 131 includes a write address register, a read address register, a data length register, a command register, a status register,
It is composed of a status latch register, an interrupt mask register and comparison register data. The write address register indicates the data write address to the DRAM in the FIFO 120, the read address register indicates the data read address from the DRAM, and the data length register indicates the amount of data between the write address register and the read address register. By performing the subtraction, the data amount information in the FIFO 120 is generated, the command register software resets the FIFO controller 130, and the status register the current state of the FIFO controller 130 (overread, overwrite, empty, near empty, near full, full). ) Is shown. The status latch register is set when each state of the FIFO controller 130 is established, the interrupt mask register controls the interrupt factor, and the comparison register indicates the amount of data at the time of near-empty or near-full determination.

The memory capacity monitoring unit 137 determines F from the amount of data written to the FIFO 120 via the data write interface 135 and the amount of data read from the FIFO 120 via the data read interface 136.
The CPU 140 monitors the current data amount of the IFO 120
To notify. Further, the details of the read address pointer control unit 139 are as shown in FIG. 11, the read address pointer 1391 is input to the latch 1392 and the read address counter 1393, and the start address ST is latched 139 by the storage control signal MS.
Then, the read address counter 1393 executes the read operation with the read address pointer RS from the latch 1392 as the read start in accordance with the load signal LS.

In such a configuration, the operation is shown in FIG.
Explanation is given with reference to the flow chart of 2. First, the data is written into the FIFO 120 via the data write interface 135 (step S10), but at this time, the data is sequentially written according to the write address pointer from the write address pointer control unit 138 controlled by the write controller 160. Then, the data read interface 136
Although an indefinite amount of data is read from the FIFO 120 via the (step S11), the data is sequentially read according to the read address pointer from the read address pointer control unit 139 controlled by the read controller 170 at this time. The read address pointer of the next FIFO data is
It is stored in the read address pointer control unit 139 via the CPU 140, the CPU interface 132, and the control register group 131 (step S12), and the normal F
Indefinite amount of data is read from the FIFO 120 by the IFO operation (step S13). Here, it is determined whether or not the data need to be repeated (step S14), and the lines # 1 and # in FIG. 9 are determined.
When repeating the same data as in No. 2 and # 3, the read address pointer control unit 13 is made to read from the data of the read address pointer stored in step S12.
9 is controlled (step S15), the details of which are shown in FIG.
According to. That is, the read address pointer 13
91 is latched by the latch 1392 based on the storage control signal MS, read based on the load control signal LS to the latch 1392, and the read address pointer is set in the read address counter 1393. By reading based on the read address counter 1393, the same address can be repeatedly used. Step S1
If there is no need to repeat in 4, the process ends.

[0023]

As described above, according to the present invention, the FIFO
A write address pointer control function and a read address pointer control function are added to, and the same data can be repeatedly read according to the read address pointer at the time of data reading, so that the transfer amount of repeated image data can be reduced and the repeated data FIFO can be reduced. It is possible to realize the compression of the writing amount to. Further, since the repeated data need only be stored once, it is possible to reduce the amount of FIFO memory.

[Brief description of drawings]

FIG. 1 is an overall connection diagram showing a configuration example of an image processing system to which the present invention can be applied.

FIG. 2 is an overall connection diagram showing another configuration example of an image processing system to which the present invention can be applied.

FIG. 3 is a block configuration diagram showing a hardware configuration example of a workstation.

FIG. 4 is a block diagram showing an example of the overall configuration of an image processing system to which the present invention can be applied.

FIG. 5 is a block diagram showing a software configuration example of a server workstation.

FIG. 6 is a flowchart showing an operation example of a database manager.

FIG. 7 is a flow chart of data and functions showing a relationship between a target of input data and a process.

FIG. 8 is a block diagram of an image processing system showing an example of using a FIFO.

FIG. 9 is a diagram showing the principle of the present invention.

FIG. 10 is a block diagram showing an embodiment of the present invention.

FIG. 11 is a block configuration diagram showing details of a read address pointer control unit.

FIG. 12 is a flowchart showing an operation example of the present invention.

[Explanation of symbols]

 30 Server workstation 60 Film printer 70 Output synchronization buffer 100 Image reading unit 103 Compressor 104, 120 FIFO 106, 180 Expander 130 FIFO controller 131 Control register group

Claims (4)

[Claims] 1. The non-quantitative data of the data written in the memory is read, the read address pointer of the next data is stored in the controller, and the non-quantitative data is read from the memory by the normal operation, and the read-out address pointer is stored in the controller. A memory reading method, characterized in that the controller is controlled so as to read from the stored data of the read address pointer, and reading from the memory and control of the controller are repeated as necessary. 2. The memory reading method according to claim 1, wherein the memory is a FIFO memory. 3. A FIFO memory and a controller, the controller comprising a group of controller registers controlled by a CPU, an interface section for writing and reading data to and from the FIFO memory, and the FIFO.
A write address pointer control unit connected to a write controller for controlling data writing to the O;
A read address pointer control unit for controlling data read from the read address pointer control unit, the write address pointer control unit storing a write address pointer, and the read address pointer control unit storing a read address pointer. A memory reading device characterized in that. 4. The read address pointer control unit comprises a storage unit for storing a read address pointer and a read address counter for controlling a data read address and setting the read address pointer stored in the storage unit. The memory reading device according to claim 3,