JPH0766265A - Manufacturing equipment - Google Patents

Abstract

PURPOSE:To enable works to be lessened in number of processes and fraction defective by a method wherein works are selectively transferred as required and loaded onto each processing section from a work sheet transfer mechanism or unloaded from each processing section and transferred to a work sheet transfer mechanism. CONSTITUTION:Processing sections 101 wherein a lithography process is carried out are each equipped with a mechanism which loads wafers located at the prescribed positions in linear transfer paths 103 and 103b onto the processing sections 101 or unloads wafers from the processing sections 101. A ring-shaped transfer 102 is connected to various processing sections 104 to 107, 109 to 112, and 114 to 119. Each processing section is equipped with a mechanism which loads a wafer located at a position prescribed for each section in the ring-shaped transfer path 102 onto the processing section or unloads a wafer from the processing section. By this setup, a work can be lessened in number of processes and fraction defective.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing apparatus used for manufacturing a product group by subjecting an object to be processed to many different processes, and more particularly to a semiconductor wafer processing apparatus in the semiconductor industry.

[0002]

2. Description of the Related Art Semiconductor devices, ICs (integrated circuits), LSIs
A circuit element used for assembling (large-scale integrated circuit) or the like is generally formed of at least one semiconductor piece (pellet). This pellet is generally obtained by cutting a circuit element region, which is vertically and horizontally aligned and arranged on a semiconductor wafer, at its boundary.

A great deal of processing is required to form a circuit element region on a semiconductor wafer. There are various processing departments used to perform various types of processing on semiconductor wafers, and in some cases, the same semiconductor wafer is processed more than once.
In addition, the number and sequence of various types of processing performed on a semiconductor wafer are generally at least partially different depending on the type of product to be manufactured.

[0004] The conventional method which has been used as an efficient method for performing such processing on a large number of semiconductor wafers is as follows.
It is a job-shop-type manufacturing apparatus that collectively arranges processing departments that perform common processing on semiconductor wafers. By adopting this arrangement, a large number of various types of semiconductor wafers are processed at once by each processing department group. However, since many workers move around in a clean space with a processing department that processes semiconductor wafers that must be kept at a high level of cleanliness, dust and contaminants adhering to clothes and the floor scatter in the clean space. Therefore, there is a problem in that the non-defective rate is lowered due to adhesion and adsorption to the semiconductor wafer.

Automation of semiconductor wafer processing is effective in solving such problems. As automation progresses, as described in JP-A-64-6540, semiconductor wafer processing is performed in an unmanned apparatus to prevent dust and contaminants from adhering to and adhering to the semiconductor wafer. By organically controlling a series of processes to be performed on wafers and managing the products of many types of semiconductor wafers, it has already been done in part to shorten the product completion, improve the yield rate, and reduce the number of workers. ing. However, the effects of shortening the work completion and improving the yield rate have not reached a sufficient level even if the automation is advanced to this point. The main reason for this is that, in the conventional technology, generally, the transportation between a plurality of processing departments is carried out in batches with a plurality of semiconductor wafers called a lot as a unit.

The diameter of semiconductor wafers is gradually increasing in order to improve productivity. Since it is necessary to perform more precise processing on such semiconductor wafers, each processing department is shifting from the conventional batch processing to single wafer processing, and the transportation within the processing department is performed as a single wafer transportation in a plurality of processing chambers. Integrated cluster tools are becoming popular.

However, even if the processing department is a single-wafer processing department such as a cluster tool, as long as the processing is carried out in batch units, one processing requires a processing time corresponding to the number of semiconductor wafers in one lot, and the subsequent processing. Waiting time is longer. For this reason, there is a limit in principle in shortening the completion of work, no matter how sophisticated computerized product management and process management. Furthermore, the waiting time between two specific continuous treatments differs greatly from lot to lot, and therefore from semiconductor wafer to semiconductor wafer, which is also a problem. This is because it affects the processing of semiconductor wafers that require highly accurate control, and causes dust and contaminants to adhere to and be adsorbed on the semiconductor wafers, resulting in a decrease in the yield rate.

[0008] In order to solve this problem associated with batch transportation, some attempts have been made to use single-wafer transportation between processing departments. Regarding the conventional manufacturing apparatus based on single-wafer conveyance, for example, JP-A-4-130618 and JP-A-4-199709 are available.
It is described in detail in the publication. The first problem with these devices is that they cannot cope with various manufacturing processes. When there is no freedom in the manufacturing method because it was connected by the single-wafer conveying path,
It becomes very difficult to manufacture multiple products with different manufacturing methods using the same device. The second problem is that the single-wafer conveying path is complicated. When the transport path becomes complicated, the manufacturing apparatus becomes expensive, and the frequency of failures increases, resulting in a significant decrease in the productivity of the manufacturing apparatus.

[0009]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a manufacturing apparatus capable of shortening the work completion and improving the yield rate.

[0010]

In order to achieve the above object, in the manufacturing apparatus of the present invention, a single wafer can be transferred one by one between a plurality of processing departments that continuously process semiconductor wafers. At least one processing department group is connected by a transfer mechanism, and each processing department selectively receives non-processed objects from the single-wafer transfer mechanism as needed and loads or unloads them into the processing department. Then, it has a mechanism for delivering to the single-wafer conveying mechanism. More preferably, at least one processing department is provided in the processing department group for loading an object to be processed into the processing department group from outside the processing department group or unloading the processed object from the processing department group to outside the processing department group. That is.

[0011]

[Function] Each processing section has a mechanism for selectively receiving an object to be processed from the single-wafer transport mechanism and loading it into the processing section, or unloading it from the processing section and delivering it to the single-wafer transport mechanism. This is effective in simplifying the single-wafer conveying path. The transport mechanism is also equipped with at least one processing department for loading an object to be processed into the processing department from outside the processing department or unloading from the processing department to outside the processing department. Leads to simplification of. That is, the processing department for that purpose has the function of loading and unloading the object to be processed from the processing department group, and the function of loading and unloading the object to be processed from the processing department is possessed by the processing department. This is because if the processing department has it, the single-wafer carrying mechanism can have a function of carrying only. Further, whether or not to receive a specific processed object at a physically loadable position on the single-wafer conveying path can be selected depending on whether or not the load / unload function of the processing department is activated, so that one manufacturing It is possible to manufacture a wide variety of products by various manufacturing methods with the device.

It has been conventionally known that a plurality of processing departments for continuously processing semiconductor wafers are connected by a single-wafer transfer mechanism capable of transferring semiconductor wafers one by one to form at least one processing department group. Unlike processing in batches, which required processing time for one lot of semiconductor wafers in one processing, when processing of one semiconductor wafer is completed, the wafers are sequentially transferred to the next processing department. It is possible to perform subsequent processing. As a result, the waiting time between two specific and consecutive processes is generally unified between the semiconductor wafers, and the time is shortened. Therefore, it is possible to shorten the process completion and improve the yield rate.

Most desirable is a manufacturing apparatus in which all processing departments that continuously process semiconductor wafers are connected by a single-wafer transfer mechanism to form one processing department group. Even the manufacturing equipment consisting of 2) has the effect of shortening the work completion and improving the yield rate.

Further, in the manufacturing apparatus of the present invention, the transportation between the processing departments is automated and the semiconductor wafer is transported in a local clean space such as nitrogen or vacuum, so that the adhesion of dust to the semiconductor wafer and the contamination In order to prevent the adsorption, there is also an action which does not require a large and ultra-high cleanliness space as in the past.

[0015]

EXAMPLE 1 Example 1 will be described with reference to FIG. This embodiment is an embodiment in which the present invention is applied to a manufacturing apparatus for manufacturing a silicon logic LSI. The logic LSI to be manufactured is a complementary MOS LSI having a two-layer metal wiring.

FIG. 1 is a perspective view showing a manufacturing apparatus of this embodiment. A mechanism for single-wafer transfer of wafers around a plurality of processing departments 101 for performing a series of processes related to a lithographic process including a resist coating process, a resist bake process, an exposure process of a mercury i-line lamp light source, a resist developing process, and the like. A ring-shaped transport path 102 is provided. Multiple processing departments 1 that perform processing related to lithography processes
01 is capable of performing a series of two processes, one for fine patterns and one for rough patterns, on separate semiconductor wafers in parallel, and the wafer is kept at atmospheric pressure or higher between the processing departments that perform two successive processes. It is tied with a mechanism that conveys single-wafer in clean nitrogen. Part of the inside of the ring-shaped transport path 102 is filled with clean nitrogen at a pressure of atmospheric pressure or higher, and the other part is in a vacuum. A plurality of processing departments 101 and a ring-shaped transport path 10 that perform processing related to the lithography process.
The two are connected by linear conveying paths 103a and 103b. Both of the linear transfer paths 103a and 103b have a mechanism for single-wafer transfer of wafers in nitrogen. Multiple processing departments 10 that perform processing related to the lithography process
1 is a mechanism for loading a wafer at a predetermined position on the linear transfer paths 103a and 103b into the processing department 101, and unloading a wafer from the processing department 101 to a predetermined position on the linear transfer paths 103a and 103b. Have.

Various processing departments 104 to 107, 109 to 112, 114 to 119 are connected to the ring-shaped conveying path 102. Each processing section loads a wafer at a position determined for each processing section of the ring-shaped transfer path 102 into each processing section, or conversely, from each processing section to a wafer at a specified position on the ring-shaped transfer path 102. Has a mechanism for unloading.

The ring-shaped conveying path 102 and the linear conveying path 10
Wafers can be moved between any two processing departments by the loading and unloading mechanisms of 3a and 103b and each processing department. Therefore, since it is possible to combine the processes selected from the processes under various conditions in all processing departments in an arbitrary order as needed, it is possible to manufacture a wide variety of products by various manufacturing methods. is there.

The dry etching processing section 104 includes aluminum or an alloy containing aluminum as a main component, tungsten or an alloy containing tungsten as a main component such as titanium-tungsten, titanium nitride, or metal silicide such as titanium silicide or tungsten silicide, copper or the like. This is a processing department that can perform dry etching processing on various metals or metal compounds used for electrode wiring layers of circuit elements, such as alloys containing copper as a main component, on wafers.

In the dry etching processing section 105, silicon or silicon or silicon dioxide into which impurities such as boron, phosphorus, or arsenic are introduced as required or impurities such as boron, phosphorus, arsenic, or germanium in accordance with need is introduced. Wafers are dry-etched with various silicon or silicon compounds used for electrode wiring layers of circuit elements such as silicon dioxide and silicon nitride, insulating film layers of MOS transistors and capacitors, element isolation regions or interlayer insulating film layers It is a processing department that can.

The film formation processing section 106 includes silicon, silicon into which impurities such as boron, phosphorus, and arsenic have been introduced as necessary, silicon dioxide, or boron as necessary.
Electrode wiring layers of circuit elements such as silicon dioxide, silicon nitride, etc., in which impurities such as phosphorus, arsenic, germanium, etc. have been introduced,
This is a processing department capable of performing a film forming process of various kinds of silicon or silicon compounds used for an insulating film layer of a MOS transistor or a capacitor, an element isolation region or an interlayer insulating film layer. The film forming process performed on the wafer in the processing section 106 is performed by the CVD method, and the raw material gas containing silicon is an inorganic compound such as silane, disilane, or dichlorosilane.

The film formation processing section 107 is for an interlayer insulating film layer or passivation of a circuit element, such as silicon dioxide or silicon dioxide into which impurities such as boron, phosphorus, arsenic, and germanium are introduced as necessary, silicon nitride, or the like. Is a processing department capable of performing a film forming process of a silicon compound used for the protective film layer and the like on the wafer. Plasma CVD is used for the film forming process performed on the wafer in the processing section 107.
As the raw material gas containing silicon by the method, inorganic compounds such as silane, disilane and dichlorosilane and organic compounds such as TEOS are used. Four processing departments 104 to 107
The processing chamber is exhausted by the exhaust system 108.

The film forming processing section 111 includes aluminum or an alloy containing aluminum as a main component, tungsten or an alloy containing tungsten as a main component such as tungsten, titanium nitride, titanium silicide, metal silicide such as tungsten silicide, copper or copper. Is a processing department capable of performing film forming processing of various metals or metal compounds used for electrode wiring layers of circuit elements such as alloys containing as a main component. The film forming process performed on the wafer in the processing department 111 is a sputtering method.

The film forming processing section 112 is a processing section capable of performing film forming processing of various metals used for electrode wiring layers of circuit elements such as aluminum, tungsten and copper on a wafer. The film forming process performed on the wafer in the processing section 112 is based on the CVD method.

A control section 113 controls a processing section 109 for performing cleaning processing and wet etching processing on the wafer, a processing section 110 for performing heat treatment for oxidation on the wafer, and film forming processing sections 111 and 112. The control system 113 has a mechanism for detecting the states of the respective processing chambers of the respective processing departments 109, 110, 111, 112, the gas supply system, the exhaust system, the power supply system, etc., and controls the respective processes or controls the respective processing departments. It is equipped with a mechanism for feeding back the detection result.

A processing section 114 for performing impurity introduction processing on the wafer by ion implantation, a processing section 115 for performing cleaning processing and wet etching processing on the wafer, and a processing section 116 for performing resist removal processing on the wafer are respectively coupled to the ring-shaped transfer path 102. Has been done. By the resist removal processing by the single-wafer asher in the processing department 116 and the cleaning in the processing department 115, all the processes relating to the series of resist removal steps can be performed.

The processing section 117 for applying heat treatment to the wafer is RTA (Rap) in an atmosphere of nitrogen, hydrogen, oxygen, argon or the like.
id Thermal Annealing) This is a processing department that can perform wafer processing. The wafer loading / unloading processing section 118 is a processing section that loads wafers from outside the manufacturing apparatus to the main manufacturing apparatus and unloads from the main manufacturing apparatus to outside the manufacturing apparatus. The loading / unloading processing section 118 of the manufacturing apparatus according to the present embodiment has a function of loading a plurality of wafers into the manufacturing apparatus one by one when the wafer is installed at one time, and conversely, unloads one by one from the manufacturing apparatus to obtain a plurality of wafers. It also has the function of taking out the wafer to the outside at once.

The film forming processing section 119 is a processing section that performs a process of forming a coating film for flattening an interlayer insulating film on a wafer. The processing department 119 has a mechanism capable of performing not only the coating but also the process of baking the coating film as necessary. The processing departments of the manufacturing apparatus of this embodiment shown in FIG. 1 are all single-wafer processing departments. All the continuous single-wafer processing departments are connected by a single-wafer conveying mechanism, and the whole manufacturing apparatus is one processing department group.

Next, a series of wafer processing by the manufacturing apparatus of the present invention will be described. First, the wafer enters the manufacturing equipment from the load / unload processing department 118. When 25 wafers are collectively installed in the load / unload processing section 118 at a time, the wafers are loaded one by one into the manufacturing apparatus at appropriate intervals. This interval is 24 minutes on average in this embodiment. In the load / unload processing section 118 of the manufacturing apparatus of the present embodiment, a plurality of wafers are once stored in a space filled with clean nitrogen having a pressure of atmospheric pressure or higher, and the wafers taken out one by one are also clean nitrogen. Is transferred to the processing section 109 via the ring-shaped transfer path 102 filled with the water and is subjected to wet cleaning. Further, an oxidation process is performed in the adjacent processing department 110.

Next, a silicon nitride film is formed on the wafer transferred again via the ring-shaped transfer path 102 by the CVD method in the film forming processing section 106. Subsequently, the wafers that have entered a plurality of processing departments 101 that perform processing relating to the lithography process through the ring-shaped transfer path 102 and the linear transfer path 103b are subjected to resist coating processing, resist baking processing, exposure processing using a mercury i-line lamp light source, and resist processing. Processing related to a series of lithography steps including development processing and the like is performed. After this, the wafer passes through the linear transfer path 103a and the ring-shaped transfer path 102, and the dry etching processing department 10
Then, a part of the silicon nitride film is selectively removed by dry etching using the resist as a mask. Next, the wafer is transferred to the processing department 114 through the ring-shaped transfer path 102 and subjected to ion implantation processing.
After that, the resist is removed in the processing department 116. The wafer processing after the resist removal is also sequentially performed in the same manner as the series of processing described above.

The wafers that have undergone all the processing in each processing department group of the manufacturing apparatus of FIG. 1 are again transferred to the loading / unloading processing department 118 and once placed in a space filled with clean nitrogen having a pressure higher than atmospheric pressure. It is stored. In this embodiment, when 25 stored wafers are collected, they are collectively taken out from the manufacturing apparatus.

In the manufacturing apparatus of this embodiment, the load / unload processing section 118 has both a function of loading a wafer into the manufacturing apparatus and a function of unloading a wafer from the manufacturing apparatus, but has individual functions. Even if the manufacturing department is equipped with a processing department, the same function can be achieved. Further, at least one processing department is required for each processing department group to load or unload a wafer into the manufacturing apparatus, but two or more processing departments may be provided.

In the manufacture of the complementary MOS LSI having the double-layered metal wiring by the manufacturing apparatus of this embodiment, the processing time of 25 wafers was 10.1 hours. Completion was shortened to 1/10 or less compared to 135 hours in the case of the conventional batch transfer line.

In the case of processing a large number of wafers, the manufacturing apparatus of this embodiment shares the processing department with each other, so that the processing time is somewhat reduced. In the lithographic processing department, which is most commonly used, a single wafer is subjected to lithographic processing for patterning six layers and eight layers for fine patterns and rough patterns, respectively.
That is, one processing department is commonly used in eight processes, and the complementary MOS having the two-layer metal wiring of this embodiment by the device of this embodiment is shared.
This is the largest share in LSI manufacturing. Since the degree of sharing of other processing departments is kept lower than this, the decrease in processing time is not large. When the lithography process corresponding to the patterning of 8 layers is performed at 3 minutes / sheet, 24
The processing capacity in 24 hours a day is 60 sheets per minute / sheet. This defines the processing capacity of the manufacturing equipment of this embodiment. If more processing is required, a plurality of manufacturing facilities of this embodiment may be provided.

When the processing of 60 sheets / day (= 1800 sheets / month) is performed, the average processing time of all the processing of 25 sheets per lot is 17 hours. This is because all the equipment is managed to operate most efficiently by the highly computerized optimal production management system. In a conventional manufacturing apparatus based on batch transfer, no matter how the computer was used, the average processing time was reduced to about 400 hours when processing 60 sheets / day. This is because near-perfect optimization has become possible by carrying out single-wafer conveyance.

By shortening the work completion and providing a single-wafer conveying path,
The manufacturing apparatus of the present embodiment does not need to be housed in a clean space with a high cleanliness level as in the conventional case, and a good product rate equal to or higher than that of the conventional clean room can be obtained even if the manufacturing apparatus is manufactured in a clean space of a much lower class. There was also an effect. By using the manufacturing apparatus of this embodiment installed in a clean room of class 10000,
The yield rate of complementary MOS logic LSIs having a double-layer metal wiring with a minimum design dimension of 0.3 μm is 78% of that in the case where they were manufactured in a class 100 clean room using conventional equipment.
From 92% to 92%. All of these effects are effects brought about by the fact that the monofunctionalized and simplified transport mechanism which can be applied by the present invention has a low failure frequency.

(Embodiment 2) This will be described with reference to FIG. Second Embodiment A second embodiment is an embodiment in which the present invention is applied to a manufacturing apparatus for manufacturing a silicon memory LSI. The manufacturing apparatus according to the present embodiment is a manufacturing apparatus that performs a series of processes related to a wiring process of a complementary MOS LSI having a double-layer metal wiring on a wafer.

FIG. 2 is a block diagram showing the manufacturing apparatus of this embodiment. Processing departments 201 and 202 are a plurality of processing departments that perform a series of processes related to a lithography process including a resist coating process, a resist bake process, an exposure process of a mercury i-line lamp light source, and a resist developing process. Processing department 2 that performs processing related to dry etching of wiring layers
Reference numeral 03 denotes a cluster tool capable of performing a dry etching process on a metal or a metal compound such as an alloy containing aluminum as a main component, tungsten, or titanium nitride. The cluster tool is an anticorrosion process for performing anticorrosion treatment on the wafer in addition to the etching chamber. It has a processing room. Further, the processing section 203 also includes an asher processing chamber capable of performing resist removal processing on the wafer.

Regarding the resist removal, even as an independent processing section like the manufacturing apparatus of the first embodiment, at least a part of the processing section of another processing section like the dry etching processing section as in the manufacturing apparatus of the present embodiment. It may be included in part. This also applies to cleaning treatment and heat treatment.
At least a part of a processing department that performs these processes on a wafer, which is capable of performing the processes in one processing chamber, has a plurality of processing chambers such as a cluster tool provided in the manufacturing apparatus of this embodiment. This is because it is easy to add to the processing department.

The processing section 204, which carries out a process relating to dry etching of the interlayer insulating film layer, carries out a dry etching process of silicon dioxide or silicon dioxide into which impurities such as boron, phosphorus, arsenic and germanium have been introduced, if necessary. This is a cluster tool that can be applied to a wafer. In addition to the two etching processing chambers, this processing department also has an asher processing chamber that can perform resist removal processing on the wafer.

The film forming processing section 205 is a cluster tool capable of performing a film forming process of silicon dioxide or silicon dioxide into which impurities such as boron, phosphorus, arsenic, and germanium are introduced as required, and silicon nitride. Is. In addition to the processing chamber for film formation by the CVD method, SOG (S
It also has multiple processing chambers for applying and baking pin on glass. In CVD film formation, silicon dioxide is formed mainly by a plasma CVD method using TEOS as a raw material, and silicon nitride is formed by a plasma CVD method using monosilane and ammonia as raw materials. Further, the processing section 205 is also provided with a heat treatment chamber capable of performing heat treatment on the wafer as required.

The film forming processing section 206 is a cluster tool capable of performing film forming processing of a metal or metal compound such as an alloy containing aluminum as a main component, tungsten, or titanium nitride. The film forming processing performed on the wafer in the film forming processing section 206 includes a sputtering method and a CVD method. In the processing chamber for forming a film of tungsten, titanium nitride or the like by the sputtering method, the wafer may be subjected to a cleaning process by soft etching using plasma such as argon prior to the film formation if necessary. Deposition of alloys containing aluminum as the main component by sputtering, CVD
Deposition of tungsten by the method and heat treatment are performed in separate processing chambers. 207 is a processing section of the cleaning process having two cleaning process chambers.

In the manufacturing apparatus of this embodiment, all the transportation between the processing departments is single-wafer transportation. The single-wafer transport path 208 is a loop-shaped transport path, and the single-wafer transport path 208 and each processing department are connected by interfaces 211 and 212 including a common load lock chamber. Interface 21
1 includes a mechanism for loading a wafer from the single-wafer transfer path to the processing section, and the interface 212 includes a mechanism for unloading a wafer from the single-side transfer path to the single-wafer transfer path, and performs a plurality of processes related to a lithography process. A special interface 209 is provided between the processing departments 201 and 202 and the single-wafer transfer path 208 to allocate the wafers to the two processing departments 201 and 202.

The load / unload processing section 210 is shown in FIG.
It is a load / unload processing department that also has the stocker function of the manufacturing equipment consisting of one processing department group shown in Fig. 2, and the wafers that have been processed before the wiring process are always stored in a certain amount or more. It is housed in a space filled with clean nitrogen so that the wiring process can be started.

In this embodiment, the wafer processing before the wiring process is managed so that 50 or more wafers are always stored in the load / unload processing department 210. The wafers are loaded one by one into the manufacturing equipment by the load / unload processing department 210, and the wafers which have undergone all the processes in the wiring process by the apparatus of FIG. 2 are transported to the load / unload processing department 210 again and cleaned with clean nitrogen. It is stored in a filled space. The load / unload processing section 210 has a function of taking out 25 processed wafers to the outside, and the load / unload processing section 210 is used every time a wafer is required for the semiconductor manufacturing process after the wiring process. 25 wafers are automatically taken out from the load processing section 210 in units of 25. The load / unload processing department 210 also functions as a stocker for the first process of the semiconductor manufacturing process after the wiring process by having the function of storing the wafers after the wiring process.

According to the manufacturing apparatus of this embodiment, the completion time is markedly shortened as compared with the conventional manufacturing apparatus, and the difference in completion time between wafers is small. Complementary MOS having two-layer metal wiring
A series of processes related to the wiring process of LSI 150 wafers /
When done in days, the completion of all wafer wiring steps was between 4 hours and 4 hours 30 minutes. Also. On the other hand, when the same processing was performed by the conventional manufacturing apparatus with the same 150 wafers / day, it took 33 to 43 hours. The waiting time between two continuous processes is about 2 hours at maximum including the time required for transportation.

The waiting time between two continuous processes is as short as 5 minutes or less, and the effect is that it is standardized for all wafers. The single-wafer transfer path filled with clean nitrogen between all continuous processes. The effect of being connected by the process, the wafer that has been processed before the wiring process, and the wafer that has been processed in the wiring process are both housed in the space filled with clean nitrogen in the load / unload processing department 210. Due to the effects and the like, the non-defective product rate is improved as compared with the conventional manufacturing apparatus. When a complementary MOS memory LSI having a two-layer metal wiring with a minimum design dimension of 0.25 μm is manufactured, according to the manufacturing apparatus of the present embodiment, 67% is achieved with a conventional manufacturing apparatus installed in a clean room having the same class cleanliness. The non-defective rate in the wiring process was improved to 87%.

[0048]

According to the present invention, it is possible to provide a manufacturing apparatus capable of shortening the completion of a series of processes to be applied to an object to be processed and improving the non-defective rate of the object to be processed. You can

[Brief description of drawings]

FIG. 1 is a perspective view of an embodiment of the present invention.

FIG. 2 is a block diagram of an embodiment of the present invention.

[Description of Reference Signs] 101 ... Plural processing departments that perform processing relating to the lithography process, 102 ... Ring-shaped transport paths, 103a, 103
b ... Linear transport path, 104, 105 ... Dry etching processing department, 106, 107 ... Film forming processing department, 108 ... Exhaust system, 109 ... Cleaning, wet etching processing department, 1
10 ... Oxidation heat treatment section, 111, 112 ... Film formation processing section, 113 ... Control system, 114 ... Ion implantation processing section,
115 ... Wet etching processing department, 116 ... Resist removal processing department, 117 ... Heat treatment department, 118 ... Load / unload processing department, 119 ... Coating film formation processing department.

Claims (4)

[Claims] 1. A manufacturing apparatus having a plurality of processing departments capable of performing a plurality of different treatments on an object to be processed, wherein the plurality of processing departments which continuously perform the treatment on the object to be treated At least one processing department group is connected by a single-wafer transfer mechanism that can transfer one by one, and each processing department selectively receives and processes an object to be processed from the single-wafer transfer mechanism as needed. A manufacturing apparatus having a mechanism for loading or unloading to a department and delivering it to a single-wafer conveying mechanism. 2. The processing object according to claim 1, wherein the object to be processed is a semiconductor wafer, and the plurality of processing departments include cleaning processing and CVD.
Film forming process such as film forming, sputter film forming or coating film forming, heat treatment such as diffusion, oxidation or nitriding or resist baking, exposure treatment with light beam or electron beam or X-ray, resist coating treatment, resist developing treatment, resist removing treatment , Etching such as dry etching or wet etching, impurity introduction processing by ion implantation, inspection processing such as length measurement inspection or foreign matter inspection, etc., which is performed on a semiconductor wafer in LSI manufacturing, respectively. Manufacturing equipment, which is the processing department to perform. 3. The processing department according to claim 2, wherein the processing department that performs processing of loading the object to be processed into the processing department group from outside the processing department group or unloading from the processing department group to outside the processing department group. At least one manufacturing device included in the group. 4. The processing section according to claim 3, which performs processing of loading the object to be processed into the processing section group from outside the processing section group or unloading from the processing section group to outside the processing section group. A manufacturing apparatus having a function of accommodating a plurality of semiconductor wafers.