JPH0763153B2 - AM / FM receiver - Google Patents

AM / FM receiver

Info

Publication number
JPH0763153B2
JPH0763153B2 JP61052883A JP5288386A JPH0763153B2 JP H0763153 B2 JPH0763153 B2 JP H0763153B2 JP 61052883 A JP61052883 A JP 61052883A JP 5288386 A JP5288386 A JP 5288386A JP H0763153 B2 JPH0763153 B2 JP H0763153B2
Authority
JP
Japan
Prior art keywords
circuit
intermediate frequency
receiver
signal processing
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61052883A
Other languages
Japanese (ja)
Other versions
JPS62209927A (en
Inventor
義明 田中
正己 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61052883A priority Critical patent/JPH0763153B2/en
Publication of JPS62209927A publication Critical patent/JPS62209927A/en
Publication of JPH0763153B2 publication Critical patent/JPH0763153B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はAM/FM受信機において、AM,FM中間周波部が同一
チップ上に構成された半導体集積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a semiconductor integrated circuit in which an AM / FM receiver has an AM and FM intermediate frequency section formed on the same chip.

〔従来の技術〕[Conventional technology]

第2図にAM/FM受信機の従来例を示す。第2図で1,3はそ
れぞれAM用,FM用受信アンテナを示し,2,4はAM用,FM用高
周波増幅回路,5,8はAM,FM中間周波部を示す。又6,9はそ
れぞれAM,FM中間周波処理回路を示し,11はAM中間周波部
5及びFM中間周波部8の動作切換用の切換回路を示す。
又T1,T2はそれぞれAM,FM中間周波部出力端子を示しT3は
切換回路の制御信号入力端子を示す。次にこの従来例に
ついて説明する。最近の技術動向としてAM/FM受信機
は、第2図に示される用にAM,FM中間周波部5,8が同一チ
ップ上に構成された半導体集積回路12に外付けとしてAM
用,FM用高周波増幅回路2,4を接続した構成が主流となり
つつある。この第2図においてAM放送かFM放送のどちら
か一方、ここれは仮にAM放送と受信する場合を考えると
AM中間周波部5とFM中間周波部8の動作切換え用の切換
回路11に制御信号入力端子T3より制御信号が入力され、
AM中間周波部5は動作状態に、FM中間周波数部8は停止
状態となる。しかるに、外付けとして接続されたAM用,F
M用高周波増幅回路2,4は電源供給端子が前記切換え回路
11によって制御されないのでそれぞれ共に動作状態とな
る。この場合、FM用高周波増幅回路4の動作は不要であ
りここで消費される電流による電力ロスが、AM/FM受信
機の全消費電力を大きなものとする欠点があった。これ
は、FM受信機として動作させる場合でも同様にAM用高周
波数増幅回路2の動作が不要となり上述の様な欠点を生
じる。
Fig. 2 shows a conventional example of an AM / FM receiver. In FIG. 2, reference numerals 1 and 3 are AM and FM receiving antennas, 2, 4 are AM and FM high-frequency amplifier circuits, and 5 and 8 are AM and FM intermediate frequency sections. Reference numerals 6 and 9 denote AM and FM intermediate frequency processing circuits, respectively, and 11 denotes a switching circuit for switching the operation of the AM intermediate frequency section 5 and the FM intermediate frequency section 8.
In addition, T1 and T2 indicate AM and FM intermediate frequency output terminals, respectively, and T3 indicates a control signal input terminal of the switching circuit. Next, this conventional example will be described. As shown in Fig. 2, the AM / FM receiver has a recent technical trend. As shown in Fig. 2, the AM and FM intermediate frequency units 5 and 8 are externally attached to the semiconductor integrated circuit 12 configured on the same chip.
The mainstream is a configuration in which high-frequency amplifier circuits 2 and 4 for FM and FM are connected. Considering the case of receiving either AM broadcast or FM broadcast in FIG. 2 here, assuming that it is AM broadcast.
A control signal is input from the control signal input terminal T3 to the switching circuit 11 for switching the operation between the AM intermediate frequency section 5 and the FM intermediate frequency section 8,
The AM intermediate frequency unit 5 is in the operating state, and the FM intermediate frequency unit 8 is in the stopped state. However, for AM connected externally, F
The high frequency amplifier circuits 2 and 4 for M have the power supply terminals as the switching circuit.
Since they are not controlled by 11, both are in the operating state. In this case, the operation of the FM high-frequency amplifier circuit 4 is unnecessary, and there is a drawback that the power loss due to the current consumed here makes the total power consumption of the AM / FM receiver large. This is because the operation of the AM high-frequency amplifier circuit 2 is not necessary even when operating as an FM receiver, and the above-mentioned drawbacks occur.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

本発明の目的は、上述した様なAM中間周波部及びFM中間
周波部が同一チップ上に構成された半導体集積回路を使
って構成するAM/FM受信機の省電力化を得ることにあ
る。
An object of the present invention is to obtain power saving of an AM / FM receiver configured by using a semiconductor integrated circuit in which the AM intermediate frequency section and the FM intermediate frequency section as described above are configured on the same chip.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、AM中間周波部5とFM中間周波部8が同一チッ
プ上に構成された半導体集積回路12に接続されたAM用,F
M用高周波増幅回路2,4の制御としてAM中間周波部5とFM
中間周波部8の内部の利得制御回路7,10がそれぞれ接続
されこの利得制御回路7,10の制御としてAM,FM中間周波
信号処理回路6,9及びAM,FM中間周波部5,8の動作切換え
用の切換回路11に接続されたことを特徴とするAM/FM受
信機。
The present invention is for AM and F in which an AM intermediate frequency section 5 and an FM intermediate frequency section 8 are connected to a semiconductor integrated circuit 12 configured on the same chip.
AM intermediate frequency unit 5 and FM for controlling M high-frequency amplifier circuits 2 and 4
The gain control circuits 7 and 10 inside the intermediate frequency section 8 are respectively connected, and the operations of the AM and FM intermediate frequency signal processing circuits 6 and 9 and the AM and FM intermediate frequency sections 5 and 8 are controlled as the gain control circuits 7 and 10, respectively. An AM / FM receiver characterized by being connected to a switching circuit 11 for switching.

〔実施例〕〔Example〕

次に、図面を参照して本発明をより詳細に説明する。 The present invention will now be described in more detail with reference to the drawings.

第1図に本発明の原理図を示す。第1図において半導体
集積回路12内のAM中間周波部5とFM中間周波部8はAM
用,FM用高周波増幅回路2,4にそれぞれ接続されておりこ
のAM用,FM用高周波増幅回路2,4はAM中間周波部5とFM中
間周波部8の内部の利得制御回路7,10に接続されてい
る。またこの利得制御回路7,10はAM中間周波部5とFM中
間周波部8の動作切換え用の切換回路11に接続された構
成となっている。次に、本発明による動作原理について
述べる。まず仮に、AM受信機として動作する場合につい
て考えると動作切換え用の切換回路11により、AM中間周
波部5は動作状態にFM中間周波部8は、停止状態に制御
される。この時、FM中間周波部8内部の利得制御回路10
はFM中間周波信号処理回路9から の制御入力信号により動作せず、動作切換え用の切換回
路11からの制御入力信号により動作状態になる。これに
よって従来AM受信時で動作状態にあったFM用の高周波増
幅回路4の動作が制御され停止状態となる。上述と同様
のことがFM受信機として動作する場合にもいえる。この
ことにより受信側でない高周波増幅回路の動作が制御で
き、AM/FM受信機の全消費電力を軽減できる。
FIG. 1 shows the principle of the present invention. In FIG. 1, the AM intermediate frequency part 5 and the FM intermediate frequency part 8 in the semiconductor integrated circuit 12 are AM
And AM high frequency amplifier circuits 2 and 4 are connected to the AM intermediate frequency section 5 and the FM intermediate frequency section 8 inside the gain control circuits 7 and 10, respectively. It is connected. The gain control circuits 7 and 10 are connected to a switching circuit 11 for switching the operation of the AM intermediate frequency section 5 and the FM intermediate frequency section 8. Next, the principle of operation according to the present invention will be described. First, supposing that the AM receiver operates as an AM receiver, the switching circuit 11 for switching the operation controls the AM intermediate frequency section 5 to the operating state and the FM intermediate frequency section 8 to the stop state. At this time, the gain control circuit 10 inside the FM intermediate frequency unit 8
Does not operate according to the control input signal from the FM intermediate frequency signal processing circuit 9, but enters the operating state according to the control input signal from the switching circuit 11 for switching the operation. As a result, the operation of the high-frequency amplifier circuit 4 for FM, which has been in the operating state in the conventional AM reception, is controlled and brought into a stopped state. The same applies to the case where the FM receiver operates. As a result, the operation of the high frequency amplifier circuit that is not on the receiving side can be controlled, and the total power consumption of the AM / FM receiver can be reduced.

次に具体的な回路実施例として第3図及び第4図を説明
する。まず第3図は本発明における高周波増幅回路(第
1図におけるAM用,FM用高周波増幅回路2,4に相当する)
を示す。第3図において受信アンテナからの入力信号は
ソース接地型高周波増幅用トランジスタQ10のゲートに
接続された入力端子T5に入力されたトランジスタQ10に
よって増幅される。ここでR1はバイアス抵抗であり,C1,
L1で構成された共振回路はトランジスタQ10の出力抵抗
である。そしてトランジスタQ10のドレインと共振回路
との間に接続されたトランジスタQ1は、トランジスタQ1
のベース接続された制御信号出力端子T6に入力される制
御電圧によって、トランジスタQ10のドレイン電流を制
御しそれによってトランジスタQ10の利得を制御する為
のトランジスタである。端子T7は高周波増幅回路の出力
端子であり、T4は電源端子である。
Next, FIGS. 3 and 4 will be described as specific circuit embodiments. First, FIG. 3 is a high-frequency amplifier circuit according to the present invention (corresponding to the high-frequency amplifier circuits 2 and 4 for AM and FM in FIG. 1).
Indicates. In FIG. 3, the input signal from the receiving antenna is amplified by the transistor Q10 input to the input terminal T5 connected to the gate of the source-grounded high frequency amplification transistor Q10. Where R1 is the bias resistor and C1,
The resonant circuit formed by L1 is the output resistance of the transistor Q10. The transistor Q1 connected between the drain of the transistor Q10 and the resonant circuit is
Is a transistor for controlling the drain current of the transistor Q10 by the control voltage input to the control signal output terminal T6 connected to the base of the transistor Q10 and thereby controlling the gain of the transistor Q10. The terminal T7 is an output terminal of the high frequency amplifier circuit, and T4 is a power supply terminal.

次に第4図は第1図に示す半導体集積回路12内の切換回
路11の具体例として示す。第4図において、AM中間周波
部5が動作状態、FM中間周波部8が停止状態にある場合
を考える。この場合には切換回路の制御信号入力端子T3
には基準電圧端子T8より十分低い電圧信号が入力され
る。そうすると切換回路内の差動対になったトランジス
タQ6,Q7のトランジスタQ6側はオフ状態へ、トランジス
タQ7側はON状態となり,トランジスタQ6側のコレクタに
接続されたトランジスタQ4はオフ状態へ,トランジスタ
Q7側のコレクタに接続されたトランジスタQ5はオン状態
となる。次にトランジスタQ4,Q5のエミッタ側に接続さ
れたトランジスタQ2,Q3のベースにはそれぞれ、トラン
ジスタQ2側では、切換回路の出力電流は入力されずオフ
状態に、トランジスタQ3側では、切換回路の出力電流は
入力されオン状態になる。これにより制御出力端子T6側
では切換回路からの制御信号の影響を受けずAM中間周波
部による制御信号により変化した電圧レベルが出力さ
れ、また制御出力端子T6′側ではFM中間周波部は動作し
ておらずこれによる影響は受けず、切換回路からの制御
信号によりT6′に接続される。第3図に示されるような
高周波増幅回路の動作が停止するような電圧レベルが出
力される。
Next, FIG. 4 shows a specific example of the switching circuit 11 in the semiconductor integrated circuit 12 shown in FIG. In FIG. 4, consider a case where the AM intermediate frequency unit 5 is in the operating state and the FM intermediate frequency unit 8 is in the stopped state. In this case, the control signal input terminal T3 of the switching circuit
A voltage signal that is sufficiently lower than the reference voltage terminal T8 is input to. Then, the transistor Q6 side of the transistors Q6 and Q7, which are a differential pair in the switching circuit, is turned off, the transistor Q7 side is turned on, and the transistor Q4 connected to the collector of the transistor Q6 side is turned off.
The transistor Q5 connected to the collector on the Q7 side is turned on. Next, the output current of the switching circuit is not input to the bases of the transistors Q2 and Q3 connected to the emitters of the transistors Q4 and Q5 on the transistor Q2 side, and the output of the switching circuit is on the transistor Q3 side. The current is input and it turns on. As a result, at the control output terminal T6 side, the voltage level changed by the control signal from the AM intermediate frequency section is output without being affected by the control signal from the switching circuit, and at the control output terminal T6 'side, the FM intermediate frequency section operates. It is not affected by this and is connected to T6 'by the control signal from the switching circuit. A voltage level is output so that the operation of the high frequency amplifier circuit as shown in FIG. 3 is stopped.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明によれば、半導体集積回路12
に外付けとして接続したAM用,FM用高周波増幅回路で受
信機の機能としては不要な受信側でない高周波増幅回路
を制御することによりAM/FM受信機の全消費電力を軽減
できる効果がある。
As described above, according to the present invention, the semiconductor integrated circuit 12
By controlling the high-frequency amplifier circuit for the AM and FM connected externally to the receiver, which is unnecessary for the function of the receiver, the high-frequency amplifier circuit for the AM / FM receiver can reduce the total power consumption.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の原理図、第2図はAM/FM受信機の従来
例、第3図は第1図に示す高周波増幅回路の実施例を第
4図は第1図に示す半導体集積回路12の特に切換回路に
ついての実施例を示す。 1…AM用受信アンテナ、2…AM用高周波増幅回路、3…
FM用受信アンテナ、4…FM用高周波増幅回路、5…AM中
間周波部、6…AM中間周波信号処理回路、7…AM利得制
御回路、8…FM中間周波部、9…FM中間周波信号処理回
路、10…FM利得制御回路、11…切換回路、12…半導体集
積回路、13…整流回路、T1…AM受信機出力端子、T2…FM
受信機出力端子、T3…切換回路の制御信号入力端子、T4
…電源端子、T5…受信信号入力端子、T6,T6′…制御信
号出力端子、T7…高周波増幅回路の出力端子、T8…基準
電圧端子、Q1,Q2,Q3,Q4,Q5,Q6,Q7…トランジスタ、R1,R
2,R3,R4,R5…抵抗、C1,C2…コンデンサ、L1…インダク
タ、lO…電流源
1 is a principle diagram of the present invention, FIG. 2 is a conventional example of an AM / FM receiver, FIG. 3 is an embodiment of a high frequency amplifier circuit shown in FIG. 1, and FIG. 4 is a semiconductor integrated circuit shown in FIG. An embodiment of the circuit 12, especially for the switching circuit, is shown. 1 ... AM receiving antenna, 2 ... AM high-frequency amplifier circuit, 3 ...
FM receiving antenna, 4 ... FM high frequency amplifier circuit, 5 ... AM intermediate frequency section, 6 ... AM intermediate frequency signal processing circuit, 7 ... AM gain control circuit, 8 ... FM intermediate frequency section, 9 ... FM intermediate frequency signal processing Circuit, 10 ... FM gain control circuit, 11 ... Switching circuit, 12 ... Semiconductor integrated circuit, 13 ... Rectifier circuit, T1 ... AM receiver output terminal, T2 ... FM
Receiver output terminal, T3 ... Switching circuit control signal input terminal, T4
… Power supply terminal, T5… Received signal input terminal, T6, T6 ′… Control signal output terminal, T7… High frequency amplifier output terminal, T8… Reference voltage terminal, Q1, Q2, Q3, Q4, Q5, Q6, Q7… Transistor, R1, R
2, R3, R4, R5 ... Resistor, C1, C2 ... Capacitor, L1 ... Inductor, l O ... Current source

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】AM中間周波信号処理回路及びFM中間周波信
号処理回路が同一半導体基板に形成され、該半導体基板
の外部に前記AM中間周波信号処理回路の前段に接続され
たAM用高周波増幅回路と、前記FM中間周波信号処理回路
の前段に接続されたFM用高周波増幅回路を備えたAM/FM
受信機において、前記AM中間周波信号処理回路およびAM
用高周波増幅回路の利得を制御するAM用利得制御回路
と、前記FM中間周波信号処理回路及びFM用高周波増幅回
路の利得を制御するFM用利得制御回路を具備し、動作切
換え用の切換回路からの制御信号により、受信側でない
AM利得制御回路もしくはFM利得制御回路を制御し、前記
制御されたAMもしくはFM利得制御回路の出力で、前記AM
もしくはFM用高周波増幅回路の動作を停止させる事を特
徴とするAM/FM受信機。
1. An AM high-frequency amplifier circuit in which an AM intermediate-frequency signal processing circuit and an FM intermediate-frequency signal processing circuit are formed on the same semiconductor substrate, and which is connected to the outside of the semiconductor substrate at the preceding stage of the AM intermediate-frequency signal processing circuit. And an AM / FM equipped with a high-frequency amplifier circuit for FM connected to the preceding stage of the FM intermediate-frequency signal processing circuit
In the receiver, the AM intermediate frequency signal processing circuit and AM
A gain control circuit for controlling the gain of the high frequency amplification circuit for FM, and an FM gain control circuit for controlling the gain of the FM intermediate frequency signal processing circuit and the high frequency amplification circuit for FM. Control signal of, not the receiving side
The AM gain control circuit or FM gain control circuit is controlled, and the output of the controlled AM or FM gain control circuit causes the AM
Alternatively, an AM / FM receiver characterized by stopping the operation of the high frequency amplifier circuit for FM.
JP61052883A 1986-03-10 1986-03-10 AM / FM receiver Expired - Lifetime JPH0763153B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61052883A JPH0763153B2 (en) 1986-03-10 1986-03-10 AM / FM receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61052883A JPH0763153B2 (en) 1986-03-10 1986-03-10 AM / FM receiver

Publications (2)

Publication Number Publication Date
JPS62209927A JPS62209927A (en) 1987-09-16
JPH0763153B2 true JPH0763153B2 (en) 1995-07-05

Family

ID=12927276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61052883A Expired - Lifetime JPH0763153B2 (en) 1986-03-10 1986-03-10 AM / FM receiver

Country Status (1)

Country Link
JP (1) JPH0763153B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01135233A (en) * 1987-11-20 1989-05-26 Nec Corp Fm/am tuner

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60216632A (en) * 1985-03-11 1985-10-30 Sony Corp Fm-am receiver

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60181940U (en) * 1984-05-14 1985-12-03 三洋電機株式会社 AM/FM stereo receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60216632A (en) * 1985-03-11 1985-10-30 Sony Corp Fm-am receiver

Also Published As

Publication number Publication date
JPS62209927A (en) 1987-09-16

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