JPH0756805A - Memory access method - Google Patents

Abstract

PURPOSE:To reduce a load by storing a bank as the address of a logical ring buffer memory and the data of records in a record pointer and performing memory access by calculating the desired address of the ring buffer memory from this record pointer. CONSTITUTION:The record pointer of a microprocessor unit (MPU) is composed of 8 bits, this is defined as a bank value by shifting 6 bits, this value is written in an 8-bit adder and added with bank offset, the Oth and 1st bits of it are written in a bank selector for selecting the bank and with the Oth and 1st bits as the bank, the bank of a random access memory (RAM) as the logical ring buffer memory is selected. The record pointer is masked by the MPU, defined as an offset value, multiplied by the 8-bit shift register just for the size of a record as many as the maximum number of bytes set to one record, and turned to the address of the RAM, the bank and the record are calculated, and the address of the memory is accessed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory access method.

[0002]

2. Description of the Related Art Conventionally, a programmable logic controller (hereinafter, referred to as PLC) for controlling factory facilities is a microprocessor unit (hereinafter, MPU).
Write. ) And random access memory (hereinafter RA)
Write as M. ) And so on. When the built-in MPU also accesses the RAM in the PLC, the built-in MPU performs the processing shown in the flowchart of FIG.

First, a record pointer A for storing data at a desired memory address and a bank record number B, which is the maximum record number per bank, are read from a register temporarily stored in the MPU (S20). ). This record pointer A is divided by the number of records in the bank B, the quotient obtained by this division is taken as the bank value C, and the remainder is taken as the offset value D (S21). The bank value C is added to the bank offset E to obtain the bank F (S22). Further, the offset value D is multiplied by the record size G which is the maximum number of bytes set for one record, and the record offset E is added to obtain the address J (S23).

From the bank F and the address J calculated in this way, an address of a desired memory is determined, and the memory is accessed according to the determined address.

[0005]

Generally, the MPU also has a division function among the arithmetic functions, but the division has more processing steps than the addition and multiplication, and therefore the processing speed becomes slow. This delay in processing speed becomes a delay time when the address of necessary data is calculated.

Therefore, when the target address is calculated by dividing the register, there is no problem when the MPU in the PLC is a MPU capable of high-speed processing, but there is a tradeoff with cost because many PLCs have been In the MPU generally used, as a result, the memory access time becomes long, and a problem occurs in a large amount of memory access or high-speed memory access.

Therefore, an object of the present invention is to reduce the load related to memory access of the MPU and to use a commonly used MP.
Another object of the present invention is to provide a memory access method that enables a large amount of memory access or high-speed memory access even for U.

[0008]

In order to achieve the above object, the present invention comprises a bank for dividing a storage area into a plurality and a record for dividing the storage area into a plurality of banks, and the records are input to and output from the bank. In a memory access method of sequentially storing data in the bank and accessing the logical ring buffer memory that is sequentially stored again from the beginning when the data is stored up to the end of the bank, a bank and a record which are addresses of the logical ring buffer memory. Is provided, and a desired address of the logical ring buffer memory is indexed and accessed from the record pointer.

[0009]

According to the memory access method of the present invention, the record pointer stores the address of the logical ring buffer memory, that is, the data of the bank and the record, and the address of the desired logical ring buffer memory is determined from this record pointer to perform the memory access.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A memory access method according to the present invention will be described below with reference to the accompanying drawings.

According to the memory access method of the present invention, a logical ring buffer memory consisting of a record obtained by dividing one of a plurality of banks into a plurality of records and a record pointer in which the data of the bank and the record are written are processed. The address is indexed by this.

For example, an MPU as shown in FIG.
The record pointer stored in 1 is composed of 8 bits, and the 0th to 5th bits are assigned offset parameters which are address data, and the 6th to 7th bits are assigned bank parameters which are bank data. There is. Next, the MPU 1 which performs data processing shifts this record pointer by 6 bits to form a bank value, writes this bank value to the 8-bit adder 5 and adds it to the bank offset, and the 0th and 1st bits of that are added to the bank value. Is written in the bank selector 6 for selecting the bank selector, and the bank selector selects the bank of the RAM 4 which is the logical ring buffer memory with the 0th and 1st bits as banks.

On the other hand, the above-mentioned record pointer is the MPU1.
Is masked by and set as an offset value. This offset value is multiplied by the record size, which is the maximum number of bytes set in one record, in the 8-bit shift register,
Further, it is added to the record offset by the 8-bit adder 3 and becomes the address of the RAM 4.

The record pointer is processed as described above,
It is possible to obtain a bank and a record and access an address of a desired logical buffer memory.

The logical ring buffer memory R
The concept of the storage area of AM4 is 0 to 3 as shown in FIG.
Up to four banks, and this one bank is further divided into records between addresses 00H and FFH. The RAM 4 divided by such a concept is shown in FIG.
As shown in (b), data is sequentially read or written from bank 0 to bank 3 in the rotation direction, and when data is written to bank 3, data is again written from bank 0.

The reading of the data is performed by the eight reading pointers R0 to R8, and the writing of the data is performed by the writing pointer W.

A flow chart of the control for obtaining the bank and address from the record pointer is as shown in FIG. That is, the record pointer A is read (S10), the record pointer A is shifted right by 6 bits, and the shifted value is set as the bank value C (S11). Further, the record pointer is masked with the offset mask M to obtain the offset value D (S12). Next, this bank value C
Adds bank offset E to obtain bank F (S1
3). Further, the offset value D is multiplied by the record size G which is the maximum number of bytes set in one record, and the record offset E is added to obtain the address J (S14).

By operating in this way, the memory access method of the present invention determines the address of the desired logical ring buffer memory from the data of the bank and record stored in the record pointer and performs the memory access. The access load can be reduced.

[0019]

As described above, according to the present invention, M
Since the load on the PU memory access can be reduced, a large amount of memory access or high-speed memory access can be performed.

[Brief description of drawings]

FIG. 1 is an embodiment of a circuit for operating a memory access method of the present invention.

FIG. 2 is a diagram illustrating a logical ring buffer memory.

FIG. 3 is a flowchart for explaining control of the memory access method of the present invention.

FIG. 4 is a flowchart for explaining control of a conventional memory access method.

[Explanation of symbols]

1 ... MPU, 2 ... 8-bit shift register, 3, 5 ... 8-bit adder,
4 ... RAM, 6 ... bank selector.

Claims (1)

[Claims] 1. A bank, which divides a storage area into a plurality of areas, and a record, which further divides the bank into a plurality of areas. Then, in the memory access method for accessing the logical ring buffer memory which is sequentially stored again from the beginning, a record pointer for storing data of a bank and a record, which is an address of the logical ring buffer memory, is provided, and a desired pointer is provided from the record pointer. A memory access method, characterized in that an address of the logical ring buffer memory is indexed and accessed.