JPH0746914B2 - Brushless DC motor drive - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a brushless DC motor that detects the position of a rotor by using a terminal voltage of a winding and switches the flow state of an inverter according to the detected position. The present invention relates to a drive device of.

[Conventional technology]

FIG. 11 is a circuit diagram of a conventional brushless DC motor drive device disclosed in, for example, JP-A-52-80415.
In the figure, 1a to 1c are counter electromotive voltage input terminals, and 2a to 2c are filters, which are composed of resistors and capacitors. The input terminals of the filters 2a to 2c are connected to the input terminals 1a to 1c, and the outputs 13a to 13c thereof are AC coupling capacitors 3a to 3c.
And is grounded through resistors Ra ~ Rc, and this capacitor
3a to 3c and resistors Ra to Rc are connected to resistors R1 to Rc.
It is connected to the inverting input terminals of the comparators 4a to 4c via R3. On the other hand, the non-inverting input terminals of the comparators 4a to 4c are
They are grounded via resistors R4 to R6, respectively, and further via a resistor R7. And the outputs 14a-14c of the comparators 4a-4c
Is input to the logic circuit 5 and output from the logic circuit 5 15a to 15c, 1
Outputs 6a to 16c.

Further, FIG. 12 shows a circuit configuration of an inverter circuit for directly driving a brushless DC motor, 6 is a power source, 7a
~ 7c is a positive electrode side arm of the inverter, 8a ~ 8c is a negative side arm, each arm 7a ~ 7c, 8a ~ 8c are respectively connected in parallel with the free wheeling diodes 11a ~ 11c, 12a ~ 12c, the inverter circuit 17 is. It is configured. The output of the inverter circuit 17 is connected to the drive windings 10a to 10c of the brushless DC motor 18. Reference numeral 9 is a field rotor of the brushless DC motor 18.

Next, the operation of the brushless DC motor driving device configured as described above will be described with reference to FIG.

FIG. 13a shows the waveform of one terminal voltage of the drive windings 10a-10c. The cut-off frequencies of the filters 2a to 2c are set sufficiently lower than the practical operating frequency range of the brushless DC motor 18, and the phase delay of the terminal voltage waveform a with respect to the fundamental frequency is set to 90 °. There is.

The waveform after passing through this filter is as shown in Fig. 13b,
This waveform b is input to one of the input ends of the comparators 4a-4c via the AC coupling capacitors 3a-3c. The other common input terminals of the comparators 4a to 4c are connected to the ground or a certain bias, and their outputs are shown in FIG.
Outputs 14a to 14c shown in e are obtained.

The outputs 14a to 14c become inputs to the logic circuit 5, and the outputs of the logic circuit 5 are outputs 15a to 15c, 1 as shown in FIGS.
6a to 16c, one of the outputs 15a to 15c is a signal for controlling conduction of the positive side arms 7a to 7c of the inverter circuit 17, and the other output 16a to 16c controls conduction of the negative side arms 8a to 8c. It is a signal. In this way, the inverter circuit 17 is controlled, and the field rotor 9 of the brushless DC motor 18 is rotationally driven by this output.

[Problems to be solved by the invention]

Since the conventional brushless DC motor drive device is configured as described above, the waveform b passing through the filters 2a to 2c can be converted into a drive waveform by simply processing the logic circuit 5 as it is, but on the other hand, the phase delay of the filter is delayed. Is fixed at 90 °, and there is a constraint that the cutoff frequency must be sufficiently low. For example, when the cutoff frequency is fc, the phase is stable for frequencies of about 10 fc or more. Normally, the lowest frequency that operates as a brushless DC motor is about several Hz, so the cutoff frequency must be set to about fc = 0.2. At this time, if the resistance value is 100 KΩ, the capacitor capacitance becomes 2 μF, and since these require a withstand voltage, they have a relatively large outer shape, and the cost increases. There is also a problem that the degree of freedom in design is reduced.

The present invention has been made in order to solve the above problems, and enables the filter to be freely designed including its outer shape and cost, and at the same time, obtains a rotation frequency to stabilize the brushless DC motor. An object of the present invention is to obtain a brushless DC motor drive device that can be rotated.

[Means for solving problems]

A brushless DC motor driving device according to the present invention is a rectangular wave output for obtaining a rectangular wave output by comparing a low-pass filter for removing harmonics from a terminal voltage with a terminal voltage passed through the filter and a neutral point potential. Means, a pulse generating means for logically operating and differentiating the rectangular wave output to obtain pulses at equal intervals in electrical angle, and the preset electrical angle in accordance with the phase delay due to the low-pass filter. Phase correction means for correcting the phase between the terminal voltage after passing through the filter and the field rotor position by performing a logical operation on the rectangular wave output with the phase and operation information to be delayed from the pulse for each minute. Rotation frequency calculating means for obtaining the rotation frequency from the equally divided pulses, output voltage increasing / decreasing means for increasing / decreasing the output voltage by comparing the obtained rotation frequency with the set frequency, and the phase correction And a corrected phase and increase or decrease output voltage from the output voltage adjusting unit from stage is provided with a control means for switching the inverter to a predetermined flowing state.

[Work]

The filter circuit according to the present invention performs a predetermined logical operation on a rectangular wave output obtained from the terminal voltage after passing through the filter, with a delay phase from a pulse at equal intervals of, for example, 60 °, which is in a predetermined phase relationship with the rectangular wave output. By applying the above, it is possible to design the constant of the filter regardless of the phase delay, it becomes possible to use a small-sized component, and the cost becomes low.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an overall configuration diagram, and FIG. 11 and FIG.
The same parts as those in FIG. 12 are designated by the same reference numerals. Reference numerals 1a to 1c are counter electromotive voltage input terminals, which are connected to input terminals of filters 20a to 20c. Outputs of this filter 20a-20c 46a-46c
Is connected to the non-inverting input terminals of the comparators 4a to 4c, and the inverting input terminals of the comparators 4a to 4c are grounded. The outputs 47a to 47c of the comparators 4a to 4c are input to the differentiation and logic circuit 21 and a microcomputer (hereinafter referred to as a microcomputer) 22, and the output 52 of the differentiation and logic circuit 21 is further sent to the microcomputer 22 and the microcomputer 22 The inverter circuit 17 is controlled by the output of the above to drive the brushless DC motor 18.

FIG. 2 is a circuit diagram showing a specific configuration of the filters 20a to 20c. The filters 20a to 20c are collectively designated by the reference numeral 20,
The input terminal is also 1 and the output is 46. 24 to 26 are resistors, and 27 and 28 are capacitors, which form a low-pass filter.

FIG. 3 is a circuit diagram showing a specific configuration of the differentiating and logic circuit 21. The outputs 47a to 47c of the comparators 4a to 4c are input to the first input terminals of the OR circuits 29 to 31, respectively, and the outputs are also output. 47a is an OR circuit 31, output 47b is an OR circuit 29, output 47c is O
It is also input to the second input terminal of the R circuit 30. The outputs of the OR circuits 29 to 31 are connected to the 3-input NAND circuit 32,
The output 48 is output to the NAND circuit 37 via the differentiating capacitor 34a.
It is connected to the first input 50 end of and is also input to the NOT circuit 33, and the output 49 of this NOT circuit 33 is the differentiation capacitor 3
It is connected to the second input 51 terminal of the NAND circuit 37 via 4b. The NAND circuit 37 has a pull-up resistor 35 at the first input end.
The voltage clamp diode 36a is connected to the power supply via a, and the voltage clamp diode 36b is also connected to the power supply via the second input end pull-up resistor 35b.
Are connected to the power supply respectively. The output 52 of the NAND circuit 37 is sent to the microcomputer 22 as the output of the differentiation and logic circuit 21.

FIG. 4 is an internal configuration diagram of the microcomputer 22, 38 is an interrupt terminal, to which the output 52 of the differentiating and logic circuit 21 is input.
Reference numerals 39a to 39c are input terminals for taking in the outputs 47a to 47c of the comparators 4a to 4c, and their inputs are inputted to a central processing unit (hereinafter referred to as CPU) 41 via an input circuit 40. This CPU41
Further, a first timer 42, a second timer 43, a memory 44, a counter 55, etc. are connected to the CPU, and the output of the CPU 41 is sent to the inverter circuit 17 via the output circuit 45.

In the above configuration, the comparators 4a to 4c are provided as the rectangular wave output means, the differentiation and logic circuit 21 is provided as the pulse generation means, the microcomputer 22 is provided as the phase correction means, the output voltage adjusting means and the control means, and the microcomputer 22 is built in. The first timer 42 and the counter 55 function as a rotation frequency calculating means.

Next, the operation will be described with reference to FIG.

5A to 5C are waveforms of the terminal voltage, which are the same as the waveforms shown in the conventional example.
When 0c is passed, substantially sinusoidal waveform outputs 46a to 46c delayed by the phase φ are obtained as shown in FIGS. This phase φ is determined by the phase characteristics of the filters 20a-20c with respect to frequency, but the phase delay is not constant. And
Comparing the output of the filter 20 and the neutral point potential with the comparators 4a to 4c, the rectangular wave outputs 47a to 4 shown in FIGS.
7c is obtained.

FIG. 6 shows a process in which the differential and logic circuit 21 obtains pulses at equal electrical angle intervals, for example, every 60 °. The rectangular wave outputs 47a to 47c of the comparators 4a to 4c shown in FIGS. From 47c, 3 OR circuits of differentiation and logic circuit 21
The waveform that has passed through 29 to 31 and the 3-input NAND circuit 32 becomes an output 48 as shown in FIG. 6d, which is inverted by the NOT circuit 33 and becomes an output 49 in FIG. 6e. These outputs 48 and 49 are connected to the capacitors 34a and 34b.
When differentiating with the differentiating circuit consisting of the pull-up resistors 35a and 35b and the diodes 36a and 36b, the rising differential is clamped and only the rising differential is obtained, and the first and second inputs 50 and 51 of the NAND circuit 37 are shown in FIG. 6f. , g. This input 5
From 0 and 51, the output 52 of the pulse waveform every 60 ° is obtained from the output of the NAND circuit 37 as shown in FIG. 6h, and this pulse interval is 1/6 of the cycle of the waveform of the output 46 of the filter 20. Since it is clear that there is an interval t ₁ shown in FIG.
The rotation frequency can be obtained by measuring with.

Further, as shown in FIG. 8, the rotation frequency can be obtained by counting the number of pulses within a fixed time t ₀ by the counter 55.

By the way, the correct drive waveform for the terminal voltage of the input terminals 1a to 1c of the filters 20a to 20c shown in FIGS.
It is as shown in waveforms 53a-53f of FIGS. On the other hand, the fifth
For the rectangular wave outputs 47a to 47c of the comparators 4a to 4c in the figure, 47a ・ ▲ ▼, 47b ・ ▲ ▼, 47c ・ ▲
▼, ▲ ▼ ・ 47b, ▲ ▼ ・ 47c, ▲ ▼ ・ 47
When the logical operation of a is performed, the waveforms 54a to 54f of FIGS. 5j to 5o are obtained, which are similar to the waveforms 53a to 53f of FIGS. 9d to i. That is, from FIG. 5 and FIG. 9, the phase φ is 0
Waveform 54a to 54f is delayed by 30 °.
It turns out that it becomes equivalent to a to 53f.

Therefore, when 0 ≦ φ ≦ 30 °, it is already delayed by the phase delay φ when the pulse of the output 52 of the differential and logic circuit 21 is generated every 60 °, and therefore (30 ° −φ) By delaying by just that, a waveform equivalent to the waveforms 53a to 53f can be obtained.

When φ = 90 °, waveform 54e → 54a, waveform 54f → 54b, waveform 54d → 54c, waveform 54b → 54d, waveform 54c → 54e, waveform 54a → 5
When replaced with 3f, again waveforms equivalent to waveforms 53a-53f are obtained. Therefore, when 30 ° <φ ≤ 90 °, 60 of output 52
When the above replacement is performed with a further delay of (90 ° -φ) from the point of time when the pulse of every ° is generated, waveforms equivalent to the waveforms 53a to 53f can be obtained.

Similarly, for any phase delay φ, waveform 53a
In order to obtain a waveform equivalent to .about.53f, it is possible to set the phase to be delayed from the pulse of the output 52 for every 60 DEG and the logical operation to be performed. Note that the phase to be delayed from the pulse of the output 52 for every 60 ° is set to 0 ° to 60 ° because the output is switched before the next pulse arrives.

Then, the phase delay φ with respect to the pulse interval t ₁ of 60 °, the time corresponding to the phase to be delayed from the pulse of 60 ° of the output 52, the rectangular wave outputs 47a to 47c of the comparators 4a to 4c.
All the logical operations and the information on the rotation frequency to be performed on the memory are stored in the memory 44 in the microcomputer 22.

Next, the operation from the arrival of evenly divided pulses every 60 ° to the output of the drive waveform will be described with reference to the flowchart of FIG. When pulses of 60 ° arrive at step S11 and the CPU 41 is interrupted, the pulse interval t ₁ is stored in the memory 44 at step S12. Then, CPU reads the square wave output 47a~47c comparator 4a~4c from the input terminal 39a~39c in step S13, reads the phase delay φ from the memory 44 for said pulse interval t ₁ at step S14, further in the step S15 The time corresponding to the phase to be delayed from the pulse is calculated in step S1.
At 6, the logical operation information to be applied to the rectangular wave outputs 47a to 47c of the comparators 4a to 4c is read. Next, in step S17, the time corresponding to the phase to be delayed is set in the second timer 43, and counting is started. Then, at the time of step S18 when the second timer 43 has timed up, the logical operations are performed on the outputs 47a-47c of the comparators 4a-4c previously read at step S19 by the previously obtained logical operation information. Further, the rotation frequency is read from the memory 44 in step S20, and the rotation frequency is compared with the set frequency in step S21.
As a result, when the rotation frequency is lower than the set frequency, the voltage is increased in step S22, and when it is higher than step S23.
To lower it. If it is equal to the setting, no change is made and the drive waveform is output via the output circuit 45 in step S24 to switch the inverter circuit 17 to a predetermined flow state.
By repeating the above operation and changing the flow state of the inverter circuit 17, the brushless DC motor 18 is stably driven according to the set frequency.

〔The invention's effect〕

As described above, according to the present invention, a rectangular wave output means for obtaining a rectangular wave output by comparing the low-pass filter for removing harmonics from the terminal voltage with the terminal voltage passed through the filter and the neutral point potential And pulse generation means for logically operating and differentiating the rectangular wave output to obtain pulses at equal electrical angle intervals, and equal division at the electrical angle preset according to the phase delay due to the low-pass filter. Phase correction means for correcting the phase between the terminal voltage after passing through the filter and the field rotor position by performing a logical operation on the rectangular wave output with the phase and operation information to be delayed from each pulse. Rotation frequency calculating means for obtaining the rotation frequency from the equally divided pulses, output voltage increasing / decreasing means for increasing / decreasing the output voltage by comparing the obtained rotation frequency with the set frequency, and correction by the phase correcting means. The control means for switching the inverter circuit to a predetermined flow state from the phase and the output voltage increased / decreased by the output voltage increasing / decreasing means is provided, so that the degree of freedom in the filter design is increased and the external shape (miniaturization is reduced). ) And cost can be optimized, and stable rotation of the brushless DC motor can be obtained at the set frequency.

[Brief description of drawings]

1 to 10 show an embodiment of the present invention. FIG. 1 is an overall configuration diagram, FIG. 2 is a circuit diagram showing the configuration of a filter circuit, and FIG. 3 is a differential and logic circuit. 4 is an internal configuration diagram of the microcomputer, FIG. 5 is a waveform diagram for explaining the operation, FIG. 6 is an operation waveform diagram of the differential and logic circuits, and FIGS. 7 and 8 are An output waveform diagram of the differentiation and logic circuit, FIG. 9 is a necessary drive signal wave system diagram for the terminal voltage waveform of the filter, and FIG. 10 is a flowchart showing an operation of the microcomputer for outputting the drive waveform to the inverter circuit. Also, FIGS. 11 to 13 show a conventional example, FIG. 11 is a circuit diagram showing a conventional brushless DC motor drive device, FIG. 12 is a circuit configuration diagram showing a conventional inverter, and FIG. [Fig. 4] is a waveform diagram illustrating a conventional operation. In the figure, 1a to 1c are counter electromotive voltage input terminals, 20a to 20c are filters, 4a to 4c are comparators, 21 is a differentiation and logic circuit, 22 is a microcomputer, 24-26, 35a, 35b are resistors, 27, 28. , 34a, 34b are capacitors, 36a, 36b are diodes, 29-31 are OR circuits, 32, 37 are NAND circuits, 41 is CPU, 42, 4
3 is a timer, 45 is an output circuit, and 55 is a counter. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A drive circuit for driving a brushless DC motor by detecting the position of a field rotor from the terminal voltage of a drive winding and switching the flow state of an inverter circuit according to the position to drive harmonics from the terminal voltage. Except for the low-pass filter, a rectangular wave output means for obtaining a rectangular wave output by comparing the terminal voltage that has passed through this filter with the neutral point potential, and the rectangular wave output is logically operated and differentiated to obtain an electrical angle, etc. The rectangular wave output is based on pulse generation means for obtaining a pulse for each minute, and a phase and operation information which is preset according to the phase delay due to the low-pass filter and should be delayed from the pulse for every minute at the electrical angle. Phase correction means for correcting the phase between the terminal voltage after passing through the filter and the field rotor position by applying a logical operation to the rotation frequency, and a rotation frequency for obtaining a rotation frequency from the equally divided pulses. Calculating means, output voltage increasing / decreasing means for increasing / decreasing the output voltage by comparing the obtained rotation frequency with the set frequency, corrected phase from the phase correcting means, and increased / decreased output voltage from the output voltage increasing / decreasing means And a control means for switching the inverter circuit to a predetermined flow state, and a drive device for a brushless DC motor.