JPH0745765A - Resin sealing method for semiconductor device - Google Patents

Resin sealing method for semiconductor device

Info

Publication number
JPH0745765A
JPH0745765A JP18427093A JP18427093A JPH0745765A JP H0745765 A JPH0745765 A JP H0745765A JP 18427093 A JP18427093 A JP 18427093A JP 18427093 A JP18427093 A JP 18427093A JP H0745765 A JPH0745765 A JP H0745765A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
metal insulating
insulating substrate
mold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18427093A
Other languages
Japanese (ja)
Inventor
Atsushi Maruyama
篤 丸山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP18427093A priority Critical patent/JPH0745765A/en
Publication of JPH0745765A publication Critical patent/JPH0745765A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Abstract

PURPOSE:To provide a method of sealing a semiconductor device with resin high in productivity at a low molding temperature at which eutectic solder used for the inner connection of a circuit assembly is not melted again. CONSTITUTION:A semiconductor device is sealed with resin through such a method that a circuit assembly which includes a semiconductor chip 3 formed on a lead frame 2 is mounted on a heat dissipating metal insulating board 1 and jointed together with eutectic solder 7, and the periphery of the circuit assembly is sealed with resin making the underside of the metal insulating board 1 exposed for the formation of a resin-sealed semiconductor device, wherein mold releasing agent is previously applied onto the underside of the metal insulating board 1. The circuit assembly mounted on the metal insulating board is inserted into an injection molding die 8, and liquid epoxy resin is filled into the cavity of the die 8 at molding temperatures of 140 deg.C to 180 deg.C to form a sealing resin layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電力用半導体デバイス
などを対象とした樹脂封止型半導体装置の樹脂封止法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin encapsulation method for a resin encapsulation type semiconductor device intended for power semiconductor devices and the like.

【0002】[0002]

【従来の技術】昨今では、半導体デバイスのダウンサイ
ジング化が進み、量産性,製造コスト面からパッケージ
を樹脂封止型とした電力用半導体デバイスが多く採用さ
れるようになっている。また、電力用半導体装置として
必要な放熱性と電気絶縁性を確保するために、リードフ
レームを用いて構成した回路組立体を金属絶縁基板(ヒ
ートシンクとなる金属板と接合した絶縁層の上に導体パ
ターンを形成した基板)上に搭載してリードフレームと
金属絶縁基板との間を低融点の共晶ソルダ(融点183
℃)を用いて接合するとともに、金属絶縁基板の金属板
底面を放熱面として露呈させたまま、回路組立体の周域
を樹脂封止してパッケージングした構造のものが知られ
ている。
2. Description of the Related Art In recent years, downsizing of semiconductor devices has progressed, and from the viewpoint of mass productivity and manufacturing cost, power semiconductor devices having a resin-encapsulated package have been widely used. In addition, in order to secure the heat dissipation and electrical insulation properties required for a power semiconductor device, a circuit assembly composed of a lead frame is provided on a metal insulating substrate (a conductor on an insulating layer bonded to a metal plate to be a heat sink). A eutectic solder having a low melting point (melting point 183) is mounted between the lead frame and the metal insulating substrate by being mounted on a patterned substrate.
There is known a structure in which the circuit assembly is packaged by being sealed with a resin while sealing the periphery of the metal insulating substrate while exposing the bottom surface of the metal plate as a heat dissipation surface.

【0003】次に、前記した樹脂封止型半導体装置の従
来における代表的な組立構造を図7に示す。図におい
て、1は金属板1a,絶縁層1b,導体パターン1cよ
りなる金属絶縁基板、2はリードフレーム、3はリード
フレーム2のダイパッド2aにマウントされた半導体チ
ップ、4はリードフレーム2の外部リード2bと半導体
チップ3との間を接続したボンディングワイヤ、5は金
属絶縁基板1の上に接着した樹脂ケース、6は樹脂ケー
ス5の内部に充填した封止樹脂である。なお、金属絶縁
基板1における絶縁層1bの厚さは、伝熱抵抗と電気的
な絶縁耐力とのトレードオフ特性に適合させて選定され
ている。
FIG. 7 shows a typical conventional assembly structure of the resin-sealed semiconductor device described above. In the figure, 1 is a metal insulating substrate including a metal plate 1a, an insulating layer 1b, and a conductor pattern 1c, 2 is a lead frame, 3 is a semiconductor chip mounted on the die pad 2a of the lead frame 2, and 4 is an external lead of the lead frame 2. Bonding wires connecting between 2b and the semiconductor chip 3 are a resin case bonded to the metal insulating substrate 1, and a sealing resin 6 is filled inside the resin case 5. The thickness of the insulating layer 1b in the metal insulating substrate 1 is selected in accordance with the trade-off characteristic between heat transfer resistance and electrical insulation strength.

【0004】ここで、リードフレーム2は金属絶縁基板
1の導体パターン1c上に共晶ソルダ7を用いて半田接
合される。また、封止樹脂6はポッティング法により樹
脂ケース5の内部に充填される。この、ポッティング法
による成形温度条件は樹脂温度が130℃程度であり、
前記した共晶ソルダ7が再溶融するおそれはなく安全で
ある。
Here, the lead frame 2 is soldered onto the conductor pattern 1c of the metal insulating substrate 1 by using the eutectic solder 7. The sealing resin 6 is filled in the resin case 5 by the potting method. The molding temperature condition by this potting method is that the resin temperature is about 130 ° C.,
The eutectic solder 7 described above is safe because there is no risk of remelting.

【0005】[0005]

【発明が解決しようとする課題】ところで、前記のよう
にポッティング法を採用して封止樹脂層6を成形した図
6の構造では、流動性のある樹脂の流出を防ぐために樹
脂ケース5が必要であるが、この樹脂ケース5は封止樹
脂層6が硬化した後は機能的に不要となるばかりか、樹
脂ケース5の存在により半導体装置の外形サイズが大形
化する。したがって、樹脂ケース5を用いずに樹脂封止
して半導体装置の外形寸法の小形化促進を図ることが望
まれている。
By the way, in the structure shown in FIG. 6 in which the potting method is used to mold the sealing resin layer 6 as described above, the resin case 5 is required to prevent the flow of the fluid resin. However, the resin case 5 becomes functionally unnecessary after the encapsulating resin layer 6 is cured, and the presence of the resin case 5 increases the outer size of the semiconductor device. Therefore, it is desired to promote the miniaturization of the external dimensions of the semiconductor device by resin-sealing without using the resin case 5.

【0006】一方、樹脂ケースを使わない半導体装置の
樹脂封止法として、前記のポッティング法以外にトラン
スファ成形方法が知られているが、この成形方法ではタ
ブレット化した固形のエポキシ樹脂などを成形材料と
し、これを加熱により可塑化して金型のキャビティに充
填することから成形温度条件が180℃以上となる。こ
のために、前述のようにリードフレーム2と金属絶縁基
板1との間を共晶ソルダ(融点183℃)で半田接合し
たものでは、モールド成形時の加熱により半田が再溶融
するおそれがあり、このままでは実用に供し得ない。
On the other hand, as a resin encapsulation method for a semiconductor device that does not use a resin case, a transfer molding method is known in addition to the potting method described above. In this molding method, a solid epoxy resin tabletized is used as a molding material. Since this is plasticized by heating and filled in the cavity of the mold, the molding temperature condition is 180 ° C. or higher. For this reason, as described above, in the case where the lead frame 2 and the metal insulating substrate 1 are solder-joined with the eutectic solder (melting point 183 ° C.), the solder may be remelted by heating during molding, It cannot be put to practical use as it is.

【0007】本発明は上記の点にかんがみなされたもの
であり、頭記した樹脂封止型半導体装置を対象に前記課
題を解決し、リードフレームと金属絶縁基板との間の半
田接合部が再溶融するおそれのない低成形温度条件で樹
脂封止が行えるようにした生産性の高い樹脂封止型半導
体装置の樹脂封止法を提供することにある。
The present invention has been made in view of the above points, and it is intended to solve the above-mentioned problems in the resin-encapsulated semiconductor device described above and to re-solder the solder joint between the lead frame and the metal insulating substrate. It is an object of the present invention to provide a resin-encapsulating method for a resin-encapsulated semiconductor device with high productivity, which enables resin encapsulation under a low molding temperature condition without the risk of melting.

【0008】[0008]

【課題を解決するための手段】上記目的は、本発明によ
り、金属絶縁基板に搭載した回路組立体を射出成形用金
型にインサートし、140℃〜180℃の成形温度条件
でキャビティ内に液状の熱硬化性樹脂を注入して封止樹
脂層を成形することにより達成される。また、前記方法
の実施に際して、金属絶縁基板の底面が樹脂で覆われる
のを防ぐための具体的な手段として次記の方法がある。
According to the present invention, the above-mentioned object is to insert a circuit assembly mounted on a metal insulating substrate into an injection molding die, and to form a liquid in the cavity under a molding temperature condition of 140 ° C to 180 ° C. It is achieved by injecting the thermosetting resin of to mold the sealing resin layer. Further, there is the following method as a specific means for preventing the bottom surface of the metal insulating substrate from being covered with the resin when the above method is carried out.

【0009】(1)金属絶縁基板の底面にあらかじめ離
型剤を塗布して封止樹脂層の成形を行う。 (2)金型のキャビティ底部に金属絶縁基板の底面周域
と当接し合うパッキンを配置して封止樹脂層の成形を行
う。 (3)金属絶縁基板の金属板の底面側にあらかじめ段付
き部を形成しておき、金型のキャビティには前記段付き
部と密接して嵌合し合う段付き凹所を形成して封止樹脂
層の成形を行う。
(1) A mold release agent is applied to the bottom surface of the metal insulating substrate in advance to mold the sealing resin layer. (2) A sealing resin layer is formed by arranging a packing that abuts the peripheral area of the bottom surface of the metal insulating substrate at the bottom of the cavity of the mold. (3) A stepped portion is formed in advance on the bottom surface side of the metal plate of the metal insulating substrate, and a stepped recess is formed in the cavity of the mold so as to be closely fitted to the stepped portion and sealed. The resin layer is molded.

【0010】さらに、モールド形成に伴って封止樹脂層
の周域にバリが生じるのを防ぐ手段として、リードフレ
ームに対し、あらかじめ封止樹脂層成形領域の外周を包
囲するダムバーを形成して封止樹脂層の成形を行う方法
がある。
Further, as a means for preventing burrs from being generated in the peripheral region of the sealing resin layer due to mold formation, a dam bar surrounding the outer periphery of the sealing resin layer molding region is previously formed on the lead frame to seal it. There is a method of molding the stop resin layer.

【0011】[0011]

【作用】上記の樹脂封止法によれば、成形温度条件を1
40〜180℃の範囲として液状の樹脂を用いて封止樹
脂層を射出成形するようにしたので、リードフレームと
金属絶縁基板との間を接合した低融点の共晶ソルダ(融
点183℃)を射出成形時に再溶融させたり、成形後の
冷却過程で封止樹脂層に内部応力,クラックが発生する
のを抑え、かつ金属絶縁基板の底面が樹脂で覆われるの
を防止しつつ、しかも一連の成形操作を通じて行う成形
プロセスで射出開始時点から短時間のうちに液状樹脂を
ゲル化することができる。これにより、製品の品質向上
と併せて成形サイクルタイムを短縮して生産性の向上化
が図れる。
According to the above resin sealing method, the molding temperature condition is set to 1
Since the encapsulating resin layer is injection-molded using a liquid resin in the range of 40 to 180 ° C., a low melting point eutectic solder (melting point 183 ° C.) that joins the lead frame and the metal insulating substrate is used. While preventing re-melting during injection molding, internal stress and cracks in the encapsulating resin layer during the cooling process after molding, and preventing the bottom surface of the metal insulating substrate from being covered with resin, In the molding process performed through the molding operation, the liquid resin can be gelled within a short time from the start of injection. As a result, it is possible to improve the product quality and shorten the molding cycle time to improve the productivity.

【0012】[0012]

【実施例】以下、本発明の実施例を図面に基づいて説明
する。なお、実施例の図中で図7に対応する同一部材に
は同じ符号が付してある。 実施例1:図1は半導体装置の組立体(半導体装置の各
部については図7を参照)を射出成形用金型8にインサ
ートして封止樹脂層を射出成形する際の工程図である。
ここで、金型8は上型8aと下型8bからなり、上型8
aにはキャビティ内にインサートされた金属絶縁基板1
を金型8の型締め状態で定位置に保持する押え片8cを
備え、下型8bには液状樹脂の形成材料をキャビティに
注入するゲート8dが開口している。
Embodiments of the present invention will be described below with reference to the drawings. In the drawings of the embodiments, the same members corresponding to FIG. 7 are denoted by the same reference numerals. Example 1 FIG. 1 is a process diagram for inserting a semiconductor device assembly (see FIG. 7 for each part of the semiconductor device) into an injection molding die 8 to injection-mold a sealing resin layer.
Here, the mold 8 comprises an upper mold 8a and a lower mold 8b.
Metal insulating substrate 1 inserted in the cavity in a
Is provided with a pressing piece 8c for holding the mold 8 in a fixed position in a clamped state, and a gate 8d for injecting a liquid resin forming material into the cavity is opened in the lower mold 8b.

【0013】また、半導体装置の組立体は金型8にイン
サートする前に、あらかじめ金属絶縁基板1の放熱面と
して機能する底面全域に離型剤9(例えば、信越シリコ
ーン(株)の製品:スプレー型離型剤SEPA−COA
TII)を塗布しておく。この離型剤9は成形時に金属絶
縁基板1の放熱面に封止樹脂が付着するのを防ぐ役目を
果たす。
Before the semiconductor device assembly is inserted into the mold 8, a mold release agent 9 (for example, a product of Shin-Etsu Silicone Co., Ltd .: spray) is preliminarily formed on the entire bottom surface of the metal insulating substrate 1 which functions as a heat dissipation surface. Mold release agent SEPA-COA
TII) is applied. The release agent 9 serves to prevent the sealing resin from adhering to the heat dissipation surface of the metal insulating substrate 1 during molding.

【0014】そして、図示状態で射出ノズルより金型8
のゲート8dを通じてキャビティ内に次記の成形材料を
所定の射出圧力で注入してモールド成形を行う。この場
合に、成形材料はあらかじめ主剤と硬化剤を適正比率で
混合した二液性の液状エポキシ樹脂(例えば、長瀬チバ
(株)の製品:XNR8205(主剤),XNH820
5(硬化剤))を用い、かつ成形温度条件を140〜1
80℃の範囲に設定した上で一連の成形操作を行って回
路組立体の周域を樹脂封止する。
Then, in the state shown in the drawing, the mold 8 is inserted from the injection nozzle.
Molding is performed by injecting the following molding material into the cavity at a predetermined injection pressure through the gate 8d. In this case, the molding material is a two-part liquid epoxy resin in which a main agent and a curing agent are mixed in advance in an appropriate ratio (for example, products of Nagase Ciba Co., Ltd .: XNR8205 (main agent), XNH820).
5 (curing agent)) and the molding temperature condition is 140 to 1
After setting the temperature in the range of 80 ° C., a series of molding operations are performed to seal the periphery of the circuit assembly with resin.

【0015】ここで、成形温度条件の上限を180℃に
設定したのは、半導体装置の組立体で金属絶縁基板1と
リードフレーム2との間を接合した共晶ソルダ(融点1
83℃)がモールド成形時に再溶融したり、成形後に室
温まで冷却する過程で樹脂層に内部応力や、それに基づ
くクラックが発生するのを抑えるためである。また、成
形温度条件の下限を140℃に設定したのは、一連の成
形プロセスの中で金型に注入した液状エポキシ樹脂のゲ
ル化時間を速めるためであり、これにより液状樹脂の射
出開始から型開きまでの所要時間が短くて済むので、成
形サイクルタイムを短縮できる。なお、前記した液状エ
ポキシ樹脂は130℃の低温でも成形可能であるが、成
形温度を140℃以下に低めると液状エポキシ樹脂のゲ
ル化時間が大幅に増加するため、これに伴って成形サイ
クルの所要時間が長く掛かる。
Here, the upper limit of the molding temperature condition is set to 180 ° C. because the eutectic solder (melting point 1 which joins the metal insulating substrate 1 and the lead frame 2 in the assembly of the semiconductor device is joined.
This is to suppress the occurrence of internal stress in the resin layer and cracks caused by internal stress in the process of remelting (83 ° C.) during molding or cooling to room temperature after molding. Further, the lower limit of the molding temperature condition was set to 140 ° C. in order to accelerate the gelation time of the liquid epoxy resin injected into the mold during the series of molding processes, and thereby the mold was injected from the start of injection of the liquid resin. The molding cycle time can be shortened because the time required for opening can be shortened. The liquid epoxy resin described above can be molded even at a low temperature of 130 ° C. However, when the molding temperature is lowered to 140 ° C. or lower, the gelling time of the liquid epoxy resin is significantly increased. It takes a long time.

【0016】次に、前記の射出成形工程を経て製作され
た樹脂封止型半導体装置を図4,図5に示す。図示構成
では、金属絶縁基板1の金属板1aの底面域(ヒートシ
ンクの放熱面)を除いてリードフレーム2の上に組立ら
れた半導体チップ4を含む回路組立体の周域が封止樹脂
層6により封止されている。なお、金属絶縁基板1の底
面は、モールド形成の際にあらかじめ図1で述べたよう
に離型剤9を塗布しておくことで樹脂が付着するのを防
ぐことができる。
Next, FIGS. 4 and 5 show a resin-sealed semiconductor device manufactured through the above-mentioned injection molding process. In the illustrated configuration, the peripheral area of the circuit assembly including the semiconductor chip 4 assembled on the lead frame 2 except for the bottom area (the heat radiation surface of the heat sink) of the metal plate 1a of the metal insulating substrate 1 is the sealing resin layer 6. It is sealed by. It should be noted that the resin can be prevented from adhering to the bottom surface of the metal insulating substrate 1 by applying the release agent 9 as described in FIG.

【0017】実施例2:前記した実施例1では、金属絶
縁基板1の裏面に封止樹脂が付着するのを防ぐために離
型剤9を塗布したが、この実施例では離型剤を使用せず
に金属絶縁基板の底面に樹脂が付着するのを防ぐような
手段を講じている。すなわち、この実施例においては、
金型8の下型8aに対してそのキャビティの底部側に
は、金属絶縁基板1を載せる中央の台部8eを残してそ
の外側の凹所内周域にリング状のパッキン10を備えて
いる。このパッキン10は金型内にインサートされた金
属絶縁基板1の底面周縁部に密接して、金型8に注入し
た成形樹脂が金属絶縁基板1の底面側に回り込むのを阻
止する役目を果たすものであり、成形温度に十分耐える
耐熱性の高い材料(例えばシリコーン樹脂)で作られた
パッキンが使用される。これにより、金属絶縁基板1の
底面側には樹脂の回り込みがなくなるので、実施例1で
述べたような離型剤を塗布する必要がない。
Example 2 In the above-described Example 1, the release agent 9 was applied to prevent the sealing resin from adhering to the back surface of the metal insulating substrate 1. However, in this example, the release agent is not used. Instead, measures are taken to prevent the resin from adhering to the bottom surface of the metal insulating substrate. That is, in this embodiment,
On the bottom side of the cavity of the lower die 8a of the die 8, a ring-shaped packing 10 is provided in the inner peripheral region of the recess outside the central pedestal portion 8e on which the metal insulating substrate 1 is placed. This packing 10 is in close contact with the peripheral portion of the bottom surface of the metal insulating substrate 1 inserted in the mold, and serves to prevent the molding resin injected into the mold 8 from wrapping around to the bottom surface side of the metal insulating substrate 1. Therefore, a packing made of a material having high heat resistance (for example, silicone resin) that sufficiently withstands the molding temperature is used. As a result, the resin does not wrap around on the bottom surface side of the metal insulating substrate 1, and it is not necessary to apply the release agent as described in the first embodiment.

【0018】実施例3:図3は金属絶縁基板の底面に樹
脂が付着するのを防ぐための応用実施例を示すものであ
る。この実施例においては、金属絶縁基板1の底面側に
あらかじめ段付き部1dを形成しておくとともに、一方
では金型8の下型8bの底部側に前記の段付き部1dが
止まり嵌めで嵌合し合う段付き凹所8fが形成されてい
る。
Embodiment 3: FIG. 3 shows an application embodiment for preventing resin from adhering to the bottom surface of a metal insulating substrate. In this embodiment, the stepped portion 1d is formed on the bottom surface side of the metal insulating substrate 1 in advance, and on the other hand, the stepped portion 1d is fitted on the bottom side of the lower die 8b of the die 8 by a stop fit. A stepped recess 8f is formed so as to fit together.

【0019】これにより、金型8にインサートされた金
属絶縁基板1は、その段付き部1dの周縁が下型8bの
凹所周縁に突き合わされるので、金型8に注入した樹脂
が金属絶縁基板1の底面側に回り込むことがない。つま
り、金型に形成した段付き凹所8fが実施例2で述べた
パッキン10と同じ役目を果たす。 実施例4:次に、樹脂封止成形の際に樹脂封止層の周域
にバリが生じるのを防ぐ手段を講じた実施例を図6で説
明する。
As a result, in the metal insulating substrate 1 inserted in the mold 8, the peripheral edge of the stepped portion 1d is abutted against the peripheral edge of the recessed portion of the lower mold 8b, so that the resin injected into the mold 8 is metal-insulated. It does not go around to the bottom side of the substrate 1. That is, the stepped recess 8f formed in the mold plays the same role as the packing 10 described in the second embodiment. Example 4: Next, an example will be described with reference to FIG. 6 in which measures are taken to prevent burrs from being produced in the peripheral region of the resin encapsulation layer during resin encapsulation molding.

【0020】封止樹脂層6の成形材料である液状エポキ
シ樹脂は粘度が小さく、先記の各実施例で述べた金型8
に所定の射出圧力を加えて液状エポキシ樹脂を注入する
と、樹脂の一部が上型8aと下型8bとの合わせ面(パ
ーティング面)の隙間に押し出され、これが固化してバ
リを生成する。そこで、バリの生成を防ぐための手段と
して、図6ではリードフレーム2に対し、あらかじめ封
止樹脂層6の外形に合わせてその成形領域の外周を取り
囲むようにダムバー2cを形成しておき、このダムバー
を金型の合わせ面に挟み込んだ状態で成形を行う。これ
により、金型の合わせ面周域がダムバーにより閉塞され
るのでバリの生成を防ぐことができる。
The liquid epoxy resin, which is a molding material for the sealing resin layer 6, has a low viscosity, and the mold 8 described in each of the above-mentioned embodiments is used.
When a liquid epoxy resin is injected by applying a predetermined injection pressure to, a part of the resin is extruded into the gap between the mating surfaces (parting surfaces) between the upper mold 8a and the lower mold 8b, which solidifies to form burrs. . Therefore, as a means for preventing the formation of burrs, in FIG. 6, a dam bar 2c is formed in advance on the lead frame 2 so as to surround the outer periphery of the molding region in accordance with the outer shape of the sealing resin layer 6. Molding is performed with the dam bar sandwiched between the mating surfaces of the mold. As a result, the peripheral area of the mating surface of the mold is closed by the dam bar, so that burr formation can be prevented.

【0021】このダムバー2cは、その内周縁が樹脂封
止層6の外形輪郭と合致するように形成するのが理想的
であるが、金型構造など制約から図示のようにダムバー
2cを樹脂封止層6の外周から離す必要のある場合に
は、ダムバー2cと封止樹脂層6との間の空所を埋める
ように、この部分に離型性のある材料で作られたシート
状のスペーサ(リードフレーム2と同じ厚さ)を当てが
い、これを金型の合わせ面に挟んで成形することでバリ
の発生が防げる。
The dam bar 2c is ideally formed so that its inner peripheral edge matches the outer contour of the resin sealing layer 6, but the dam bar 2c is resin-sealed as shown in the figure due to restrictions such as mold structure. When it is necessary to separate from the outer periphery of the stopper layer 6, a sheet-like spacer made of a material having releasability is formed in this portion so as to fill the space between the dam bar 2c and the sealing resin layer 6. By applying (the same thickness as the lead frame 2) and sandwiching it between the mating surfaces of the molds, it is possible to prevent the occurrence of burrs.

【0022】[0022]

【発明の効果】以上述べたように、本発明の樹脂封止法
によれば、トランスファ成形による樹脂封止法と同様に
射出成形用金型に回路組立体をインサートし、この金型
に液状の熱硬化性樹脂を注入して回路組立体の周域に封
止樹脂層を射出成形するようにしたので、ポッティング
法のような樹脂ケースが不要であり、これにより樹脂封
止型半導体装置のダウンサイジング化が促進できる。
As described above, according to the resin encapsulation method of the present invention, the circuit assembly is inserted into the injection molding die as in the resin encapsulation method by the transfer molding, and the liquid is injected into the die. Since the thermosetting resin is injected and the encapsulating resin layer is injection-molded in the peripheral area of the circuit assembly, a resin case such as the potting method is not required. Downsizing can be promoted.

【0023】また、この場合に射出成形の温度条件を1
40〜180℃の範囲に定めたことにより、回路組立体
の接合に用いた低融点の共晶ソルダが封止樹脂層の成形
の際に再溶融するおそれがなく、かつ成形後の冷却過程
でも封止樹脂層の内部応力,クラック発生を抑制できる
ほか、金型に注入した液状樹脂のゲル化時間を速めて成
形サイクルの所要時間の短縮化が図れるなど、品質の安
定した樹脂封止型半導体装置を生産性よく製造すること
ができる。
In this case, the injection molding temperature condition is set to 1
By setting the temperature in the range of 40 to 180 ° C., there is no fear that the low melting point eutectic solder used for joining the circuit assembly will be remelted during the molding of the sealing resin layer, and even during the cooling process after molding. A resin-encapsulated semiconductor with stable quality, such as suppressing internal stress and cracks in the encapsulating resin layer and shortening the time required for the molding cycle by speeding the gelation time of the liquid resin injected into the mold. The device can be manufactured with high productivity.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1に対応する半導体装置の封止
樹脂層の成形工程図。
FIG. 1 is a molding process diagram of a sealing resin layer of a semiconductor device corresponding to a first embodiment of the present invention.

【図2】本発明の実施例2に対応する半導体装置の封止
樹脂層の成形工程図。
FIG. 2 is a molding process diagram of a sealing resin layer of a semiconductor device corresponding to Example 2 of the invention.

【図3】本発明の実施例3に対応する半導体装置の封止
樹脂層の成形工程図。
FIG. 3 is a molding process diagram of a sealing resin layer of a semiconductor device corresponding to Example 3 of the invention.

【図4】封止樹脂層の成形工程を経て製作された樹脂封
止型半導体装置の構成断面図
FIG. 4 is a structural cross-sectional view of a resin-sealed semiconductor device manufactured through a molding process of a sealing resin layer.

【図5】図4の平面図5 is a plan view of FIG.

【図6】本発明の実施例4に採用するダムバー付きリー
ドフレームの平面図
FIG. 6 is a plan view of a lead frame with a dam bar used in Embodiment 4 of the present invention.

【図7】ポッティング法により製作された従来における
樹脂封止型半導体装置の組立構成図
FIG. 7 is an assembly configuration diagram of a conventional resin-encapsulated semiconductor device manufactured by a potting method.

【符号の説明】[Explanation of symbols]

1 金属絶縁基板 1a 金属板 1d 段付き部 2 リードフレーム 3 半導体チップ 6 封止樹脂層 7 共晶ソルダ 8 射出成形用金型 8a 上型 8b 下型 8f 段付き凹所 9 離型剤 10 パッキン 1 Metal Insulation Substrate 1a Metal Plate 1d Stepped Part 2 Lead Frame 3 Semiconductor Chip 6 Encapsulation Resin Layer 7 Eutectic Solder 8 Injection Mold 8a Upper Mold 8b Lower Mold 8f Stepped Recess 9 Release Agent 10 Packing

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 // B29L 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display area // B29L 31:34

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】リードフレームを用いて構成した回路組立
体を金属絶縁基板に搭載してリードフレームと金属絶縁
基板との間を低融点の共晶ソルダで半田接合し、かつ金
属絶縁基板の放熱面となる底面を露呈させたまま回路組
立体の周域を樹脂封止してなる樹脂封止型半導体装置の
樹脂封止法であって、金属絶縁基板に搭載した回路組立
体を射出成形用金型にインサートし、140℃〜180
℃の成形温度条件でキャビティに液状の熱硬化性樹脂を
充填して封止樹脂層を成形することを特徴とする樹脂封
止型半導体装置の樹脂封止法。
1. A circuit assembly formed by using a lead frame is mounted on a metal insulating substrate, the lead frame and the metal insulating substrate are solder-joined with a low melting point eutectic solder, and heat dissipation of the metal insulating substrate is performed. A resin encapsulation method for a resin-encapsulated semiconductor device in which the peripheral area of the circuit assembly is resin-encapsulated while exposing the bottom surface, which is a surface, for injection molding of the circuit assembly mounted on a metal insulating substrate. Insert into the mold, 140 ℃ ~ 180
A resin encapsulation method for a resin-encapsulated semiconductor device, which comprises filling a cavity with a liquid thermosetting resin under a molding temperature condition of ° C to form an encapsulation resin layer.
【請求項2】請求項1記載の樹脂封止法において、金属
絶縁基板の底面にあらかじめ離型剤を塗布して封止樹脂
層の成形を行うことを特徴とする樹脂封止型半導体装置
の樹脂封止法。
2. The resin encapsulation type semiconductor device according to claim 1, wherein a mold release agent is applied to the bottom surface of the metal insulating substrate in advance to form the encapsulation resin layer. Resin encapsulation method.
【請求項3】請求項1記載の樹脂封止法において、金型
のキャビティ底部に金属絶縁基板の底面周域と当接し合
うパッキンを配置して封止樹脂層の成形を行うことを特
徴とする樹脂封止型半導体装置の樹脂封止法。
3. The resin encapsulation method according to claim 1, wherein a packing which is in contact with the bottom surface peripheral region of the metal insulating substrate is arranged at the bottom of the cavity of the mold to mold the encapsulating resin layer. A resin encapsulation method for a resin encapsulation type semiconductor device.
【請求項4】請求項1記載の樹脂封止法において、金属
絶縁基板の金属板の底面側にあらかじめ段付き部を形成
しておき、金型のキャビティには前記段付き部と密接し
て嵌合し合う段付き凹所を形成して封止樹脂層の成形を
行うことを特徴とする樹脂封止型半導体装置の樹脂封止
法。
4. The resin encapsulation method according to claim 1, wherein a stepped portion is formed in advance on the bottom surface side of the metal plate of the metal insulating substrate, and the cavity of the mold is in close contact with the stepped portion. A resin encapsulation method for a resin encapsulation type semiconductor device, which comprises forming a stepped recess to be fitted with each other to form an encapsulation resin layer.
【請求項5】請求項1記載の樹脂封止法において、リー
ドフレームに対し、あらかじめ封止樹脂層成形領域の外
周を包囲するダムバーを形成して封止樹脂層の成形を行
うことを特徴とする樹脂封止型半導体装置の樹脂封止
法。
5. The resin encapsulation method according to claim 1, wherein a dam bar surrounding the outer periphery of the encapsulation resin layer molding region is previously formed on the lead frame to mold the encapsulation resin layer. A resin encapsulation method for a resin encapsulation type semiconductor device.
JP18427093A 1993-07-27 1993-07-27 Resin sealing method for semiconductor device Pending JPH0745765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18427093A JPH0745765A (en) 1993-07-27 1993-07-27 Resin sealing method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18427093A JPH0745765A (en) 1993-07-27 1993-07-27 Resin sealing method for semiconductor device

Publications (1)

Publication Number Publication Date
JPH0745765A true JPH0745765A (en) 1995-02-14

Family

ID=16150387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18427093A Pending JPH0745765A (en) 1993-07-27 1993-07-27 Resin sealing method for semiconductor device

Country Status (1)

Country Link
JP (1) JPH0745765A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0838091A4 (en) * 1995-07-03 1998-05-06
EP0977251A1 (en) * 1997-02-10 2000-02-02 Matsushita Electronics Corporation Resin sealed semiconductor device and method for manufacturing the same
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate
KR100770168B1 (en) * 2006-09-20 2007-10-26 삼성전기주식회사 Fabricating method for circuit board

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0838091A4 (en) * 1995-07-03 1998-05-06
EP0977251A1 (en) * 1997-02-10 2000-02-02 Matsushita Electronics Corporation Resin sealed semiconductor device and method for manufacturing the same
EP0977251A4 (en) * 1997-02-10 2005-09-28 Matsushita Electric Ind Co Ltd Resin sealed semiconductor device and method for manufacturing the same
US6992383B2 (en) 1999-11-24 2006-01-31 Denso Corporation Semiconductor device having radiation structure
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6798062B2 (en) 1999-11-24 2004-09-28 Denso Corporation Semiconductor device having radiation structure
US6891265B2 (en) 1999-11-24 2005-05-10 Denso Corporation Semiconductor device having radiation structure
US6960825B2 (en) 1999-11-24 2005-11-01 Denso Corporation Semiconductor device having radiation structure
US6998707B2 (en) 1999-11-24 2006-02-14 Denso Corporation Semiconductor device having radiation structure
US6967404B2 (en) 1999-11-24 2005-11-22 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate
US6963133B2 (en) 2001-04-25 2005-11-08 Denso Corporation Semiconductor device and method for manufacturing semiconductor device
KR100770168B1 (en) * 2006-09-20 2007-10-26 삼성전기주식회사 Fabricating method for circuit board

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